void
board_clock_init(si_t *sih)
{
uint32 armclock = 0, ddrclock = 0, axiclock = 0;
char *nvstr;
char *end;
if (cpu_turbo_mode)
{
printf("CPU Turbo Mode\n");
nvstr = strdup("1000,533");
}
else
nvstr = nvram_safe_get("clkfreq");
/* ARM clock speed override */
if (nvstr) {
printf("clkfreq: %s\n", nvstr);
armclock = bcm_strtoul(nvstr, &end, 0) * 1000000;
if (cpu_turbo_mode)
KFREE(nvstr);
if (*end == ',') {
nvstr = ++end;
ddrclock = bcm_strtoul(nvstr, &end, 0) * 1000000;
if (*end == ',') {
nvstr = ++end;
axiclock = bcm_strtoul(nvstr, &end, 0) * 1000000;
}
}
}
if (!armclock)
armclock = 800 * 1000000;
/* To accommodate old sdram_ncdl usage to store DDR clock;
* should be removed if sdram_ncdl is used for some other purpose.
*/
if ((nvstr = nvram_get("sdram_ncdl"))) {
uint32 ncdl = bcm_strtoul(nvstr, NULL, 0);
if (ncdl && (ncdl * 1000000) != ddrclock) {
ddrclock = ncdl * 1000000;
}
}
/* Set current ARM clock speed */
si_arm_setclock(sih, armclock, ddrclock, axiclock);
/* Update cfe_cpu_speed */
board_cfe_cpu_speed_upd(sih);
}
static int get_router (void)
{
uint boardnum = bcm_strtoul( nvram_safe_get( "boardnum" ), NULL, 0 );
if ( (boardnum == 8 || boardnum == 01)
&& nvram_match ("boardtype", "0x0472")
&& nvram_match ("cardbus", "1") ) {
return ROUTER_NETGEAR_WNR834B; //Netgear WNR834B, Netgear WNR834Bv2
}
if ( boardnum == 01
&& nvram_match ("boardtype", "0x0472")
&& nvram_match ("boardrev", "0x23") ) {
return ROUTER_NETGEAR_WNDR3300; //Netgear WNDR-3300
}
if ( (boardnum == 83258 || boardnum == 01) //or 001 or 0x01
&& (nvram_match ("boardtype", "0x048e") || nvram_match ("boardtype", "0x48E"))
&& (nvram_match ("boardrev", "0x11") || nvram_match ("boardrev", "0x10"))
&& (nvram_match ("boardflags", "0x750") || nvram_match ("boardflags", "0x0750"))
&& nvram_match ("sdram_init", "0x000A") ) {
return ROUTER_NETGEAR_WGR614L; //Netgear WGR614v8/L/WW 16MB ram, cfe v1.3 or v1.5
}
if ( (boardnum == 1 || boardnum == 3500)
&& nvram_match ("boardtype", "0x04CF")
&& (nvram_match ("boardrev", "0x1213") || nvram_match ("boardrev", "02")) ) {
return ROUTER_NETGEAR_WNR3500L; //Netgear WNR3500v2/U/L
}
if ( boardnum == 1
&& nvram_match ("boardtype", "0xE4CD")
&& nvram_match ("boardrev", "0x1700") ) {
return ROUTER_NETGEAR_WNR2000V2; //Netgear WNR2000v2
}
if ( boardnum == 01
&& nvram_match("boardtype", "0xb4cf")
&& nvram_match("boardrev", "0x1100")) {
return ROUTER_NETGEAR_WNDR3400; //Netgear WNDR3400
}
if ( boardnum == 01
&& nvram_match("boardtype", "0xF52C")
&& nvram_match("boardrev", "0x1101")) {
return ROUTER_NETGEAR_WNDR4000; //Netgear WNDR4000
}
if (nvram_match("boardtype", "0xa4cf")
&& nvram_match("boardrev", "0x1100")) {
return ROUTER_BELKIN_F5D8235V3; //F5D8235v3
}
if (nvram_match("boardtype", "0xa4cf")
&& nvram_match("boardrev", "0x1102")) {
return ROUTER_BELKIN_F7D3301_3302_4302; //Belkin F7D3301v1 /F7D3302v1 / F7D4302v1
}
return 0;
}
void
mach_device_init(si_t *sih)
{
uint32 armclock = 0, ddrclock = 0;
char *nvstr;
char *end;
uint32 ncdl = 0;
uint32 clock;
/* ARM clock speed override */
if ((nvstr = nvram_get("clkfreq"))) {
armclock = bcm_strtoul(nvstr, &end, 0);
if (*end == ',') {
nvstr = ++end;
ddrclock = bcm_strtoul(nvstr, &end, 0);
}
}
/* To accommodate old sdram_ncdl usage to store DDR clock;
* should be removed if sdram_ncdl is used for some other purpose.
*/
clock = si_mem_clock(sih) / 1000000;
printf("DDR Clock: %u MHz\n", clock);
if ((nvstr = nvram_get("sdram_ncdl"))) {
ncdl = bcm_strtoul(nvstr, NULL, 0);
if (ncdl && ncdl != ddrclock) {
printf("Warning: using legacy sdram_ncdl parameter to set DDR frequency. "
"Equivalent setting in clkfreq=%u,*%u* will be ignored.\n",
armclock, ddrclock);
if (ncdl != 0 && ncdl != clock)
printf("Warning: invalid DDR setting of %u MHz ignored. "
"DDR frequency will be set to %u MHz.\n", ncdl, clock);
goto out;
}
}
if (ddrclock)
printf("Info: DDR frequency set from clkfreq=%u,*%u*\n", armclock, ddrclock);
if (ddrclock != clock)
printf("Warning: invalid DDR setting of %u MHz ignored. "
"DDR frequency will be set to %u MHz.\n", ddrclock, clock);
out:
return;
}
/*
* Search the vars for a specific one and return its value as
* an integer. Returns 0 if not found.
*/
int getintvar(char *vars, char *name)
{
char *val;
if ((val = getvar(vars, name)) == NULL)
return (0);
return (bcm_strtoul(val, NULL, 0));
}
/* parse a xx:xx:xx:xx:xx:xx format ethernet address */
void
bcm_ether_atoe(char *p, char *ea)
{
int i;
for (i = 0; i < 6; i++) {
ea[i] = (char) bcm_strtoul(p, &p, 16);
if (*p == '\0') /* just bail on error */
break;
p++;
}
}
/* parse a xx:xx:xx:xx:xx:xx format ethernet address */
int bcm_ether_atoe(char *p, char *ea)
{
int i = 0;
for (;;) {
ea[i++] = (char) bcm_strtoul(p, &p, 16);
if (!*p++ || i == 6)
break;
}
return (i == 6);
}
/* parse a xx:xx:xx:xx:xx:xx format ethernet address */
int
BCMROMFN(bcm_ether_atoe)(char *p, struct ether_addr *ea)
{
int i = 0;
for (;;) {
ea->octet[i++] = (char) bcm_strtoul(p, &p, 16);
if (!*p++ || i == 6)
break;
}
return (i == 6);
}
void __init memory_setup(void)
{
#if defined(CONFIG_HIGHMEM)
unsigned long extmem = 0, off, data;
unsigned long off1, data1;
off = (unsigned long)prom_init;
data = *(unsigned long *)prom_init;
off1 = off + 4;
data1 = *(unsigned long *)off1;
extmem = 128 MB;
int highmemsupport=0;
uint boardnum;
/* Get global SB handle */
bcm947xx_sih = si_kattach(SI_OSH);
boardnum = bcm_strtoul( nvram_safe_get( "boardnum" ), NULL, 0 );
if (boardnum == 0 && nvram_match("boardtype", "0xF5B2")
&& nvram_match("boardrev", "0x1100")
&& !nvram_match("pci/2/1/sb20in80and160hr5ghpo", "0"))
highmemsupport = 1;
if (boardnum == 00 && nvram_match("boardtype", "0xF5B2")
&& nvram_match("boardrev", "0x1100")
&& nvram_match("pci/2/1/sb20in80and160hr5ghpo", "0"))
highmemsupport = 1;
if (extmem && detectmem == 128 MB && highmemsupport) {
/* We should deduct 0x1000 from the second memory
* region, because of the fact that processor does prefetch.
* Now that we are deducting a page from second memory
* region, we could add the earlier deducted 4KB (from first bank)
* to the second region (the fact that 0x80000000 -> 0x88000000
* shadows 0x0 -> 0x8000000)
*/
if (MIPS74K(current_cpu_data.processor_id) && (detectmem == (128 MB)))
extmem -= 0x1000;
extended_ram = extmem;
add_memory_region(SI_SDRAM_R2 + (128 MB) - 0x1000, extmem, BOOT_MEM_RAM);
}
#endif /* CONFIG_HIGHMEM */
}
/* Probe for NVRAM header */
static int
early_nvram_init(void)
{
struct nvram_header *header;
chipcregs_t *cc;
int i;
uint32 base, off, lim;
u32 *src, *dst;
uint32 fltype;
char *nvram_space_str;
#ifdef NFLASH_SUPPORT
hndnand_t *nfl_info = NULL;
uint32 blocksize;
#endif
hndsflash_t *sfl_info = NULL;
header = (struct nvram_header *)ram_nvram_buf;
if (header->magic == NVRAM_MAGIC) {
if (nvram_calc_crc(header) == (uint8) header->crc_ver_init) {
nvram_inram = TRUE;
goto found;
}
}
if ((cc = si_setcore(sih, CC_CORE_ID, 0)) != NULL) {
#ifdef NFLASH_SUPPORT
if ((sih->ccrev == 38) && ((sih->chipst & (1 << 4)) != 0)) {
fltype = NFLASH;
base = KSEG1ADDR(SI_FLASH1);
} else
#endif
{
fltype = readl(&cc->capabilities) & CC_CAP_FLASH_MASK;
base = KSEG1ADDR(SI_FLASH2);
}
switch (fltype) {
case PFLASH:
lim = SI_FLASH2_SZ;
break;
case SFLASH_ST:
case SFLASH_AT:
if ((sfl_info = hndsflash_init(sih)) == NULL)
return -1;
lim = sfl_info->size;
break;
#ifdef NFLASH_SUPPORT
case NFLASH:
if ((nfl_info = hndnand_init(sih)) == NULL)
return -1;
lim = SI_FLASH1_SZ;
break;
#endif
case FLASH_NONE:
default:
return -1;
}
} else {
/* extif assumed, Stop at 4 MB */
base = KSEG1ADDR(SI_FLASH1);
lim = SI_FLASH1_SZ;
}
#ifdef NFLASH_SUPPORT
if (nfl_info != NULL) {
blocksize = nfl_info->blocksize;
off = blocksize;
for (; off < NFL_BOOT_SIZE; off += blocksize) {
if (hndnand_checkbadb(nfl_info, off) != 0)
continue;
header = (struct nvram_header *) KSEG1ADDR(base + off);
if (header->magic != NVRAM_MAGIC)
continue;
/* Read into the nand_nvram */
if ((header = nand_find_nvram(nfl_info, off)) == NULL)
continue;
if (nvram_calc_crc(header) == (uint8)header->crc_ver_init)
goto found;
}
} else
#endif /* NFLASH_SUPPORT */
{
off = FLASH_MIN;
#ifdef RTN66U_NVRAM_64K_SUPPORT
header = (struct nvram_header *) KSEG1ADDR(base + lim - 0x8000);
if(header->magic==0xffffffff) {
header = (struct nvram_header *) KSEG1ADDR(base + 1 KB);
if (nvram_calc_crc(header) == (uint8) header->crc_ver_init) {
nvram_32_reset=1;
goto found;
}
}
#endif
while (off <= lim) {
/* Windowed flash access */
header = (struct nvram_header *) KSEG1ADDR(base + off - MAX_NVRAM_SPACE);
if (header->magic == NVRAM_MAGIC)
if (nvram_calc_crc(header) == (uint8) header->crc_ver_init) {
goto found;
}
off += DEF_NVRAM_SPACE;
}
}
/* Try embedded NVRAM at 4 KB and 1 KB as last resorts */
header = (struct nvram_header *) KSEG1ADDR(base + 4 KB);
if (header->magic == NVRAM_MAGIC)
if (nvram_calc_crc(header) == (uint8) header->crc_ver_init) {
goto found;
}
header = (struct nvram_header *) KSEG1ADDR(base + 1 KB);
if (header->magic == NVRAM_MAGIC)
if (nvram_calc_crc(header) == (uint8) header->crc_ver_init) {
goto found;
}
return -1;
found:
src = (u32 *) header;
dst = (u32 *) nvram_buf;
for (i = 0; i < sizeof(struct nvram_header); i += 4)
*dst++ = *src++;
for (; i < header->len && i < MAX_NVRAM_SPACE; i += 4)
*dst++ = ltoh32(*src++);
nvram_space_str = early_nvram_get("nvram_space");
if (nvram_space_str)
nvram_space = bcm_strtoul(nvram_space_str, NULL, 0);
return 0;
}
int
bcm_atoi(char *s)
{
return (int)bcm_strtoul(s, NULL, 10);
}
static int __init
gpio_init(void)
{
int i;
if (!(gpio_sih = si_kattach(SI_OSH)))
return -ENODEV;
si_gpiosetcore(gpio_sih);
if ((gpio_major = register_chrdev(127, "gpio", &gpio_fops)) < 0)
{
return gpio_major;
}
// devfs_mk_cdev(MKDEV(gpio_major, 0), S_IFCHR | S_IRUGO | S_IWUGO, "gpio");
// devfs_mk_dir("gpio");
gpio_class = class_create(THIS_MODULE, "gpio");
for (i = 0; i < ARRAYSIZE(gpio_file); i++) {
// register_chrdev(MKDEV(127, i), gpio_file[i].name, &gpio_fops);
class_device_create(gpio_class, NULL, MKDEV(127, i), NULL, gpio_file[i].name);
// printk("gpio dev %d created\n",dev);
// devfs_mk_cdev(MKDEV(127, i), S_IFCHR | S_IRUGO | S_IWUGO, gpio_file[i].name);
}
gpio_init_flag=1;
int gpios = 0;
if (iswrt350n)
{
printk(KERN_EMERG "WRT350N GPIO Init\n");
/* For WRT350N USB LED control */
si_gpioreserve(gpio_sih, 0x400, GPIO_HI_PRIORITY);
si_gpioouten(gpio_sih, 0x400, 0x400, GPIO_HI_PRIORITY);
si_gpioreserve(gpio_sih, 0x800, GPIO_HI_PRIORITY);
si_gpioouten(gpio_sih, 0x800, 0x800, GPIO_HI_PRIORITY);
//if (nvram_match("disabled_5397", "1")) {
// printk("5397 switch GPIO-Reset \n");
//}
USB_SET_LED(USB_DISCONNECT); //2005-02-24 by kanki for USB LED
}
if (iswrt350n)
{
si_gpioreserve(gpio_sih, 0x4, GPIO_HI_PRIORITY);
si_gpioouten(gpio_sih, 0x4, 0x4, GPIO_HI_PRIORITY);
si_gpioout(gpio_sih, 0x4, 0x4, GPIO_HI_PRIORITY);
}
uint boardnum = bcm_strtoul( nvram_safe_get( "boardnum" ), NULL, 0 );
gpios = 1<<0 | 1<<1 | 1<<2 | 1<<3 | 1<<4 | 1<<5 | 1<<6 | 1<<7 | 1<<8 | 1<<9 | 1<<10 | 1<<11;
if ((boardnum == 1 || boardnum == 3500)
&& nvram_match("boardtype", "0x04CF")
&& (nvram_match("boardrev", "0x1213") || nvram_match("boardrev", "02")))
{
printk(KERN_EMERG "WNR3500V2 GPIO Init\n");
gpios = 1 << 1 | 1 << 2 | 1 << 3 | 1 << 7;
}
if ((boardnum == 42 || boardnum == 66)
&& nvram_match("boardtype", "0x04EF")
&& (nvram_match("boardrev", "0x1304") || nvram_match("boardrev", "0x1305") || nvram_match("boardrev", "0x1307")))
{
printk(KERN_EMERG "WRT320N/E2000 GPIO Init\n");
gpios = 1 << 2 | 1 << 3 | 1 << 4;
}
if (boardnum == 42 && ((nvram_match("boot_hw_model", "WRT160N") && nvram_match("boot_hw_ver", "3.0"))
|| (nvram_match("boot_hw_model", "M10") && nvram_match("boot_hw_ver", "1.0"))
|| (nvram_match("boot_hw_model", "E100") && nvram_match("boot_hw_ver", "1.0")) ) )
{
printk(KERN_EMERG "WRT160Nv3/M10/E1000 GPIO Init\n");
gpios = 1 << 1 | 1 << 2 | 1 << 4;
}
if (boardnum == 42 && ((nvram_match("boot_hw_model", "WRT310N") && nvram_match("boot_hw_ver", "2.0"))
|| (nvram_match("boot_hw_model", "M20") && nvram_match("boot_hw_ver", "1.0")) ) )
{
printk(KERN_EMERG "WRT310Nv2/M20 GPIO Init\n");
gpios = 1 << 1 | 1 << 2 | 1 << 4;
}
if (nvram_match("boardnum", "00") && nvram_match("boardrev", "0x11")
&& nvram_match("boardtype", "0x048e")
&& (nvram_match("melco_id", "32093") || nvram_match("melco_id", "32064")))
{
printk(KERN_EMERG "WHR-G125 / WHR-HP-G125 GPIO Init\n");
gpios = 1 << 1 | 1 << 6 | 1 << 7;
}
if (nvram_match("boardnum", "00") && nvram_match("boardrev", "0x13")
&& nvram_match("boardtype", "0x467"))
{
printk(KERN_EMERG "WHR-G54S / WHR-HP-G54 GPIO Init\n");
gpios = 1 << 1 | 1 << 6 | 1 << 7;
}
if (nvram_match("boardtype", "0x04cf") && (nvram_match("boot_hw_model", "WRT610N")
|| nvram_match("boot_hw_model", "E300")))
{
printk(KERN_EMERG "WRT610Nv2/E3000 GPIO Init\n");
gpios = 1 << 0 | 1 << 3 | 1 << 5 | 1 << 7;
}
if (boardnum == 42 && nvram_match("boardrev", "0x10")
&& (nvram_match("boardtype", "0x0467")
|| nvram_match("boardtype", "0x0708")
|| nvram_match("boardtype", "0x0101")))
{
printk(KERN_EMERG "WRT54G/GS/GL/TM GPIO Init\n");
gpios = 1 << 1 | 1 << 2 | 1 << 3 | 1 << 4 | 1 << 7;
}
if (boardnum == 45 && nvram_match("boardrev", "0x1402")
&& nvram_match("boardtype", "0x04EC"))
{
printk(KERN_EMERG "RT-N10 GPIO Init\n");
gpios = 1 << 1;
}
if (boardnum == 45 && nvram_match("boardrev", "0x1102")
&& nvram_match("boardtype", "0x0550"))
{
printk(KERN_EMERG "RT-N10U GPIO Init\n");
gpios = 1 << 5;
}
if (boardnum == 45 && nvram_match("boardrev", "0x1153")
&& nvram_match("boardtype", "0x058e"))
{
printk(KERN_EMERG "RT-N10+ D1 GPIO INIT\n");
gpios = 1 << 6 | 1 << 7 | 1 << 21 | 1 << 20;
}
if (boardnum == 1 && nvram_match("boardtype", "0xE4CD")
&& nvram_match("boardrev", "0x1700"))
{
printk(KERN_EMERG "WNR2000v2 GPIO Init\n");
gpios = 1 << 2 | 1 << 6 | 1 << 7 | 1 << 8;
}
if (boardnum == 45 && nvram_match("boardrev", "0x1201")
&& nvram_match("boardtype", "0x04CD"))
{
printk(KERN_EMERG "RT-N12 GPIO Init\n");
gpios = 1 << 0 | 1 << 2;
}
if (boardnum == 45 && nvram_match("boardrev", "0x1218")
&& nvram_match("boardtype", "0x04cf"))
{
printk(KERN_EMERG "RT-N16 GPIO Init\n");
gpios = 1 << 1;
}
if (boardnum == 1 && nvram_match("boardrev", "0x23")
&& nvram_match("boardtype", "0x0472"))
{
if (nvram_match("cardbus", "1")) {
printk(KERN_EMERG "WNR324v2 GPIO Init\n");
gpios = 1 << 2 | 1 << 3 | 1 << 7;
} else {
printk(KERN_EMERG "WNDR3300 GPIO Init\n");
gpios = 1 << 5 | 1 << 7;
}
}
if (nvram_match("boardnum", "00") && nvram_match("boardtype", "0x0101")
&& nvram_match("boardrev", "0x10"))
{
printk(KERN_EMERG "WBR2-G54(S) GPIO Init\n");
gpios = 1 << 1 | 1 << 6;
}
if (nvram_match("boardtype", "0xd4cf")
&& nvram_match("boardrev", "0x1204"))
{
printk(KERN_EMERG "F7D4301v1 GPIO Init\n");
gpios = 1 << 10 | 1 << 11 | 1 << 13;
}
if (nvram_match("boardtype", "0xa4cf")
&& (nvram_match("boardrev", "0x1100") || nvram_match("boardrev", "0x1102")))
{
printk(KERN_EMERG "F7D3301v1/3302v1/4302v1 - F5D8235v3 GPIO Init\n");
gpios = 1 << 10 | 1 << 11 | 1 << 13;
}
if (nvram_match("boot_hw_model", "E1000")
&& (nvram_match("boot_hw_ver", "2.0") || nvram_match("boot_hw_ver", "2.1")))
{
printk(KERN_EMERG "E1000v2/v21 GPIO Init\n");
gpios = 1 << 6 | 1 << 7 | 1 << 8;
}
if (nvram_match("boot_hw_model", "E4200")
&& nvram_match("boot_hw_ver", "1.0"))
{
printk(KERN_EMERG "E4200 GPIO Init\n");
gpios = 1 << 3 | 1 << 5;
}
if (nvram_match("boardnum", "01") && nvram_match("boardtype", "0xb4cf")
&& nvram_match("boardrev", "0x1100"))
{
printk(KERN_EMERG "WNDR3400 GPIO Init\n");
gpios = 1 << 0 | 1 << 1 | 1 << 2 | 1 << 3 | 1 << 7;
}
if (nvram_match("boardnum", "01") && nvram_match("boardtype", "0xF52C")
&& nvram_match("boardrev", "0x1101"))
{
printk(KERN_EMERG "WNDR4000 GPIO Init\n");
gpios = 1 << 0 | 1 << 6 | 1 << 7;
}
/*if (iswrt300n11)
{
printk(KERN_EMERG "WRT300N v1.1 GPIO Init\n");
int reset = 1 << 8;
sb_gpioout(gpio_sbh, reset, 0, GPIO_DRV_PRIORITY);
sb_gpioouten(gpio_sbh, reset, reset, GPIO_DRV_PRIORITY);
bcm_mdelay(50);
sb_gpioout(gpio_sbh, reset, reset, GPIO_DRV_PRIORITY);
bcm_mdelay(20);
}*/
for (i = 0; i < 16; i++)
{
if (gpios&1) {
si_gpioreserve(gpio_sih, 1 << i, GPIO_APP_PRIORITY);
}
gpios>>=1;
}
return 0;
}
/* Probe for NVRAM header */
static int
early_nvram_init(void)
{
struct nvram_header *header;
int i;
u32 *src, *dst;
#ifdef CONFIG_MTD_NFLASH
hndnand_t *nfl_info = NULL;
uint32 blocksize;
#endif
char *nvram_space_str;
int bootdev;
uint32 flash_base;
uint32 lim = SI_FLASH_WINDOW;
uint32 off;
hndsflash_t *sfl_info;
header = (struct nvram_header *)ram_nvram_buf;
if (header->magic == NVRAM_MAGIC) {
if (nvram_calc_crc(header) == (uint8)header->crc_ver_init) {
nvram_inram = TRUE;
goto found;
}
}
bootdev = soc_boot_dev((void *)sih);
#ifdef CONFIG_MTD_NFLASH
if (bootdev == SOC_BOOTDEV_NANDFLASH) {
if ((nfl_info = hndnand_init(sih)) == NULL)
return -1;
flash_base = nfl_info->base;
blocksize = nfl_info->blocksize;
off = blocksize;
for (; off < NFL_BOOT_SIZE; off += blocksize) {
if (hndnand_checkbadb(nfl_info, off) != 0)
continue;
header = (struct nvram_header *)(flash_base + off);
if (header->magic != NVRAM_MAGIC)
continue;
/* Read into the nand_nvram */
if ((header = nand_find_nvram(nfl_info, off)) == NULL)
continue;
if (nvram_calc_crc(header) == (uint8)header->crc_ver_init)
goto found;
}
}
else
#endif
if (bootdev == SOC_BOOTDEV_SFLASH ||
bootdev == SOC_BOOTDEV_ROM) {
/* Boot from SFLASH or ROM */
if ((sfl_info = hndsflash_init(sih)) == NULL)
return -1;
lim = sfl_info->size;
BUG_ON(request_resource(&iomem_resource, &norflash_region));
flash_base = sfl_info->base;
BUG_ON(IS_ERR_OR_NULL((void *)flash_base));
off = FLASH_MIN;
while (off <= lim) {
/* Windowed flash access */
header = (struct nvram_header *)(flash_base + off - nvram_space);
if (header->magic == NVRAM_MAGIC)
if (nvram_calc_crc(header) == (uint8)header->crc_ver_init) {
goto found;
}
off += DEF_NVRAM_SPACE;
}
}
else {
/* This is the case bootdev == SOC_BOOTDEV_PFLASH, not applied on NorthStar */
ASSERT(0);
}
/* Try embedded NVRAM at 4 KB and 1 KB as last resorts */
header = (struct nvram_header *)(flash_base + 4 KB);
if (header->magic == NVRAM_MAGIC)
if (nvram_calc_crc(header) == (uint8)header->crc_ver_init) {
goto found;
}
header = (struct nvram_header *)(flash_base + 1 KB);
if (header->magic == NVRAM_MAGIC)
if (nvram_calc_crc(header) == (uint8)header->crc_ver_init) {
goto found;
}
return -1;
found:
src = (u32 *)header;
dst = (u32 *)nvram_buf;
for (i = 0; i < sizeof(struct nvram_header); i += 4)
*dst++ = *src++;
for (; i < header->len && i < MAX_NVRAM_SPACE; i += 4)
*dst++ = ltoh32(*src++);
nvram_space_str = early_nvram_get("nvram_space");
if (nvram_space_str)
nvram_space = bcm_strtoul(nvram_space_str, NULL, 0);
return 0;
}
int
BCMROMFN(bcm_atoi)(char *s)
{
return (int)bcm_strtoul(s, NULL, 10);
}
/*
* Initialize nonvolatile variable table from sprom.
* Return 0 on success, nonzero on error.
*/
static int
initvars_srom_pci(void *sbh, void *curmap, char **vars, uint *count)
{
uint16 w, *b;
uint8 sromrev = 0;
struct ether_addr ea;
char eabuf[32];
uint32 w32;
int woff, i;
char *vp, *base;
osl_t *osh = sb_osh(sbh);
bool flash = FALSE;
char name[SB_DEVPATH_BUFSZ+16], *value;
char devpath[SB_DEVPATH_BUFSZ];
int err;
/*
* Apply CRC over SROM content regardless SROM is present or not,
* and use variable <devpath>sromrev's existance in flash to decide
* if we should return an error when CRC fails or read SROM variables
* from flash.
*/
b = MALLOC(osh, SROM_MAX);
ASSERT(b);
if (!b)
return -2;
err = sprom_read_pci(osh, (void*)((int8*)curmap + PCI_BAR0_SPROM_OFFSET), 0, b,
64, TRUE);
if (b[SROM4_SIGN] == SROM4_SIGNATURE) {
/* sromrev >= 4, read more */
err = sprom_read_pci(osh, (void*)((int8*)curmap + PCI_BAR0_SPROM_OFFSET), 0, b, SROM4_WORDS, TRUE);
sromrev = b[SROM4_WORDS - 1] & 0xff;
} else if (err == 0) {
/* srom is good and is rev < 4 */
/* top word of sprom contains version and crc8 */
sromrev = b[63] & 0xff;
/* bcm4401 sroms misprogrammed */
if (sromrev == 0x10)
sromrev = 1;
}
if (err) {
#ifdef WLTEST
BS_ERROR(("SROM Crc Error, so see if we could use a default\n"));
w32 = OSL_PCI_READ_CONFIG(osh, PCI_SPROM_CONTROL, sizeof(uint32));
if (w32 & SPROM_OTPIN_USE) {
BS_ERROR(("srom crc failed with OTP, use default vars....\n"));
vp = base = mfgsromvars;
if (sb_chip(sbh) == BCM4311_CHIP_ID) {
BS_ERROR(("setting the devid to be 4311\n"));
vp += sprintf(vp, "devid=0x4311");
vp++;
}
bcopy(defaultsromvars, vp, MFGSROM_DEFVARSLEN);
vp += MFGSROM_DEFVARSLEN;
goto varsdone;
} else {
BS_ERROR(("srom crc failed with SPROM....\n"));
#endif /* WLTEST */
if ((err = sb_devpath(sbh, devpath, sizeof(devpath))))
return err;
sprintf(name, "%ssromrev", devpath);
if (!(value = getvar(NULL, name)))
return (-1);
sromrev = (uint8)bcm_strtoul(value, NULL, 0);
flash = TRUE;
#ifdef WLTEST
}
#endif /* WLTEST */
}
/* srom version check */
if (sromrev > 4)
return (-2);
ASSERT(vars);
ASSERT(count);
base = vp = MALLOC(osh, VARS_MAX);
ASSERT(vp);
if (!vp)
return -2;
/* read variables from flash */
if (flash) {
if ((err = initvars_flash(osh, &vp, VARS_MAX, devpath)))
goto err;
goto varsdone;
}
vp += sprintf(vp, "sromrev=%d", sromrev);
vp++;
if (sromrev >= 4) {
uint path, pathbase;
const uint pathbases[MAX_PATH] = {SROM4_PATH0, SROM4_PATH1,
SROM4_PATH2, SROM4_PATH3};
vp += sprintf(vp, "boardrev=%d", b[SROM4_BREV]);
vp++;
vp += sprintf(vp, "boardflags=%d", (b[SROM4_BFL1] << 16) | b[SROM4_BFL0]);
vp++;
vp += sprintf(vp, "boardflags2=%d", (b[SROM4_BFL3] << 16) | b[SROM4_BFL2]);
vp++;
/* The macaddr */
ea.octet[0] = (b[SROM4_MACHI] >> 8) & 0xff;
ea.octet[1] = b[SROM4_MACHI] & 0xff;
ea.octet[2] = (b[SROM4_MACMID] >> 8) & 0xff;
ea.octet[3] = b[SROM4_MACMID] & 0xff;
ea.octet[4] = (b[SROM4_MACLO] >> 8) & 0xff;
ea.octet[5] = b[SROM4_MACLO] & 0xff;
bcm_ether_ntoa(&ea, eabuf);
vp += sprintf(vp, "macaddr=%s", eabuf);
vp++;
w = b[SROM4_CCODE];
if (w == 0)
vp += sprintf(vp, "ccode=");
else
vp += sprintf(vp, "ccode=%c%c", (w >> 8), (w & 0xff));
vp++;
vp += sprintf(vp, "regrev=%d", b[SROM4_REGREV]);
vp++;
w = b[SROM4_LEDBH10];
if ((w != 0) && (w != 0xffff)) {
/* ledbh0 */
vp += sprintf(vp, "ledbh0=%d", (w & 0xff));
vp++;
/* ledbh1 */
vp += sprintf(vp, "ledbh1=%d", (w >> 8) & 0xff);
vp++;
}
int wldev_set_country(
struct net_device *dev, char *country_code)
{
int error = -1;
wl_country_t cspec = {{0}, 0, {0}};
scb_val_t scbval;
char smbuf[WLC_IOCTL_SMLEN];
if (!country_code)
return error;
error = wldev_iovar_getbuf(dev, "country", &cspec, sizeof(cspec),
smbuf, sizeof(smbuf), NULL);
if (error < 0)
WLDEV_ERROR(("%s: get country failed = %d\n", __FUNCTION__, error));
if ((error < 0) ||
(strncmp(country_code, smbuf, WLC_CNTRY_BUF_SZ) != 0)) {
bzero(&scbval, sizeof(scb_val_t));
error = wldev_ioctl(dev, WLC_DISASSOC, &scbval, sizeof(scb_val_t), 1);
if (error < 0) {
WLDEV_ERROR(("%s: set country failed due to Disassoc error %d\n",
__FUNCTION__, error));
return error;
}
}
cspec.rev = -1;
//[email protected] - Country Code and rev from framework
//memcpy(cspec.country_abbrev, country_code, WLC_CNTRY_BUF_SZ);
//memcpy(cspec.ccode, country_code, WLC_CNTRY_BUF_SZ);
//get_customized_country_code((char *)&cspec.country_abbrev, &cspec);
{
char *revstr;
char *endptr = NULL;
revstr = strchr(country_code, '/');
if (revstr)
{
cspec.rev = bcm_strtoul(revstr + 1, &endptr, 10);
memcpy(cspec.country_abbrev,country_code,WLC_CNTRY_BUF_SZ);
cspec.country_abbrev[2] = '\0';
memcpy(cspec.ccode,cspec.country_abbrev,WLC_CNTRY_BUF_SZ);
}
else
{
#if defined (CONFIG_PRODUCT_I_ATNT) || defined(CONFIG_PRODUCT_I_BELL) || defined(CONFIG_PRODUCT_J_TLS)
memcpy(cspec.country_abbrev, country_code, WLC_CNTRY_BUF_SZ);
memcpy(cspec.ccode, country_code, WLC_CNTRY_BUF_SZ);
get_customized_country_code((char *)&cspec.country_abbrev, &cspec);
#else
cspec.rev = 0;
memcpy(cspec.country_abbrev, country_code, WLC_CNTRY_BUF_SZ);
memcpy(cspec.ccode, country_code, WLC_CNTRY_BUF_SZ);
#endif
}
}
WLDEV_ERROR(("%s: set country for %s as %s rev %d\n", __FUNCTION__, country_code, cspec.ccode, cspec.rev));
//[email protected] - Country Code and rev from framework
error = wldev_iovar_setbuf(dev, "country", &cspec, sizeof(cspec),
smbuf, sizeof(smbuf), NULL);
if (error < 0) {
WLDEV_ERROR(("%s: set country for %s as %s rev %d failed\n",
__FUNCTION__, country_code, cspec.ccode, cspec.rev));
return error;
}
dhd_bus_country_set(dev, &cspec);
WLDEV_ERROR(("%s: set country for %s as %s rev %d\n",
__FUNCTION__, country_code, cspec.ccode, cspec.rev));
return 0;
}
static int __init gpio_init(void)
{
int i;
int gpios = 0;
printk(KERN_INFO "init gpio code\n");
if (!(gpio_sih = si_kattach(SI_OSH)))
return -ENODEV;
si_gpiosetcore(gpio_sih);
set_hc595_core(gpio_sih);
if ((gpio_major = register_chrdev(127, "gpio", &gpio_fops)) < 0) {
return gpio_major;
}
gpio_class = class_create(THIS_MODULE, "gpio");
for (i = 0; i < ARRAYSIZE(gpio_file); i++) {
device_create(gpio_class, NULL, MKDEV(127, i), NULL, gpio_file[i].name);
}
uint boardnum = bcm_strtoul(nvram_safe_get("boardnum"), NULL, 0);
if (boardnum == 00 && nvram_match("boardtype", "0xF646")
&& nvram_match("boardrev", "0x1100")
&& nvram_match("melco_id", "RD_BB12068")) {
printk(KERN_EMERG "Buffalo WZR-1750DHP\n");
isbuffalo = 1;
set_hc595_reset();
gpio_init_flag = 1;
return 0;
}
if (boardnum == 00 && nvram_match("boardtype", "0x0665")
&& nvram_match("boardrev", "0x1103")
&& nvram_match("melco_id", "RD_BB13049")) {
printk(KERN_EMERG "Buffalo WXR-1900DHP\n");
isbuffalowxr = 1;
gpio_init_flag = 1;
return 0;
}
if ((!strncmp(nvram_safe_get("boardnum"),"2013",4) || !strncmp(nvram_safe_get("boardnum"),"2014",4)) && nvram_match("boardtype", "0x0646")
&& nvram_match("boardrev", "0x1110")
&& nvram_match("0:rxchain", "7")) {
printk(KERN_EMERG "Buffalo WZR-900DHP\n");
isbuffalo = 1;
set_hc595_reset();
gpio_init_flag = 1;
return 0;
}
if ((!strncmp(nvram_safe_get("boardnum"),"2013",4) || !strncmp(nvram_safe_get("boardnum"),"2014",4)) && nvram_match("boardtype", "0x0646")
&& nvram_match("boardrev", "0x1110")
&& nvram_match("0:rxchain", "3")) {
printk(KERN_EMERG "Buffalo WZR-600DHP2\n");
isbuffalo = 1;
set_hc595_reset();
gpio_init_flag = 1;
return 0;
}
if ((boardnum == 0) && nvram_match("boardtype", "0x0646") && (nvram_match("boardrev", "0x1100"))) {
printk(KERN_EMERG "Asus-RT-AC56U init\n");
isac66 = 1;
}
if (nvram_match("model","RT-AC68U")) {
printk(KERN_EMERG "Asus-RT-AC68U init\n");
isac68 = 1;
} else if ((boardnum != 24) && nvram_match("boardtype", "0x0646") && (nvram_match("boardrev", "0x1100"))) {
printk(KERN_EMERG "Asus-RT-AC68U init\n");
isac68 = 1;
}
if ((boardnum == 24) && nvram_match("boardtype", "0x0646") && nvram_match("boardrev", "0x1110") && !nvram_match("gpio6", "wps_led")) {
printk(KERN_EMERG "DLink DIR-868 init\n");
isac66 = 1;
}
if ((boardnum == 679) && nvram_match("boardtype", "0x0646") && (nvram_match("boardrev", "0x1110"))) {
printk(KERN_EMERG "Netgear AC1450/R6250/R6300v2/EX6200 init\n");
gpios = 1<<0 | 1<<1 | 1<<2 | 1<<3 | 1<<4 | 1<<5 | 1<<6 | 1<<7 | 1<<8 | 1<<9 | 1<<10 | 1<<11 | 1<<15;
}
if ((boardnum == 32) && nvram_match("boardtype", "0x0665") && (nvram_match("boardrev", "0x1301"))) {
printk(KERN_EMERG "Netgear R7000 init\n");
gpios = 1<<0 | 1<<1 | 1<<2 | 1<<3 | 1<<4 | 1<<5 | 1<<6 | 1<<7 | 1<<8 | 1<<9 | 1<<10 | 1<<11 | 1<<15;
}
if ((boardnum == 32) && nvram_match("boardtype", "0x0665") && (nvram_match("boardrev", "0x1101"))) {
printk(KERN_EMERG "Netgear R8000 init\n");
gpios = 1<<0 | 1<<1 | 1<<2 | 1<<3 | 1<<4 | 1<<5 | 1<<6 | 1<<7 | 1<<8 | 1<<9 | 1<<10 | 1<<11 | 1<<15;
}
for (i = 0; i < 16; i++) {
if (gpios&1) {
si_gpioreserve(gpio_sih, 1 << i, GPIO_APP_PRIORITY);
}
}
gpio_init_flag = 1;
return 0;
}