/*
* called from C runtime startup code (arch/arm/lib/crt0.S:_main)
* - we have a stack and a place to store GD, both in SRAM
* - no variable global data is available
*/
void board_init_f(ulong dummy)
{
/* setup AIPS and disable watchdog */
arch_cpu_init();
ccgr_init();
gpr_init();
/* setup GP timer */
timer_init();
#ifdef CONFIG_BOARD_POSTCLK_INIT
board_postclk_init();
#endif
#ifdef CONFIG_FSL_ESDHC
get_clocks();
#endif
/* Setup IOMUX and configure basics. */
novena_spl_setup_iomux_audio();
novena_spl_setup_iomux_buttons();
novena_spl_setup_iomux_enet();
novena_spl_setup_iomux_fpga();
novena_spl_setup_iomux_i2c();
novena_spl_setup_iomux_pcie();
novena_spl_setup_iomux_sdhc();
novena_spl_setup_iomux_spi();
novena_spl_setup_iomux_uart();
novena_spl_setup_iomux_video();
/* UART clocks enabled and gd valid - init serial console */
preloader_console_init();
/* Start the DDR DRAM */
novena_read_spd(&novena_ddr_info, &novena_ddr3_cfg);
mx6dq_dram_iocfg(novena_ddr3_cfg.width,
&novena_ddr_ioregs, &novena_grp_ioregs);
mx6_dram_cfg(&novena_ddr_info, &novena_mmdc_calib, &novena_ddr3_cfg);
do_write_level_calibration();
do_dqs_calibration();
printf("Running post-config memory test... ");
if (novena_memory_test())
printf("Fail!\n");
else
printf("Pass\n");
/* Clear the BSS. */
memset(__bss_start, 0, __bss_end - __bss_start);
/* load/boot image from boot device */
board_init_r(NULL, 0);
}
/*
* called from C runtime startup code (arch/arm/lib/crt0.S:_main)
* - we have a stack and a place to store GD, both in SRAM
* - no variable global data is available
*/
void board_init_f(ulong dummy)
{
/* setup AIPS and disable watchdog */
arch_cpu_init();
ccgr_init();
gpr_init();
/* setup GP timer */
timer_init();
#ifdef CONFIG_BOARD_POSTCLK_INIT
board_postclk_init();
#endif
#ifdef CONFIG_FSL_ESDHC
get_clocks();
#endif
/* Setup IOMUX and configure basics. */
novena_spl_setup_iomux_audio();
novena_spl_setup_iomux_buttons();
novena_spl_setup_iomux_enet();
novena_spl_setup_iomux_fpga();
novena_spl_setup_iomux_i2c();
novena_spl_setup_iomux_pcie();
novena_spl_setup_iomux_sdhc();
novena_spl_setup_iomux_spi();
novena_spl_setup_iomux_uart();
novena_spl_setup_iomux_video();
/* UART clocks enabled and gd valid - init serial console */
preloader_console_init();
/* Start the DDR DRAM */
mx6dq_dram_iocfg(64, &novena_ddr_ioregs, &novena_grp_ioregs);
mx6_dram_cfg(&novena_ddr_info, &novena_mmdc_calib, &elpida_4gib_1600);
/* Perform DDR DRAM calibration */
udelay(100);
mmdc_do_write_level_calibration();
mmdc_do_dqs_calibration();
/* Clear the BSS. */
memset(__bss_start, 0, __bss_end - __bss_start);
/* load/boot image from boot device */
board_init_r(NULL, 0);
}
void board_init_f(ulong board_type)
{
gd_t gd_data;
gd_t *new_gd;
bd_t *bd;
unsigned long *new_sp;
unsigned long monitor_len;
unsigned long monitor_addr;
unsigned long addr;
long sdram_size;
/* Initialize the global data pointer */
memset(&gd_data, 0, sizeof(gd_data));
gd = &gd_data;
/* Perform initialization sequence */
board_early_init_f();
cpu_init();
board_postclk_init();
env_init();
init_baudrate();
serial_init();
console_init_f();
display_banner();
sdram_size = initdram(board_type);
/* If we have no SDRAM, we can't go on */
if (sdram_size <= 0)
panic("No working SDRAM available\n");
/*
* Now that we have DRAM mapped and working, we can
* relocate the code and continue running from DRAM.
*
* Reserve memory at end of RAM for (top down in that order):
* - u-boot image
* - heap for malloc()
* - board info struct
* - global data struct
* - stack
*/
addr = CONFIG_SYS_SDRAM_BASE + sdram_size;
monitor_len = __bss_end__ - _text;
/*
* Reserve memory for u-boot code, data and bss.
* Round down to next 4 kB limit.
*/
addr -= monitor_len;
addr &= ~(4096UL - 1);
monitor_addr = addr;
/* Reserve memory for malloc() */
addr -= CONFIG_SYS_MALLOC_LEN;
#ifdef CONFIG_SYS_DMA_ALLOC_LEN
/* Reserve DMA memory (must be cache aligned) */
addr &= ~(CONFIG_SYS_DCACHE_LINESZ - 1);
addr -= CONFIG_SYS_DMA_ALLOC_LEN;
#endif
#ifdef CONFIG_LCD
#ifdef CONFIG_FB_ADDR
printf("LCD: Frame buffer allocated at preset 0x%08x\n",
CONFIG_FB_ADDR);
gd->fb_base = (void *)CONFIG_FB_ADDR;
#else
addr = lcd_setmem(addr);
printf("LCD: Frame buffer allocated at 0x%08lx\n", addr);
gd->fb_base = (void *)addr;
#endif /* CONFIG_FB_ADDR */
#endif /* CONFIG_LCD */
/* Allocate a Board Info struct on a word boundary */
addr -= sizeof(bd_t);
addr &= ~3UL;
gd->bd = bd = (bd_t *)addr;
/* Allocate a new global data copy on a 8-byte boundary. */
addr -= sizeof(gd_t);
addr &= ~7UL;
new_gd = (gd_t *)addr;
/* And finally, a new, bigger stack. */
new_sp = (unsigned long *)addr;
gd->stack_end = addr;
*(--new_sp) = 0;
*(--new_sp) = 0;
/*
* Initialize the board information struct with the
* information we have.
*/
bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
bd->bi_dram[0].size = sdram_size;
bd->bi_baudrate = gd->baudrate;
memcpy(new_gd, gd, sizeof(gd_t));
relocate_code((unsigned long)new_sp, new_gd, monitor_addr);
}
