/* boardlevel antenna selection: ucode interface control */
static int brcms_c_antsel_cfgupd(struct antsel_info *asi,
struct brcms_antselcfg *antsel)
{
struct brcms_c_info *wlc = asi->wlc;
u8 ant_cfg;
u16 mimo_antsel;
/* 1) Update TX antconfig for all frames that are not unicast data
* (aka default TX)
*/
ant_cfg = antsel->ant_config[ANT_SELCFG_TX_DEF];
mimo_antsel = brcms_c_antsel_antcfg2antsel(asi, ant_cfg);
brcms_b_write_shm(wlc->hw, M_MIMO_ANTSEL_TXDFLT, mimo_antsel);
/*
* Update driver stats for currently selected
* default tx/rx antenna config
*/
asi->antcfg_cur.ant_config[ANT_SELCFG_TX_DEF] = ant_cfg;
/* 2) Update RX antconfig for all frames that are not unicast data
* (aka default RX)
*/
ant_cfg = antsel->ant_config[ANT_SELCFG_RX_DEF];
mimo_antsel = brcms_c_antsel_antcfg2antsel(asi, ant_cfg);
brcms_b_write_shm(wlc->hw, M_MIMO_ANTSEL_RXDFLT, mimo_antsel);
/*
* Update driver stats for currently selected
* default tx/rx antenna config
*/
asi->antcfg_cur.ant_config[ANT_SELCFG_RX_DEF] = ant_cfg;
return 0;
}
void wlapi_bmac_write_shm(struct phy_shim_info *physhim, uint offset, u16 v)
{
brcms_b_write_shm(physhim->wlc_hw, offset, v);
}
