void __devinit
smp_chrp_give_timebase(void)
{
spin_lock(&timebase_lock);
call_rtas("freeze-time-base", 0, 1, NULL);
timebase_upper = get_tbu();
timebase_lower = get_tbl();
spin_unlock(&timebase_lock);
while (timebase_upper || timebase_lower)
barrier();
call_rtas("thaw-time-base", 0, 1, NULL);
}
static void __init
smp_chrp_setup_cpu(int cpu_nr)
{
static atomic_t ready = ATOMIC_INIT(1);
static volatile int frozen = 0;
if (cpu_nr == 0) {
/* wait for all the others */
while (atomic_read(&ready) < smp_num_cpus)
barrier();
atomic_set(&ready, 1);
/* freeze the timebase */
call_rtas("freeze-time-base", 0, 1, NULL);
mb();
frozen = 1;
/* XXX assumes this is not a 601 */
set_tb(0, 0);
last_jiffy_stamp(0) = 0;
while (atomic_read(&ready) < smp_num_cpus)
barrier();
/* thaw the timebase again */
call_rtas("thaw-time-base", 0, 1, NULL);
mb();
frozen = 0;
smp_tb_synchronized = 1;
} else {
atomic_inc(&ready);
while (!frozen)
barrier();
set_tb(0, 0);
last_jiffy_stamp(0) = 0;
mb();
atomic_inc(&ready);
while (frozen)
barrier();
}
if (OpenPIC_Addr)
do_openpic_setup_cpu();
}
void
xics_disable_irq(
u_int irq
)
{
int status;
int call_status;
irq -= XICS_IRQ_OFFSET;
call_status = call_rtas("ibm,int-off", 1, 1, (ulong*)&status, irq);
if( call_status != 0 ) {
printk("xics_disable_irq: irq=%x: call_rtas failed, retn=%x\n",
irq, call_status);
return;
}
}
void
xics_enable_irq(
u_int irq
)
{
int status;
int call_status;
irq -= XICS_IRQ_OFFSET;
if (irq == XICS_IPI)
return;
call_status = call_rtas("ibm,set-xive", 3, 1, (ulong*)&status,
irq, DEFAULT_SERVER, DEFAULT_PRIORITY);
if( call_status != 0 ) {
printk("xics_enable_irq: irq=%x: call_rtas failed; retn=%x, status=%x\n",
irq, call_status, status);
return;
}
}
