static void ccdc_restore_defaults(void)
{
enum vpss_ccdc_source_sel source = VPSS_CCDCIN;
int i;
memcpy(&ccdc_cfg.bayer.config_params, &ccdc_config_defaults,
sizeof(struct ccdc_config_params_raw));
dev_dbg(dev, "\nstarting ccdc_restore_defaults...");
/* Enable clock to ISIF, IPIPEIF and BL */
vpss_enable_clock(VPSS_CCDC_CLOCK, 1);
vpss_enable_clock(VPSS_IPIPEIF_CLOCK, 1);
vpss_enable_clock(VPSS_BL_CLOCK, 1);
/* set all registers to default value */
for (i = 0; i <= 0x1f8; i += 4)
regw(0, i);
/* no culling support */
regw(0xffff, CULH);
regw(0xff, CULV);
/* Set default offset and gain */
ccdc_config_gain_offset();
vpss_select_ccdc_source(source);
dev_dbg(dev, "\nEnd of ccdc_restore_defaults...");
}
static void ccdc_reset(void)
{
int i, clkctrl;
/* disable CCDC */
printk(KERN_DEBUG "\nstarting ccdc_reset...");
ccdc_enable(0);
/* set all registers to default value */
for (i = 0; i <= 0x15c; i += 4)
regw(0, i);
/* no culling support */
regw(0xffff, CULH);
regw(0xff, CULV);
/* Set default Gain and Offset */
ccdc_hw_params_raw.gain.r_ye = 256;
ccdc_hw_params_raw.gain.gb_g = 256;
ccdc_hw_params_raw.gain.gr_cy = 256;
ccdc_hw_params_raw.gain.b_mg = 256;
ccdc_hw_params_raw.ccdc_offset = 0;
ccdc_config_gain_offset();
/* up to 12 bit sensor */
regw(0x0FFF, OUTCLIP);
vpss_dfc_memory_sel(VPSS_DFC_SEL_IPIPE);
regw_bl(0x00, CCDCMUX); /*CCDC input Mux select directly from sensor */
clkctrl = regr_bl(CLKCTRL);
clkctrl &= 0x3f;
clkctrl |= 0x40;
regw_bl(clkctrl, CLKCTRL);
printk(KERN_DEBUG "\nEnd of ccdc_reset...");
}
/*
* ccdc_restore_defaults()
* This function restore power on defaults in the ccdc registers
*/
static int ccdc_restore_defaults(void)
{
int i;
dev_dbg(dev, "\nstarting ccdc_restore_defaults...");
/* set all registers to zero */
for (i = 0; i <= CCDC_REG_LAST; i += 4)
regw(0, i);
/* now override the values with power on defaults in registers */
regw(MODESET_DEFAULT, MODESET);
/* no culling support */
regw(CULH_DEFAULT, CULH);
regw(CULV_DEFAULT, CULV);
/* Set default Gain and Offset */
ccdc_hw_params_raw.gain.r_ye = GAIN_DEFAULT;
ccdc_hw_params_raw.gain.gb_g = GAIN_DEFAULT;
ccdc_hw_params_raw.gain.gr_cy = GAIN_DEFAULT;
ccdc_hw_params_raw.gain.b_mg = GAIN_DEFAULT;
ccdc_config_gain_offset();
regw(OUTCLIP_DEFAULT, OUTCLIP);
regw(LSCCFG2_DEFAULT, LSCCFG2);
/* select ccdc input */
if (vpss_select_ccdc_source(VPSS_CCDCIN)) {
dev_dbg(dev, "\ncouldn't select ccdc input source");
return -EFAULT;
}
/* select ccdc clock */
if (vpss_enable_clock(VPSS_CCDC_CLOCK, 1) < 0) {
dev_dbg(dev, "\ncouldn't enable ccdc clock");
return -EFAULT;
}
dev_dbg(dev, "\nEnd of ccdc_restore_defaults...");
return 0;
}
static int ccdc_setcontrol(struct v4l2_control *ctrl)
{
int i;
struct v4l2_queryctrl *control = NULL;
struct ccdc_gain *gain =
&ccdc_hw_params_raw.gain;
if (NULL == ctrl) {
printk(KERN_ERR "ccdc_setcontrol: invalid user ptr\n");
return -EINVAL;
}
if (ccdc_if_type != CCDC_RAW_BAYER) {
printk(KERN_ERR
"ccdc_setcontrol: Not doing Raw Bayer Capture\n");
return -EINVAL;
}
for (i = 0; i < CCDC_MAX_CONTROLS; i++) {
control = &ccdc_control_info[i];
if (control->id == ctrl->id)
break;
}
if (i == CCDC_MAX_CONTROLS) {
printk(KERN_ERR "ccdc_queryctrl : Invalid control ID, 0x%x\n",
control->id);
return -EINVAL;
}
if (ctrl->value > control->maximum) {
printk(KERN_ERR "ccdc_queryctrl : Invalid control value\n");
return -EINVAL;
}
switch (ctrl->id) {
case CCDC_CID_R_GAIN:
gain->r_ye = ctrl->value & CCDC_GAIN_MASK;
break;
case CCDC_CID_GR_GAIN:
gain->gr_cy = ctrl->value & CCDC_GAIN_MASK;
break;
case CCDC_CID_GB_GAIN:
gain->gb_g = ctrl->value & CCDC_GAIN_MASK;
break;
case CCDC_CID_B_GAIN:
gain->b_mg = ctrl->value & CCDC_GAIN_MASK;
break;
default:
ccdc_hw_params_raw.ccdc_offset = ctrl->value & CCDC_OFFSET_MASK;
}
/* set it in hardware */
ccdc_config_gain_offset();
return 0;
}
