/**
* \brief Run TRNG unit tests
*
* Initializes the system and serial output, then sets up the
* TRNG unit test suite and runs it.
*/
int main(void)
{
system_init();
cdc_uart_init();
/* Define Test Cases */
DEFINE_TEST_CASE(trng_polling_read_test,
NULL,
run_trng_polling_read_test,
NULL,
"Testing TRNG polling read");
DEFINE_TEST_CASE(trng_callback_read_test,
NULL,
run_trng_callback_read_test,
NULL,
"Testing TRNG callback read");
/* Put test case addresses in an array */
DEFINE_TEST_ARRAY(trng_tests) = {
&trng_polling_read_test,
&trng_callback_read_test,
};
/* Define the test suite */
DEFINE_TEST_SUITE(trng_test_suite, trng_tests,
"SAM TRNG driver test suite");
/* Run all tests in the suite*/
test_suite_run(&trng_test_suite);
while (true) {
/* Intentionally left empty */
}
}
/**
* \brief Run TCC unit tests
*
* Initializes the system and serial output, then sets up the TCC unit test
* suite and runs it.
*/
int main(void)
{
system_init();
cdc_uart_init();
/* Define Test Cases */
DEFINE_TEST_CASE(init_test, NULL,
run_init_test, NULL,
"Initialize tcc_xmodules");
DEFINE_TEST_CASE(basic_functionality_test, NULL,
run_basic_functionality_test, NULL,
"test start stop and getters and setters");
DEFINE_TEST_CASE(callback_test, NULL,
run_callback_test, NULL,
"test callback API");
DEFINE_TEST_CASE(reset_test, NULL,
run_reset_test, NULL,
"Setup, reset TCC module");
DEFINE_TEST_CASE(capture_and_compare_test, NULL,
run_capture_and_compare_test, NULL,
"Test capture and compare");
DEFINE_TEST_CASE(faultx_test, NULL,
run_faultx_test, NULL,
"Test Non-Recoverable Fault");
DEFINE_TEST_CASE(faultn_test, NULL,
run_faultn_test, NULL,
"Test Recoverable Fault");
/* Put test case addresses in an array */
DEFINE_TEST_ARRAY(tcc_tests) = {
&init_test,
&basic_functionality_test,
&callback_test,
&reset_test,
&capture_and_compare_test,
&faultx_test,
&faultn_test,
};
/* Define the test suite */
DEFINE_TEST_SUITE(tcc_suite, tcc_tests,
"SAM D21/R21 TCC driver test suite");
/* Run all tests in the suite*/
test_suite_run(&tcc_suite);
tcc_reset(&tcc_test0_module);
tcc_reset(&tcc_test1_module);
while (true) {
/* Intentionally left empty */
}
}
/**
* \brief Run SPI unit tests
*
* Initializes the system and serial output, then sets up the
* SPI unit test suite and runs it.
*/
int main(void)
{
system_init();
cdc_uart_init();
cpu_irq_enable();
/* Fill the transmit buffers with some data */
for (uint16_t i = 0; i < BUFFER_LENGTH; i++) {
tx_buf[i] = i + 1;
slave_tx_buf[i] = i + 1;
}
/* Define Test Cases */
DEFINE_TEST_CASE(spi_init_test, NULL,
run_spi_init_test, NULL,
"Initialization test for SPI master & slave");
DEFINE_TEST_CASE(single_byte_polled_test, NULL,
run_single_byte_polled_test, NULL,
"Transfer single byte and readback by polling");
DEFINE_TEST_CASE(buffer_polled_write_interrupt_read_test,
setup_buffer_polled_write_interrupt_read_test,
run_buffer_polled_write_interrupt_read_test,
cleanup_buffer_polled_write_interrupt_read_test,
"Transfer bytes by polling and read back with interrupt");
DEFINE_TEST_CASE(transceive_buffer_test, NULL,
run_transceive_buffer_test, NULL,
"Transmit & receive bytes using transceive functions");
DEFINE_TEST_CASE(baud_test, NULL, run_baud_test, NULL,
"Transfer byte at different baud rates");
DEFINE_TEST_CASE(transfer_9bit_test, setup_transfer_9bit_test,
run_transfer_9bit_test, NULL,
"Transfer 9-bit character and readback by polling");
/* Put test case addresses in an array */
DEFINE_TEST_ARRAY(spi_tests) = {
&spi_init_test,
&single_byte_polled_test,
&buffer_polled_write_interrupt_read_test,
&transceive_buffer_test,
&baud_test,
&transfer_9bit_test,
};
/* Define the test suite */
DEFINE_TEST_SUITE(spi_test_suite, spi_tests,
"SAM SPI driver test suite");
/* Run all tests in the suite*/
test_suite_run(&spi_test_suite);
while (true) {
/* Intentionally left empty */
}
}
/**
* \brief Run ADC unit tests
*
* Initializes the system and serial output, then sets up the
* ADC unit test suite and runs it.
*/
int main(void)
{
system_init();
delay_init();
cdc_uart_init();
test_dac_init();
/* Define Test Cases */
DEFINE_TEST_CASE(adc_init_test,
NULL,
run_adc_init_test,
NULL,
"Testing ADC Initialization");
DEFINE_TEST_CASE(adc_polled_mode_test,
NULL,
run_adc_polled_mode_test,
NULL,
"Testing ADC single ended mode by polling");
DEFINE_TEST_CASE(adc_callback_mode_test,
setup_adc_callback_mode_test,
run_adc_callback_mode_test,
cleanup_adc_callback_mode_test,
"Testing ADC single ended mode by interrupt");
DEFINE_TEST_CASE(adc_average_mode_test,
setup_adc_average_mode_test,
run_adc_average_mode_test,
NULL,
"Testing ADC average mode");
DEFINE_TEST_CASE(adc_window_mode_test,
setup_adc_window_mode_test,
run_adc_window_mode_test,
cleanup_adc_window_mode_test,
"Testing ADC window mode");
/* Put test case addresses in an array */
DEFINE_TEST_ARRAY(adc_tests) = {
&adc_init_test,
&adc_polled_mode_test,
&adc_callback_mode_test,
&adc_average_mode_test,
&adc_window_mode_test,
};
/* Define the test suite */
DEFINE_TEST_SUITE(adc_test_suite, adc_tests,
"SAM ADC driver test suite");
/* Run all tests in the suite*/
test_suite_run(&adc_test_suite);
while (true) {
/* Intentionally left empty */
}
}
/**
* \brief Run WDT unit tests
*
* Initializes the system and serial output, then sets up the
* WDT unit test suite and runs it.
*/
int main(void)
{
/* Check whether reset cause was Watchdog */
#if (SAML21)
wdr_flag = (system_get_reset_cause() & RSTC_RCAUSE_WDT);
#else
wdr_flag = (system_get_reset_cause() & PM_RCAUSE_WDT);
#endif
system_init();
/* Reset the Watchdog count */
wdt_reset_count();
struct wdt_conf config_wdt;
/* Get the Watchdog default configuration */
wdt_get_config_defaults(&config_wdt);
if(wdr_flag) {
config_wdt.enable = false;
}
/* Set the desired configuration */
#if !(SAML21)
config_wdt.clock_source = CONF_WDT_GCLK_GEN;
#endif
config_wdt.timeout_period = CONF_WDT_TIMEOUT_PERIOD;
config_wdt.early_warning_period = CONF_WDT_EARLY_WARNING_PERIOD;
wdt_set_config(&config_wdt);
cdc_uart_init();
DEFINE_TEST_CASE(wdt_early_warning_test, NULL,
run_wdt_early_warning_test, wait_for_wdt_reset,
"WDT Early Warning Test");
DEFINE_TEST_CASE(reset_cause_test, NULL,
run_reset_cause_test, NULL,
"Confirming Watchdog Reset");
/* Put test case addresses in an array */
DEFINE_TEST_ARRAY(wdt_tests) = {
&wdt_early_warning_test,
&reset_cause_test,
};
/* Define the test suite */
DEFINE_TEST_SUITE(wdt_suite, wdt_tests,
"SAM WDT driver test suite");
/* Run all tests in the suite*/
test_suite_run(&wdt_suite);
while (1) {
/* Intentionally left empty */
}
}
/**
* \brief Application entry point.
*
* \return Unused (ANSI-C compatibility).
*/
int main(void)
{
uint8_t slot = 0;
sd_mmc_err_t err;
system_init();
delay_init();
cdc_uart_init();
irq_initialize_vectors();
cpu_irq_enable();
time_tick_init();
// Initialize SD MMC stack
sd_mmc_init();
printf("\x0C\n\r-- SD/MMC Card Example --\n\r");
printf("-- Compiled: %s %s --\n\r", __DATE__, __TIME__);
while (1) {
if (slot == sd_mmc_nb_slot()) {
slot = 0;
}
printf("Please plug an SD/MMC card in slot %d.\n\r", slot+1);
// Wait for a card and ready
do {
err = sd_mmc_check(slot);
if ((SD_MMC_ERR_NO_CARD != err)
&& (SD_MMC_INIT_ONGOING != err)
&& (SD_MMC_OK != err)) {
printf("Card install FAILED\n\r");
printf("Please unplug and re-plug the card.\n\r");
while (SD_MMC_ERR_NO_CARD != sd_mmc_check(slot)) {
}
}
} while (SD_MMC_OK != err);
// Display basic card information
main_display_info_card(slot);
/* Test the card */
if (sd_mmc_get_type(slot) & (CARD_TYPE_SD | CARD_TYPE_MMC)) {
// SD/MMC Card R/W
main_test_memory(slot);
}
printf("Test finished, please unplugged the card.\n\r");
while (SD_MMC_OK == sd_mmc_check(slot)) {
}
slot++;
}
}
int main(void)
{
system_init();
cdc_uart_init();
test_at25dfx_init();
DEFINE_TEST_CASE(check_presence_test, NULL,
run_check_presence_test, NULL,
"Testing presence checking");
DEFINE_TEST_CASE(read_write_buffer_test, NULL,
run_read_write_buffer_test, NULL,
"Testing read and write");
DEFINE_TEST_CASE(erase_test, NULL,
run_erase_test, NULL,
"Testing chip erase");
DEFINE_TEST_CASE(erase_block_test, NULL,
run_erase_block_test, NULL,
"Testing block erase");
DEFINE_TEST_CASE(global_sector_protect_test, NULL,
run_global_sector_protect_test, NULL,
"Testing global sector protect setting");
DEFINE_TEST_CASE(set_get_sector_protect_test, NULL,
run_set_get_sector_protect_test, NULL,
"Testing sector protect setting and getting");
DEFINE_TEST_CASE(sleep_wake_test, NULL,
run_sleep_wake_test, NULL,
"Testing sleep and wake");
DEFINE_TEST_ARRAY(at25dfx_tests) = {
&check_presence_test,
&read_write_buffer_test,
&erase_test,
&erase_block_test,
&global_sector_protect_test,
&set_get_sector_protect_test,
&sleep_wake_test,
};
DEFINE_TEST_SUITE(at25dfx_test_suite, at25dfx_tests,
"AT25DFx driver test suite");
test_suite_run(&at25dfx_test_suite);
while (true) {
/* Intentionally left empty */
}
}
/**
* \brief Run NVM unit tests
*
* Initializes the system and serial output, then sets up the
* NVM unit test suite and runs it.
*/
int main(void)
{
system_init();
cdc_uart_init();
/* Define Test Cases */
DEFINE_TEST_CASE(nvm_paramter_test, NULL,
run_nvm_parameter_test, NULL,
"NVM parameter check");
DEFINE_TEST_CASE(nvm_init_test, NULL,
run_nvm_init_test, NULL,
"NVM initialization");
DEFINE_TEST_CASE(nvm_erase_test, NULL,
run_nvm_erase_test, NULL,
"NVM erase row");
DEFINE_TEST_CASE(nvm_read_and_write_test, NULL,
run_nvm_read_and_write_test, NULL,
"NVM page read and write");
DEFINE_TEST_CASE(nvm_update_test, NULL,
run_nvm_update_test, NULL,
"NVM page update");
/* Put test case addresses in an array */
DEFINE_TEST_ARRAY(nvm_tests) = {
&nvm_paramter_test,
&nvm_init_test,
&nvm_erase_test,
&nvm_read_and_write_test,
&nvm_update_test,
};
/* Define the test suite */
DEFINE_TEST_SUITE(nvm_suite, nvm_tests,
"SAM NVM driver test suite");
/* Run all tests in the suite*/
test_suite_run(&nvm_suite);
while (1) {
/* Intentionally left empty */
}
}
/**
* \brief Run AC unit tests
*
* Initializes the system and serial output, then sets up the
* AC unit test suite and runs it.
*/
int main(void)
{
system_init();
delay_init();
cdc_uart_init();
test_dac_init();
/* Define Test Cases */
DEFINE_TEST_CASE(ac_init_test, NULL,
run_ac_init_test, NULL,
"Testing Analog Comparator Module Initialization");
DEFINE_TEST_CASE(ac_single_shot_test, NULL,
run_ac_single_shot_test, NULL,
"Testing AC single shot comparison");
DEFINE_TEST_CASE(ac_callback_mode_test,
setup_ac_callback_mode_test,
run_ac_callback_mode_test,
cleanup_ac_callback_mode_test,
"Testing AC callback mode");
DEFINE_TEST_CASE(ac_window_mode_test,
setup_ac_window_mode_test,
run_ac_window_mode_test, NULL,
"Testing AC window mode with single shot");
/* Put test case addresses in an array */
DEFINE_TEST_ARRAY(ac_tests) = {
&ac_init_test,
&ac_single_shot_test,
&ac_callback_mode_test,
&ac_window_mode_test,
};
/* Define the test suite */
DEFINE_TEST_SUITE(ac_test_suite, ac_tests,
"SAM AC driver test suite");
/* Run all tests in the suite*/
test_suite_run(&ac_test_suite);
while (true) {
/* Intentionally left empty */
}
}
/**
* \brief Run Event System unit tests
*
* Initializes the system and serial output, then sets up the
* Event system unit test suite and runs it.
*/
int main(void)
{
system_init();
cdc_uart_init();
test_event_gen_user_init();
/* Define Test Cases */
DEFINE_TEST_CASE(synchronous_event_test,
setup_synchronous_event_test,
run_synchronous_event_test,
cleanup_synchronous_event_test,
"Testing Synchronous Event Propagation");
DEFINE_TEST_CASE(resynchronous_event_test,
setup_resynchronous_event_test,
run_resynchronous_event_test,
cleanup_resynchronous_event_test,
"Testing Resynchronized Event Propagation");
DEFINE_TEST_CASE(asynchronous_event_test,
setup_asynchronous_event_test,
run_asynchronous_event_test,
cleanup_asynchronous_event_test,
"Testing Asynchronous Event Propagation");
/* Put test case addresses in an array */
DEFINE_TEST_ARRAY(events_tests) = {
&synchronous_event_test,
&resynchronous_event_test,
&asynchronous_event_test,
};
/* Define the test suite */
DEFINE_TEST_SUITE(events_test_suite, events_tests,
"SAM Event System driver test suite");
/* Run all tests in the suite*/
test_suite_run(&events_test_suite);
while (true) {
/* Intentionally left empty */
}
}
/**
* \brief Run EEPROM emulator unit tests
*
* Initializes the system and serial output, then sets up the
* EEPROM emulator unit test suite and runs it.
*/
int main(void)
{
system_init();
cdc_uart_init();
/* Define Test Cases */
DEFINE_TEST_CASE(eeprom_init_test, NULL,
run_eeprom_init_test, NULL,
"Testing EEPROM emulator initialization");
DEFINE_TEST_CASE(eeprom_buffer_read_write_test,
setup_eeprom_buffer_read_write_test,
run_eeprom_buffer_read_write_test, NULL,
"Testing EEPROM buffer read/write functionality");
DEFINE_TEST_CASE(eeprom_page_read_write_test,
setup_eeprom_page_read_write_test,
run_eeprom_page_read_write_test, NULL,
"Testing EEPROM page read/write functionality");
/* Put test case addresses in an array */
DEFINE_TEST_ARRAY(eeprom_tests) = {
&eeprom_init_test,
&eeprom_buffer_read_write_test,
&eeprom_page_read_write_test,
};
/* Define the test suite */
DEFINE_TEST_SUITE(eeprom_test_suite, eeprom_tests,
"SAM EEPROM emulator service test suite");
/* Run all tests in the suite*/
test_suite_run(&eeprom_test_suite);
while (true) {
/* Intentionally left empty */
}
}
/**
* \brief Run External Interrupt unit tests
*
* Initializes the system and serial output, then sets up the
* External Interrupt unit test suite and runs it.
*/
int main(void)
{
system_init();
delay_init();
cdc_uart_init();
/* Define Test Cases */
DEFINE_TEST_CASE(extint_polled_mode_test,
setup_extint_polled_mode_test,
run_extint_polled_mode_test,
cleanup_extint_polled_mode_test,
"Testing external interrupt by polling");
DEFINE_TEST_CASE(extint_callback_mode_test,
setup_extint_callback_mode_test,
run_extint_callback_mode_test,
cleanup_extint_callback_mode_test,
"Testing external interrupt using callback");
/* Put test case addresses in an array */
DEFINE_TEST_ARRAY(extint_tests) = {
&extint_polled_mode_test,
&extint_callback_mode_test,
};
/* Define the test suite */
DEFINE_TEST_SUITE(extint_test_suite, extint_tests,
"SAM D20/D21 External Interrupt driver test suite");
/* Run all tests in the suite*/
test_suite_run(&extint_test_suite);
while (true) {
/* Intentionally left empty */
}
}
/**
* \internal
* \brief Test for I2C master transfer.
*
* First test transfer function with stop.
* write to slave, read from slave and then compare the data.
* the slave send out the data it received,
* so master write and read data should be the same.
*
* Then test transfer function without stop.
* write to slave, then use i2c_master_send_stop to complete writing,
* read from slave, compare the data.
* finally, use function with stop to complete the transfer.
*
* \param test Current test case.
*/
static void run_i2c_master_transfer_test(const struct test_case *test)
{
uint32_t timeout_cycles = 1000;
uint32_t i;
bool status = true;
uint8_t read_buffer[DATA_LENGTH] = {0};
struct i2c_master_packet packet = {
.address = SLAVE_ADDRESS,
.data_length = DATA_LENGTH,
.data = write_buffer,
.ten_bit_address = false,
.high_speed = false,
.hs_master_code = 0x0,
};
/* with stop function: master transfer test */
/* wait the master write to complete */
do {
timeout_cycles--;
if (i2c_master_write_packet_wait(&i2c_master_instance, &packet) ==
STATUS_OK) {
break;
}
} while (timeout_cycles > 0);
test_assert_true(test, timeout_cycles > 0,
"i2c master write failed");
/* wait the master read to complete */
packet.data = read_buffer;
timeout_cycles = 1000;
do {
timeout_cycles--;
if (i2c_master_read_packet_wait(&i2c_master_instance, &packet) ==
STATUS_OK) {
break;
}
} while (timeout_cycles > 0);
test_assert_true(test, timeout_cycles > 0,
"i2c master read failed");
/* Compare the sent and the received */
for (i = 0; i < DATA_LENGTH; i++) {
if (read_buffer[i] != write_buffer[i]) {
status = false;
break;
}
}
test_assert_true(test, status == true,
"i2c master transfer comparsion failed");
/* with stop function master transfer test end */
/* without stop function: master transfer test*/
/* wait the master write to finish */
packet.data = write_buffer;
timeout_cycles = 1000;
do {
timeout_cycles--;
if (i2c_master_write_packet_wait_no_stop(&i2c_master_instance, &packet) ==
STATUS_OK) {
break;
}
} while (timeout_cycles > 0);
test_assert_true(test, timeout_cycles > 0,
"i2c master write without stop failed");
/* use i2c_master_send_stop to complete master writing */
i2c_master_send_stop(&i2c_master_instance);
/* wait the master read to finish */
packet.data = read_buffer;
timeout_cycles = 1000;
do {
timeout_cycles--;
if (i2c_master_read_packet_wait_no_stop(&i2c_master_instance, &packet) ==
STATUS_OK) {
break;
}
} while (timeout_cycles > 0);
test_assert_true(test, timeout_cycles > 0,
"i2c master read without stop failed");
/* Compare the sent and the received */
for (i = 0; i < DATA_LENGTH; i++) {
if (read_buffer[i] != write_buffer[i]) {
status = false;
break;
}
}
test_assert_true(test, status == true,
"i2c master transfer without stop comparsion failed");
/* use i2c_master_write_packet_wait to complete the transfer */
packet.data = write_buffer;
do {
timeout_cycles--;
if (i2c_master_write_packet_wait(&i2c_master_instance, &packet) ==
STATUS_OK) {
break;
}
} while (timeout_cycles > 0);
test_assert_true(test, timeout_cycles > 0,
"i2c master write with repeated start failed");
/* without stop function: master transfer test end*/
}
/**
* \internal
* \brief Test full speed mode master transfer.
*
* test function with stop in full speed mode.
* \param test Current test case.
*/
static void run_i2c_full_speed_test(const struct test_case *test)
{
enum status_code status;
struct i2c_master_config config_i2c_master;
/* init i2c master in full speed mode*/
i2c_master_get_config_defaults(&config_i2c_master);
config_i2c_master.buffer_timeout = 10000;
config_i2c_master.baud_rate = I2C_MASTER_BAUD_RATE_400KHZ;
i2c_master_disable(&i2c_master_instance);
status = i2c_master_init(&i2c_master_instance, SERCOM2, &config_i2c_master);
/* Check for successful initialization */
test_assert_true(test, status == STATUS_OK,
"I2C master fast-mode initialization failed");
i2c_master_enable(&i2c_master_instance);
uint32_t timeout_cycles = 1000;
uint32_t i;
bool status1 = true;
struct i2c_master_packet packet = {
.address = SLAVE_ADDRESS,
.data_length = DATA_LENGTH,
.data = write_buffer,
.ten_bit_address = false,
.high_speed = false,
.hs_master_code = 0x0,
};
uint8_t read_buffer[DATA_LENGTH] = {0};
/* wait master write complete */
do {
timeout_cycles--;
if (i2c_master_write_packet_wait(&i2c_master_instance, &packet) ==
STATUS_OK) {
break;
}
} while (timeout_cycles > 0);
test_assert_true(test, timeout_cycles > 0,
"i2c master write failed");
/* wait master read complete */
packet.data = read_buffer;
timeout_cycles = 1000;
do {
timeout_cycles--;
if (i2c_master_read_packet_wait(&i2c_master_instance, &packet) ==
STATUS_OK) {
break;
}
} while (timeout_cycles > 0);
test_assert_true(test, timeout_cycles > 0,
"i2c master read failed");
/* Compare the sent and the received */
for (i = 0; i < DATA_LENGTH; i++) {
if (read_buffer[i] != write_buffer[i]) {
status1 = false;
break;
}
}
test_assert_true(test, status1 == true,
"i2c master transfer comparsion failed");
}
/**
* \brief Run I2C master unit tests
*
* Initializes the system and serial output, then sets up the
* I2C master unit test suite and runs it.
*/
int main(void)
{
system_init();
cdc_uart_init();
/* Define Test Cases */
DEFINE_TEST_CASE(i2c_init_test,
NULL,
run_i2c_init_test,
NULL,
"Testing I2C Initialization");
DEFINE_TEST_CASE(i2c_master_transfer_test,
NULL,
run_i2c_master_transfer_test,
NULL,
"Testing I2C master data transfer");
DEFINE_TEST_CASE(i2c_full_speed_test,
NULL,
run_i2c_full_speed_test,
NULL,
"Testing I2C change speed transfer");
/* Put test case addresses in an array */
DEFINE_TEST_ARRAY(i2c_tests) = {
&i2c_init_test,
&i2c_master_transfer_test,
&i2c_full_speed_test,
};
/* Define the test suite */
DEFINE_TEST_SUITE(i2c_test_suite, i2c_tests,
"SAM I2C driver test suite");
/* Run all tests in the suite*/
test_suite_run(&i2c_test_suite);
while (true) {
/* Intentionally left empty */
}
}
/**
* \internal
* \brief Test capture and compare
*
* This test uses TC module 0 as a PWM generator (compare function).
* TC module 1 will be set to capture the signal from TC module 0 to test the capture
* functionality.
*
* \param test Current test case.
*/
static void run_16bit_capture_and_compare_test(const struct test_case *test)
{
test_assert_true(test,
tc_init_success == true,
"TC initialization failed, skipping test");
test_assert_true(test,
callback_function_entered == 1,
"The callback test has failed, skipping test");
/* Configure 16-bit TC module for PWM generation */
tc_reset(&tc_test0_module);
tc_get_config_defaults(&tc_test0_config);
tc_test0_config.wave_generation = TC_WAVE_GENERATION_MATCH_PWM;
tc_test0_config.counter_16_bit.compare_capture_channel[TC_COMPARE_CAPTURE_CHANNEL_0] = 0x03FF;
tc_test0_config.counter_16_bit.compare_capture_channel[TC_COMPARE_CAPTURE_CHANNEL_1] = 0x01FF;
/* Calculate the theoretical PWM frequency & duty */
uint32_t frequency_output, duty_output;
frequency_output = system_clock_source_get_hz(SYSTEM_CLOCK_SOURCE_OSC8M)/ (0x03FF+1);
/* This value is depend on the WaveGeneration Mode */
duty_output = (uint32_t)(tc_test0_config.counter_16_bit.compare_capture_channel[TC_COMPARE_CAPTURE_CHANNEL_1]) * 100 \
/ tc_test0_config.counter_16_bit.compare_capture_channel[TC_COMPARE_CAPTURE_CHANNEL_0];
tc_test0_config.pwm_channel[TC_COMPARE_CAPTURE_CHANNEL_1].enabled = true;
tc_test0_config.pwm_channel[TC_COMPARE_CAPTURE_CHANNEL_1].pin_out = CONF_TEST_PIN_OUT;
tc_test0_config.pwm_channel[TC_COMPARE_CAPTURE_CHANNEL_1].pin_mux = CONF_TEST_PIN_MUX;
tc_init(&tc_test0_module, CONF_TEST_TC0, &tc_test0_config);
tc_register_callback(&tc_test0_module, tc_callback_function, TC_CALLBACK_CC_CHANNEL0);
tc_enable_callback(&tc_test0_module, TC_CALLBACK_CC_CHANNEL0);
/* Configure 16-bit TC module for capture */
tc_reset(&tc_test1_module);
tc_get_config_defaults(&tc_test1_config);
tc_test1_config.clock_prescaler = TC_CLOCK_PRESCALER_DIV1;
tc_test1_config.enable_capture_on_channel[CONF_CAPTURE_CHAN_0] = true;
tc_test1_config.enable_capture_on_channel[CONF_CAPTURE_CHAN_1] = true;
tc_init(&tc_test1_module, CONF_TEST_TC1, &tc_test1_config);
struct tc_events tc_events = { .on_event_perform_action = true,
.event_action = TC_EVENT_ACTION_PPW,};
tc_enable_events(&tc_test1_module, &tc_events);
/* Configure external interrupt controller */
struct extint_chan_conf extint_chan_config;
extint_chan_config.gpio_pin = CONF_EIC_PIN;
extint_chan_config.gpio_pin_mux = CONF_EIC_MUX;
extint_chan_config.gpio_pin_pull = EXTINT_PULL_UP;
extint_chan_config.wake_if_sleeping = false;
extint_chan_config.filter_input_signal = false;
extint_chan_config.detection_criteria = EXTINT_DETECT_HIGH;
extint_chan_set_config(0, &extint_chan_config);
/* Configure external interrupt module to be event generator */
struct extint_events extint_event_conf;
extint_event_conf.generate_event_on_detect[0] = true;
extint_enable_events(&extint_event_conf);
/* Configure event system */
struct events_resource event_res;
/* Configure channel */
struct events_config config;
events_get_config_defaults(&config);
config.generator = CONF_EVENT_GENERATOR_ID;
config.edge_detect = EVENTS_EDGE_DETECT_NONE;
config.path = EVENTS_PATH_ASYNCHRONOUS;
events_allocate(&event_res, &config);
/* Configure user */
events_attach_user(&event_res, CONF_EVENT_USED_ID);
/* Enable TC modules */
tc_enable(&tc_test1_module);
tc_enable(&tc_test0_module);
uint16_t period_after_capture = 0;
uint16_t pulse_width_after_capture = 0;
uint32_t capture_frequency = 0;
uint32_t capture_duty = 0;
while (callback_function_entered < 4) {
period_after_capture = tc_get_capture_value(&tc_test1_module,
TC_COMPARE_CAPTURE_CHANNEL_0);
pulse_width_after_capture = tc_get_capture_value(&tc_test1_module,
TC_COMPARE_CAPTURE_CHANNEL_1);
}
if(period_after_capture != 0) {
capture_frequency = system_clock_source_get_hz(SYSTEM_CLOCK_SOURCE_OSC8M)/ period_after_capture;
capture_duty = (uint32_t)(pulse_width_after_capture) * 100 / period_after_capture;
}
test_assert_true(test,
(capture_frequency <= (frequency_output * (100 + CONF_TEST_TOLERANCE) / 100)) && \
(capture_frequency >= (frequency_output * (100 - CONF_TEST_TOLERANCE) / 100)) && \
(capture_duty <= (duty_output * (100 + CONF_TEST_TOLERANCE) / 100)) && \
(capture_duty >= (duty_output * (100 - CONF_TEST_TOLERANCE) / 100)) \
,"The result of Capture is wrong, captured frequency: %ldHz, captured duty: %ld%%",
capture_frequency,
capture_duty
);
}
/**
* \brief Initialize the USART for unit test
*
* Initializes the SERCOM USART used for sending the unit test status to the
* computer via the EDBG CDC gateway.
*/
static void cdc_uart_init(void)
{
struct usart_config usart_conf;
/* Configure USART for unit test output */
usart_get_config_defaults(&usart_conf);
usart_conf.mux_setting = CONF_STDIO_MUX_SETTING;
usart_conf.pinmux_pad0 = CONF_STDIO_PINMUX_PAD0;
usart_conf.pinmux_pad1 = CONF_STDIO_PINMUX_PAD1;
usart_conf.pinmux_pad2 = CONF_STDIO_PINMUX_PAD2;
usart_conf.pinmux_pad3 = CONF_STDIO_PINMUX_PAD3;
usart_conf.baudrate = CONF_STDIO_BAUDRATE;
stdio_serial_init(&cdc_uart_module, CONF_STDIO_USART, &usart_conf);
usart_enable(&cdc_uart_module);
}
/**
* \brief Run TC unit tests
*
* Initializes the system and serial output, then sets up the TC unit test
* suite and runs it.
*/
int main(void)
{
system_init();
cdc_uart_init();
/* Define Test Cases */
DEFINE_TEST_CASE(init_test, NULL,
run_init_test, NULL,
"Initialize tc_xmodules");
DEFINE_TEST_CASE(basic_functionality_test, NULL,
run_basic_functionality_test, NULL,
"test start stop and getters and setters");
DEFINE_TEST_CASE(callback_test, NULL,
run_callback_test, NULL,
"test callback API");
DEFINE_TEST_CASE(reset_32bit_master_test, NULL,
run_reset_32bit_master_test, NULL,
"Setup, reset and reinitialize TC modules of a 32-bit TC");
DEFINE_TEST_CASE(capture_and_compare_test, NULL,
run_16bit_capture_and_compare_test, NULL,
"Test capture and compare");
/* Put test case addresses in an array */
DEFINE_TEST_ARRAY(tc_tests) = {
&init_test,
&basic_functionality_test,
&callback_test,
&reset_32bit_master_test,
&capture_and_compare_test,
};
/* Define the test suite */
DEFINE_TEST_SUITE(tc_suite, tc_tests,
"SAM TC driver test suite");
/* Run all tests in the suite*/
test_suite_run(&tc_suite);
tc_reset(&tc_test0_module);
tc_reset(&tc_test1_module);
while (true) {
/* Intentionally left empty */
}
}
/**
* \brief Run usb host core unit tests
*
* Initializes the clock system, board and serial output, then sets up the
* usb unit test suite and runs it.
*/
int main(void)
{
#if SAMD21
system_init();
delay_init();
cdc_uart_init();
#else
const usart_serial_options_t usart_serial_options = {
.baudrate = CONF_TEST_BAUDRATE,
.charlength = CONF_TEST_CHARLENGTH,
.paritytype = CONF_TEST_PARITY,
.stopbits = CONF_TEST_STOPBITS,
};
sysclk_init();
board_init();
delay_init(sysclk_get_cpu_hz());
stdio_serial_init(CONF_TEST_USART, &usart_serial_options);
#endif
irq_initialize_vectors();
cpu_irq_enable();
// Initialize the sleep manager
sleepmgr_init();
// Define all the timestamp to date test cases
DEFINE_TEST_CASE(usb_test_start, NULL, run_test_start_uhc, NULL, "Start host stack");
DEFINE_TEST_CASE(usb_test_stop, NULL, run_test_stop_uhc, NULL, "Stop host stack");
DEFINE_TEST_CASE(usb_test_1 , NULL, run_test_enum_fail ,
NULL, "1 - Attach and no response");
DEFINE_TEST_CASE(usb_test_2 , NULL, run_test_enum_fail ,
NULL, "2 - Disable endpoint 0 after first setup packet");
DEFINE_TEST_CASE(usb_test_3 , NULL, run_test_disconnection ,
NULL, "3 - Detach after first setup packet");
DEFINE_TEST_CASE(usb_test_4 , NULL, run_test_disconnection ,
NULL, "4 - No response data (NACK IN) after first setup packet");
DEFINE_TEST_CASE(usb_test_5 , NULL, run_test_disconnection ,
NULL, "5 - Detach after IN data phase of first setup request");
DEFINE_TEST_CASE(usb_test_6 , NULL, run_test_enum_fail ,
NULL, "6 - Wrong value in first setup request get descriptor");
DEFINE_TEST_CASE(usb_test_7 , NULL, run_test_disconnection ,
NULL, "7 - Detach before reset");
DEFINE_TEST_CASE(usb_test_8 , NULL, run_test_disconnection ,
NULL, "8 - Detach during reset after first setup request get descriptor");
DEFINE_TEST_CASE(usb_test_9 , NULL, run_test_disconnection ,
NULL, "9 - Detach after reset after first setup request get descriptor");
DEFINE_TEST_CASE(usb_test_10, NULL, run_test_disconnection,
NULL, "10 - No send ZLP (NAK IN) after second setup packet (set address)");
DEFINE_TEST_CASE(usb_test_11, NULL, run_test_enum_fail,
NULL, "11 - Wrong value in first setup request get configuration 0");
DEFINE_TEST_CASE(usb_test_12, NULL, run_test_enum_fail,
NULL, "12 - Wrong transfer value in second setup request get configuration 0");
DEFINE_TEST_CASE(usb_test_13, NULL, run_test_enum_overcurrent,
NULL, "13 - Too high power consumption in setup request get configuration 0");
DEFINE_TEST_CASE(usb_test_14, NULL, run_test_enum_unsupported,
NULL, "14 - No supported interface (interface subclass not possible)");
#ifndef TST_15_DIS
DEFINE_TEST_CASE(usb_test_15, NULL, run_test_enum_hardwarelimit,
NULL, "15 - HID mouse with too large endpoint size (hardware limit)");
#endif
DEFINE_TEST_CASE(usb_test_16, NULL, run_test_enum_fail,
NULL, "16 - Stall SET CONFIGURATION (Note SELF/300mA is tested)");
DEFINE_TEST_CASE(usb_test_17ls, NULL, run_test_enum_success_ls,
NULL, "17 - Regular LS enumeration");
DEFINE_TEST_CASE(usb_test_17fs, NULL, run_test_enum_success_fs,
NULL, "17 - Regular FS enumeration");
DEFINE_TEST_CASE(usb_test_17hs, NULL, run_test_enum_success_hs,
NULL, "17 - Regular HS enumeration");
DEFINE_TEST_CASE(usb_test_18, NULL, run_test_downstream,
NULL, "18 - Regular downstream (from Host)");
DEFINE_TEST_CASE(usb_test_19, NULL, run_test_downstream_disconnection,
NULL, "19 - Regular disconnection during downstream (from Host)");
DEFINE_TEST_CASE(usb_test_20ls, NULL, run_test_upstream_ls,
NULL, "20 - Regular upstream (from Device)");
DEFINE_TEST_CASE(usb_test_20fs, NULL, run_test_upstream_fs,
NULL, "20 - Regular upstream (from Device)");
DEFINE_TEST_CASE(usb_test_20hs, NULL, run_test_upstream_hs,
NULL, "20 - Regular upstream (from Device)");
DEFINE_TEST_CASE(usb_test_21, NULL, run_test_disconnection_in_suspend,
NULL, "21 - Regular disconnection during USB suspend mode");
// Put test case addresses in an array
DEFINE_TEST_ARRAY(usb_host_tests_host) = {
&usb_test_start,
// Low speed tests
&usb_test_1 ,
&usb_test_2 ,
&usb_test_3 ,
&usb_test_4 ,
&usb_test_5 ,
&usb_test_6 ,
&usb_test_7 ,
&usb_test_8 ,
&usb_test_9 ,
&usb_test_10,
&usb_test_11,
&usb_test_12,
&usb_test_13,
&usb_test_14,
#ifndef TST_15_DIS
&usb_test_15,
#endif
&usb_test_16,
&usb_test_17ls,
#ifndef TST_18_DIS
&usb_test_18,
#endif
&usb_test_19,
&usb_test_20ls,
&usb_test_21,
// Full speed tests
&usb_test_1 ,
&usb_test_2 ,
&usb_test_3 ,
&usb_test_4 ,
&usb_test_5 ,
&usb_test_6 ,
&usb_test_7 ,
&usb_test_8 ,
&usb_test_9 ,
&usb_test_10,
&usb_test_11,
&usb_test_12,
&usb_test_13,
&usb_test_14,
#ifndef TST_15_DIS
&usb_test_15,
#endif
&usb_test_16,
&usb_test_17fs,
#ifndef TST_18_DIS
&usb_test_18,
#endif
&usb_test_19,
&usb_test_20fs,
&usb_test_21,
// High speed tests
&usb_test_1 ,
&usb_test_2 ,
&usb_test_3 ,
&usb_test_4 ,
&usb_test_5 ,
&usb_test_6 ,
&usb_test_7 ,
&usb_test_8 ,
&usb_test_9 ,
&usb_test_10,
&usb_test_11,
&usb_test_12,
&usb_test_13,
&usb_test_14,
#ifndef TST_15_DIS
&usb_test_15,
#endif
&usb_test_16,
#ifndef USB_HOST_HS_SUPPORT
&usb_test_17fs,
#else
&usb_test_17hs,
#endif
#ifndef TST_18_DIS
&usb_test_18,
#endif
&usb_test_19,
#ifndef USB_HOST_HS_SUPPORT
&usb_test_20fs,
#else
&usb_test_20hs,
#endif
&usb_test_21,
&usb_test_stop,
};
// Define the test suite
DEFINE_TEST_SUITE(usb_host_suite_host, usb_host_tests_host,
"Common usb host service test suite");
// The unit test prints message via UART which does not support deep sleep mode.
#if SAM
sleepmgr_lock_mode(SLEEPMGR_ACTIVE);
#else
sleepmgr_lock_mode(SLEEPMGR_IDLE);
#endif
// Run all tests in the suite
test_suite_run(&usb_host_suite_host);
while (1) {
// Intentionally left empty.
}
}
