Exemplo n.º 1
0
static void __init cf_e320n_v2_setup(void)
{
	cf_exxxn_common_setup(0x10000, CF_E320N_V2_GPIO_EXT_WDT);

	cf_exxxn_qca953x_eth_setup();

	/* Disable JTAG (enables GPIO0-3) */
	ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE);

	ath79_gpio_direction_select(CF_E320N_V2_GPIO_LED_LAN, true);
	ath79_gpio_direction_select(CF_E320N_V2_GPIO_LED_WAN, true);
	ath79_gpio_direction_select(CF_E320N_V2_GPIO_LED_WLAN, true);

	ath79_gpio_output_select(CF_E320N_V2_GPIO_LED_LAN, 0);
	ath79_gpio_output_select(CF_E320N_V2_GPIO_LED_WAN, 0);
	ath79_gpio_output_select(CF_E320N_V2_GPIO_LED_WLAN, 0);

	/* Enable GPIO function for GPIOs in J9 header */
	ath79_gpio_output_select(CF_E320N_V2_GPIO_HEADER_J9_1, 0);
	ath79_gpio_output_select(CF_E320N_V2_GPIO_HEADER_J9_2, 0);
	ath79_gpio_output_select(CF_E320N_V2_GPIO_HEADER_J9_3, 0);
	ath79_gpio_output_select(CF_E320N_V2_GPIO_HEADER_J9_4, 0);

	ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e320n_v2_leds_gpio),
				 cf_e320n_v2_leds_gpio);

	ath79_register_gpio_keys_polled(-1, CF_EXXXN_KEYS_POLL_INTERVAL,
					ARRAY_SIZE(cf_e320n_v2_gpio_keys),
					cf_e320n_v2_gpio_keys);
}
Exemplo n.º 2
0
static void __init cf_e530n_setup(void)
{
	cf_exxxn_common_setup(0x10000, -1);

	cf_exxxn_qca953x_eth_setup();

	cf_e5x0n_gpio_setup();

	ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e530n_leds_gpio),
				 cf_e530n_leds_gpio);
}
Exemplo n.º 3
0
static void __init cf_e380ac_v1v2_common_setup(unsigned long art_ofs)
{
	u8 *mac = (u8 *) KSEG1ADDR(0x1f000000 + art_ofs);

	cf_exxxn_common_setup(art_ofs, CF_E380AC_V1V2_GPIO_EXT_WDT);

	ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);

	ath79_register_mdio(0, 0x0);
	mdiobus_register_board_info(cf_e380ac_v1v2_mdio0_info,
				    ARRAY_SIZE(cf_e380ac_v1v2_mdio0_info));

	/* LAN */
	ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
	ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
	ath79_eth0_data.phy_mask = BIT(0);
	ath79_eth0_pll_data.pll_1000 = 0xbe000000;
	ath79_eth0_pll_data.pll_100 = 0xb0000101;
	ath79_eth0_pll_data.pll_10 = 0xb0001313;
	ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
	ath79_register_eth(0);

	ap91_pci_init(mac + 0x5000, NULL);

	/* Disable JTAG (enables GPIO0-3) */
	ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE);

	ath79_gpio_direction_select(CF_E380AC_V1V2_GPIO_LED_LAN, true);
	ath79_gpio_direction_select(CF_E380AC_V1V2_GPIO_LED_WLAN2G, true);
	ath79_gpio_direction_select(CF_E380AC_V1V2_GPIO_LED_WLAN5G, true);

	ath79_gpio_output_select(CF_E380AC_V1V2_GPIO_LED_LAN, 0);
	ath79_gpio_output_select(CF_E380AC_V1V2_GPIO_LED_WLAN2G, 0);
	ath79_gpio_output_select(CF_E380AC_V1V2_GPIO_LED_WLAN5G, 0);

	/* For J7-4 */
	ath79_gpio_function_disable(AR934X_GPIO_FUNC_CLK_OBS4_EN);

	ath79_register_gpio_keys_polled(-1, CF_EXXXN_KEYS_POLL_INTERVAL,
					ARRAY_SIZE(cf_e380ac_v1v2_gpio_keys),
					cf_e380ac_v1v2_gpio_keys);
}
Exemplo n.º 4
0
static void __init cf_e355ac_setup(void)
{
	u8 *art = (u8 *) KSEG1ADDR(0x1f010000);

	/* Disable JTAG, enabling GPIOs 0-3 */
	ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE, 0);

	cf_exxxn_common_setup(0x10000, CF_E355AC_GPIO_EXT_WDT);

	cf_exxxn_qca953x_eth_setup();

	ath79_gpio_output_select(CF_E355AC_GPIO_LED_LAN, 0);
	ath79_gpio_output_select(CF_E355AC_GPIO_LED_WLAN2G, 0);
	ath79_gpio_output_select(CF_E355AC_GPIO_LED_WLAN5G, 0);

	ap91_pci_init(art + 0x5000, NULL);

	ath79_register_gpio_keys_polled(1, CF_EXXXN_KEYS_POLL_INTERVAL,
					ARRAY_SIZE(cf_e355ac_gpio_keys),
					cf_e355ac_gpio_keys);
}
Exemplo n.º 5
0
static void __init cf_e316n_v2_setup(void)
{
	u8 *mac = (u8 *) KSEG1ADDR(0x1f010000);

	cf_exxxn_common_setup(0x10000, CF_E316N_V2_GPIO_EXT_WDT);

	ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP);

	ath79_register_mdio(1, 0x0);

	/* GMAC0 is connected to the PHY0 of the internal switch */
	ath79_switch_data.phy4_mii_en = 1;
	ath79_switch_data.phy_poll_mask = BIT(0);
	ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
	ath79_eth0_data.phy_mask = BIT(0);
	ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
	ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
	ath79_register_eth(0);

	/* GMAC1 is connected to the internal switch */
	ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
	ath79_init_mac(ath79_eth1_data.mac_addr, mac, 2);
	ath79_register_eth(1);

	/* Enable 2x Skyworks SE2576L WLAN power amplifiers */
	gpio_request_one(CF_E316N_V2_GPIO_EXTERNAL_PA0, GPIOF_OUT_INIT_HIGH,
			 "WLAN PA0");
	gpio_request_one(CF_E316N_V2_GPIO_EXTERNAL_PA1, GPIOF_OUT_INIT_HIGH,
			 "WLAN PA1");

	ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e316n_v2_leds_gpio),
				 cf_e316n_v2_leds_gpio);

	ath79_register_gpio_keys_polled(1, CF_EXXXN_KEYS_POLL_INTERVAL,
					ARRAY_SIZE(cf_e316n_v2_gpio_keys),
					cf_e316n_v2_gpio_keys);
}
Exemplo n.º 6
0
static void __init cf_e38xac_common_setup(unsigned long art_ofs)
{
	cf_exxxn_common_setup(art_ofs, CF_E38XAC_GPIO_EXT_WDT);

	ath79_register_pci();

	/* Disable JTAG (enables GPIO0-3) */
	ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE);

	ath79_gpio_direction_select(CF_E38XAC_GPIO_LED_LAN, true);
	ath79_gpio_direction_select(CF_E38XAC_GPIO_LED_WLAN2G, true);
	ath79_gpio_direction_select(CF_E38XAC_GPIO_LED_WLAN5G, true);

	ath79_gpio_output_select(CF_E38XAC_GPIO_LED_LAN, 0);
	ath79_gpio_output_select(CF_E38XAC_GPIO_LED_WLAN2G, 0);
	ath79_gpio_output_select(CF_E38XAC_GPIO_LED_WLAN5G, 0);

	/* For J7-4 */
	ath79_gpio_function_disable(AR934X_GPIO_FUNC_CLK_OBS4_EN);

	ath79_register_gpio_keys_polled(-1, CF_EXXXN_KEYS_POLL_INTERVAL,
					ARRAY_SIZE(cf_e38xac_gpio_keys),
					cf_e38xac_gpio_keys);
}
Exemplo n.º 7
0
static void __init cf_e375ac_setup(void)
{
	u8 *mac = (u8 *) KSEG1ADDR(0x1f040000);

	/* Disable JTAG, enabling GPIOs 0-3 */
	ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE, 0);

	cf_exxxn_common_setup(0x40000, CF_E375AC_GPIO_EXT_WDT);

	ath79_gpio_output_select(CF_E375AC_GPIO_LED_LAN, 0);
	ath79_gpio_output_select(CF_E375AC_GPIO_LED_WLAN2G, 0);
	ath79_gpio_output_select(CF_E375AC_GPIO_LED_WLAN5G, 0);

	ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e375ac_leds_gpio),
				 cf_e375ac_leds_gpio);

	ath79_register_gpio_keys_polled(-1, CF_EXXXN_KEYS_POLL_INTERVAL,
					ARRAY_SIZE(cf_e375ac_gpio_keys),
					cf_e375ac_gpio_keys);

	platform_device_register(&ath79_mdio0_device);

	mdiobus_register_board_info(cf_e375ac_mdio0_info,
				    ARRAY_SIZE(cf_e375ac_mdio0_info));

	/* GMAC0 is connected to an AR8337 switch */
	ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
	ath79_eth0_data.speed = SPEED_1000;
	ath79_eth0_data.duplex = DUPLEX_FULL;
	ath79_eth0_data.phy_mask = BIT(0);
	ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
	ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
	ath79_register_eth(0);

	ath79_register_pci();
}