inline void cicad_send_bit(unsigned char val) {
#ifdef DEBUG
change_bit(P1OUT, LED, val); //Show if outputting on the led
#endif
change_bit(P1DIR, CICAD_PIN, val); //Enable outputting on the bus, therefore dominating it
cicad_sending_bit=val; //Remember what we're sending
}
static ssize_t
set_pwr_down(struct device *_dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct msm_otg *dev = the_msm_otg;
int value;
enum usb_otg_state state;
spin_lock_irq(&dev->lock);
state = dev->otg.state;
spin_unlock_irq(&dev->lock);
/* Applicable for only A-Device */
if (state <= OTG_STATE_A_IDLE)
return -EINVAL;
sscanf(buf, "%d", &value);
if (test_bit(A_BUS_DROP, &dev->inputs) != !!value) {
change_bit(A_BUS_DROP, &dev->inputs);
wake_lock(&dev->wlock);
queue_work(dev->wq, &dev->sm_work);
}
return count;
}
irqreturn_t mxr_irq_handler(int irq, void *dev_data)
{
struct mxr_device *mdev = dev_data;
u32 i, val;
spin_lock(&mdev->reg_slock);
val = mxr_read(mdev, MXR_INT_STATUS);
/* wake up process waiting for VSYNC */
if (val & MXR_INT_STATUS_VSYNC) {
set_bit(MXR_EVENT_VSYNC, &mdev->event_flags);
/* toggle TOP field event if working in interlaced mode */
if (~mxr_read(mdev, MXR_CFG) & MXR_CFG_SCAN_PROGRASSIVE)
change_bit(MXR_EVENT_TOP, &mdev->event_flags);
wake_up(&mdev->event_queue);
/* vsync interrupt use different bit for read and clear */
val &= ~MXR_INT_STATUS_VSYNC;
val |= MXR_INT_CLEAR_VSYNC;
}
/* clear interrupts */
mxr_write(mdev, MXR_INT_STATUS, val);
spin_unlock(&mdev->reg_slock);
/* leave on non-vsync event */
if (~val & MXR_INT_CLEAR_VSYNC)
return IRQ_HANDLED;
/* skip layer update on bottom field */
if (!test_bit(MXR_EVENT_TOP, &mdev->event_flags))
return IRQ_HANDLED;
for (i = 0; i < MXR_MAX_LAYERS; ++i)
mxr_irq_layer_handle(mdev->layer[i]);
return IRQ_HANDLED;
}
void cicad_physical_init() {
clear_bit(P1DIR, CICAD_PIN); cicad_sending_bit=0; //Input/Recessive
clear_bit(P1REN, CICAD_PIN); //No resistor
//Set the dominant bit to be outputted
change_bit(P1OUT, CICAD_PIN, CICAD_POLARITY);
}
void cicad_init_timer(bool on) {
TACTL |= TASSEL_2; //Internal osc
TACTL |= ID_0; //1x prescaler
change_bit(TACTL,4,on); //Change the mode, on=true => count up to taccr0, on=false => stop
//Enable Interrupts
CCTL0 |= CCIE; //Timer
_BIS_SR(GIE); //Global
CICAD_TIMER_RESET; //Start the counter from 0
}
static void c_can_setup_tx_object(struct net_device *dev, int iface,
struct can_frame *frame, int idx)
{
struct c_can_priv *priv = netdev_priv(dev);
u16 ctrl = IF_MCONT_TX | frame->can_dlc;
bool rtr = frame->can_id & CAN_RTR_FLAG;
u32 arb = IF_ARB_MSGVAL;
int i;
if (frame->can_id & CAN_EFF_FLAG) {
arb |= frame->can_id & CAN_EFF_MASK;
arb |= IF_ARB_MSGXTD;
} else {
arb |= (frame->can_id & CAN_SFF_MASK) << 18;
}
if (!rtr)
arb |= IF_ARB_TRANSMIT;
/*
* If we change the DIR bit, we need to invalidate the buffer
* first, i.e. clear the MSGVAL flag in the arbiter.
*/
if (rtr != (bool)test_bit(idx, &priv->tx_dir)) {
u32 obj = idx + C_CAN_MSG_OBJ_TX_FIRST;
c_can_inval_msg_object(dev, iface, obj);
change_bit(idx, &priv->tx_dir);
}
priv->write_reg32(priv, C_CAN_IFACE(ARB1_REG, iface), arb);
priv->write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface), ctrl);
if (priv->type == BOSCH_D_CAN) {
u32 data = 0, dreg = C_CAN_IFACE(DATA1_REG, iface);
for (i = 0; i < frame->can_dlc; i += 4, dreg += 2) {
data = (u32)frame->data[i];
data |= (u32)frame->data[i + 1] << 8;
data |= (u32)frame->data[i + 2] << 16;
data |= (u32)frame->data[i + 3] << 24;
priv->write_reg32(priv, dreg, data);
}
} else {
for (i = 0; i < frame->can_dlc; i += 2) {
priv->write_reg(priv,
C_CAN_IFACE(DATA1_REG, iface) + i / 2,
frame->data[i] |
(frame->data[i + 1] << 8));
}
}
}
static void bluecard_write_wakeup(struct bluecard_info *info)
{
if (!info) {
BT_ERR("Unknown device");
return;
}
if (!test_bit(XMIT_SENDING_READY, &(info->tx_state)))
return;
if (test_and_set_bit(XMIT_SENDING, &(info->tx_state))) {
set_bit(XMIT_WAKEUP, &(info->tx_state));
return;
}
do {
unsigned int iobase = info->p_dev->resource[0]->start;
unsigned int offset;
unsigned char command;
unsigned long ready_bit;
register struct sk_buff *skb;
int len;
clear_bit(XMIT_WAKEUP, &(info->tx_state));
if (!pcmcia_dev_present(info->p_dev))
return;
if (test_bit(XMIT_BUFFER_NUMBER, &(info->tx_state))) {
if (!test_bit(XMIT_BUF_TWO_READY, &(info->tx_state)))
break;
offset = 0x10;
command = REG_COMMAND_TX_BUF_TWO;
ready_bit = XMIT_BUF_TWO_READY;
} else {
if (!test_bit(XMIT_BUF_ONE_READY, &(info->tx_state)))
break;
offset = 0x00;
command = REG_COMMAND_TX_BUF_ONE;
ready_bit = XMIT_BUF_ONE_READY;
}
skb = skb_dequeue(&(info->txq));
if (!skb)
break;
if (bt_cb(skb)->pkt_type & 0x80) {
/* Disable RTS */
info->ctrl_reg |= REG_CONTROL_RTS;
outb(info->ctrl_reg, iobase + REG_CONTROL);
}
/* Activate LED */
bluecard_enable_activity_led(info);
/* Send frame */
len = bluecard_write(iobase, offset, skb->data, skb->len);
/* Tell the FPGA to send the data */
outb_p(command, iobase + REG_COMMAND);
/* Mark the buffer as dirty */
clear_bit(ready_bit, &(info->tx_state));
if (bt_cb(skb)->pkt_type & 0x80) {
DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wq);
DEFINE_WAIT(wait);
unsigned char baud_reg;
switch (bt_cb(skb)->pkt_type) {
case PKT_BAUD_RATE_460800:
baud_reg = REG_CONTROL_BAUD_RATE_460800;
break;
case PKT_BAUD_RATE_230400:
baud_reg = REG_CONTROL_BAUD_RATE_230400;
break;
case PKT_BAUD_RATE_115200:
baud_reg = REG_CONTROL_BAUD_RATE_115200;
break;
case PKT_BAUD_RATE_57600:
/* Fall through... */
default:
baud_reg = REG_CONTROL_BAUD_RATE_57600;
break;
}
/* Wait until the command reaches the baseband */
prepare_to_wait(&wq, &wait, TASK_INTERRUPTIBLE);
schedule_timeout(HZ/10);
finish_wait(&wq, &wait);
/* Set baud on baseband */
info->ctrl_reg &= ~0x03;
info->ctrl_reg |= baud_reg;
outb(info->ctrl_reg, iobase + REG_CONTROL);
/* Enable RTS */
info->ctrl_reg &= ~REG_CONTROL_RTS;
outb(info->ctrl_reg, iobase + REG_CONTROL);
/* Wait before the next HCI packet can be send */
prepare_to_wait(&wq, &wait, TASK_INTERRUPTIBLE);
schedule_timeout(HZ);
finish_wait(&wq, &wait);
}
if (len == skb->len) {
kfree_skb(skb);
} else {
skb_pull(skb, len);
skb_queue_head(&(info->txq), skb);
}
info->hdev->stat.byte_tx += len;
/* Change buffer */
change_bit(XMIT_BUFFER_NUMBER, &(info->tx_state));
} while (test_bit(XMIT_WAKEUP, &(info->tx_state)));
clear_bit(XMIT_SENDING, &(info->tx_state));
}
/****************************************************************************f
*
* Scan the matrix, and generate event for changes.
*
***************************************************************************/
static void keypad_scan( int gpio_pin, struct CBLK *bcm_kp )
{
unsigned int stat;
int r, gpio_c, value;
int c = 0;
r = elementExistInArray( gpio_pin, bcm_kp->row_count , bcm_kp->keyRowArray );
stat = gpio_get_value(gpio_pin);
if(stat)
{
/* At this point we know that the some key was released. So no point in scanning the
Matrix. Just report the last pressed key on same GPIO as released. */
/* Handle if its a Direct key release*/
if(( bcm_kp->direct_key_col_index != -1 ) && ( bcm_kp->keycode[SCANCODE(r,bcm_kp->direct_key_col_index)] ))
{
input_report_key(bcm_kp->input_dev, bcm_kp->keycode[SCANCODE(r,bcm_kp->direct_key_col_index)], !stat);
input_sync( bcm_kp->input_dev );
}
/* Handle Matrix Key Release */
else
{
for(c=0;c< bcm_kp->col_count;c++)
{
if( test_bit( SCANCODE(r,c), bcm_kp->prevDown ) )
{
input_report_key(bcm_kp->input_dev, bcm_kp->keycode[SCANCODE(r,c)], !stat);
input_sync( bcm_kp->input_dev );
change_bit( SCANCODE(r,c), bcm_kp->prevDown );
BCMKP_DBG(KERN_DEBUG "Key released r=%d c=%d..\n", r, c);
}
}
}
}
else {
/* The Key is presses, so scan the Matrix */
//Now we have the GPIO row that cause the interrupt
if(( bcm_kp->direct_key_col_index != -1 ) && ( bcm_kp->keycode[SCANCODE(r,bcm_kp->direct_key_col_index)] ))
{
/* The Key is a Direct Key */
input_report_key(bcm_kp->input_dev, bcm_kp->keycode[SCANCODE(r,bcm_kp->direct_key_col_index)], !stat);
BCMKP_DBG(KERN_DEBUG "GPIO %d row press found Direct Key..\n", gpio_pin);
}
else{
//Now set all Col as High
for(c=0;c< bcm_kp->col_count;c++)
{
gpio_c = bcm_kp->keyColArray[c];
if( gpio_c != BCM_NO_COLUMN )
gpio_set_value( gpio_c, 1 );
}
for(c=0;c< bcm_kp->col_count;c++)
{
gpio_c = bcm_kp->keyColArray[c];
if( gpio_c == BCM_NO_COLUMN )
continue;
gpio_set_value( gpio_c, 0 );
value = gpio_get_value(gpio_pin);
gpio_set_value( gpio_c, 1 );
if( !value ) //Found the Key
{
if( bcm_kp->keycode[SCANCODE(r,c)] && !test_bit( SCANCODE(r,c), bcm_kp->prevDown ) )
{
/* report status to input-subsystem */
input_report_key(bcm_kp->input_dev, bcm_kp->keycode[SCANCODE(r,c)], !value);
input_sync( bcm_kp->input_dev );
change_bit( SCANCODE(r,c), bcm_kp->prevDown );
BCMKP_DBG(KERN_DEBUG "Key Pressed r=%d c=%d..\n", r, c);
break;
}
}
}
//Now restore all the Col as Low for next interrupt
for(c=0;c< bcm_kp->col_count;c++)
{
gpio_c = bcm_kp->keyColArray[c];
if( gpio_c != BCM_NO_COLUMN )
gpio_set_value( gpio_c, 0 );
}
}
}
return;
}
static void bluecard_write_wakeup(bluecard_info_t *info)
{
if (!info) {
printk(KERN_WARNING "bluecard_cs: Call of write_wakeup for unknown device.\n");
return;
}
if (!test_bit(XMIT_SENDING_READY, &(info->tx_state)))
return;
if (test_and_set_bit(XMIT_SENDING, &(info->tx_state))) {
set_bit(XMIT_WAKEUP, &(info->tx_state));
return;
}
do {
register unsigned int iobase = info->link.io.BasePort1;
register unsigned int offset;
register unsigned char command;
register unsigned long ready_bit;
register struct sk_buff *skb;
register int len;
clear_bit(XMIT_WAKEUP, &(info->tx_state));
if (!(info->link.state & DEV_PRESENT))
return;
if (test_bit(XMIT_BUFFER_NUMBER, &(info->tx_state))) {
if (!test_bit(XMIT_BUF_TWO_READY, &(info->tx_state)))
break;
offset = 0x10;
command = REG_COMMAND_TX_BUF_TWO;
ready_bit = XMIT_BUF_TWO_READY;
} else {
if (!test_bit(XMIT_BUF_ONE_READY, &(info->tx_state)))
break;
offset = 0x00;
command = REG_COMMAND_TX_BUF_ONE;
ready_bit = XMIT_BUF_ONE_READY;
}
if (!(skb = skb_dequeue(&(info->txq))))
break;
if (skb->pkt_type & 0x80) {
/* Disable RTS */
info->ctrl_reg |= REG_CONTROL_RTS;
outb(info->ctrl_reg, iobase + REG_CONTROL);
}
/* Activate LED */
bluecard_enable_activity_led(info);
/* Send frame */
len = bluecard_write(iobase, offset, skb->data, skb->len);
/* Tell the FPGA to send the data */
outb_p(command, iobase + REG_COMMAND);
/* Mark the buffer as dirty */
clear_bit(ready_bit, &(info->tx_state));
if (skb->pkt_type & 0x80) {
wait_queue_head_t wait;
unsigned char baud_reg;
switch (skb->pkt_type) {
case PKT_BAUD_RATE_460800:
baud_reg = REG_CONTROL_BAUD_RATE_460800;
break;
case PKT_BAUD_RATE_230400:
baud_reg = REG_CONTROL_BAUD_RATE_230400;
break;
case PKT_BAUD_RATE_115200:
baud_reg = REG_CONTROL_BAUD_RATE_115200;
break;
case PKT_BAUD_RATE_57600:
/* Fall through... */
default:
baud_reg = REG_CONTROL_BAUD_RATE_57600;
break;
}
/* Wait until the command reaches the baseband */
init_waitqueue_head(&wait);
interruptible_sleep_on_timeout(&wait, HZ / 10);
/* Set baud on baseband */
info->ctrl_reg &= ~0x03;
info->ctrl_reg |= baud_reg;
outb(info->ctrl_reg, iobase + REG_CONTROL);
/* Enable RTS */
info->ctrl_reg &= ~REG_CONTROL_RTS;
outb(info->ctrl_reg, iobase + REG_CONTROL);
/* Wait before the next HCI packet can be send */
interruptible_sleep_on_timeout(&wait, HZ);
}
if (len == skb->len) {
kfree_skb(skb);
} else {
skb_pull(skb, len);
skb_queue_head(&(info->txq), skb);
}
info->hdev.stat.byte_tx += len;
/* Change buffer */
change_bit(XMIT_BUFFER_NUMBER, &(info->tx_state));
} while (test_bit(XMIT_WAKEUP, &(info->tx_state)));
clear_bit(XMIT_SENDING, &(info->tx_state));
}
void input_event(struct input_dev *dev, unsigned int type, unsigned int code, int value)
{
struct input_handle *handle = dev->handle;
/*
* Filter non-events, and bad input values out.
*/
if (type > EV_MAX || !test_bit(type, dev->evbit))
return;
switch (type) {
case EV_KEY:
if (code > KEY_MAX || !test_bit(code, dev->keybit) || !!test_bit(code, dev->key) == value)
return;
if (value == 2) break;
change_bit(code, dev->key);
if (test_bit(EV_REP, dev->evbit) && dev->timer.function) {
if (value) {
mod_timer(&dev->timer, jiffies + dev->rep[REP_DELAY]);
dev->repeat_key = code;
break;
}
if (dev->repeat_key == code)
del_timer(&dev->timer);
}
break;
case EV_ABS:
if (code > ABS_MAX || !test_bit(code, dev->absbit) || (value == dev->abs[code]))
return;
dev->abs[code] = value;
break;
case EV_REL:
if (code > REL_MAX || !test_bit(code, dev->relbit) || (value == 0))
return;
break;
case EV_LED:
if (code > LED_MAX || !test_bit(code, dev->ledbit) || !!test_bit(code, dev->led) == value)
return;
change_bit(code, dev->led);
if (dev->event) dev->event(dev, type, code, value);
break;
case EV_SND:
if (code > SND_MAX || !test_bit(code, dev->sndbit) || !!test_bit(code, dev->snd) == value)
return;
change_bit(code, dev->snd);
if (dev->event) dev->event(dev, type, code, value);
break;
case EV_REP:
if (code > REP_MAX || dev->rep[code] == value) return;
dev->rep[code] = value;
if (dev->event) dev->event(dev, type, code, value);
break;
}
/*
* Add randomness.
*/
#if 0 /* BUG */
add_input_randomness(((unsigned long) dev) ^ (type << 24) ^ (code << 16) ^ value);
#endif
/*
* Distribute the event to handler modules.
*/
while (handle) {
handle->handler->event(handle, type, code, value);
handle = handle->dnext;
}
}
