static void __interrupt __loadds newhandler_08(void)
{
savefpu();
clearfpu();
#ifdef __WATCOMC__
loades();
#endif
int08counter++; // for the general timing
intdec_timer_counter+=INT08_DIVISOR_NEW; // for CPU usage (at interrupt-decoder)
oldint08_timercount+=INT08_DIVISOR_NEW; // for the old-int08 handler
if((oldint08_timercount&0xFFFF0000) && !oldint08_running){
oldint08_running=1;
oldint08_timercount-=0x00010000;
oldint08_handler();
cld();
oldint08_running=0;
}else{
outp(0x20,0x20);
}
mpxplay_timer_execute_int08_funcs();
restorefpu();
}
static void timer_handler(void)
{
static unsigned long intcount = 0;
static int overload = 0;
/* Save & reset FPU state */
/* savefpu(); */
/* clearfpu(); */
/* Not sure what this is for */
/* loades(); */
/* Call the old handler at the original rate of 18.2Hz */
intcount += timer_rate;
if(intcount & 0xffff0000) {
intcount &= 0xffff;
// TODO: call the old handler here
/* Clear the direction flag -- it's good to be safe */
cld();
}
/* Hardware interrupt served -- bottom end coming up */
outportb(0x20, 0x20);
/* Critical section: Call real interrupt handler */
if(overload == 0) {
overload++;
/* if(!indosCheck()) */
/* stackcall(real_handler); */
real_handler();
overload--;
}
/* restorefpu(); */
}
/**
* Display buffer and wait for key (return on release).
* Seed is incremented, generating entropy.
*
* @param disp pointer to display buffer
* @return ASCII code of the key (0 = hw failure)
*/
wfk(unsigned char *disp) {
unsigned char pos, pos2, *p, sc, sc2;
do {
for (pos = 0, p = disp; pos < DISPLEN; pos++) {
setssd(pos, *p++);
seed[0]++;
sc = getsc();
if (sc) {
break;
}
}
} while (!sc);
do {
for (pos2 = 0, p = disp; pos2 < DISPLEN; pos2++) {
setssd(pos2, *p++);
seed[1]++;
if (pos == pos2) {
sc2 = getsc();
}
}
} while (sc2);
cld();
return sc2asc(pos, sc);
}
static
int resolveLocalAddrForUnix(bsl::vector<btlso::IPv4Address> *localAddresses,
int numAddresses,
int *errorCode)
// Populate the specified vector 'localAddresses' with the set of IP
// addresses that refer to the local Unix-like machine, but only take the
// the first 'numAddresses' addresses found. Return 0 on success and a
// non-zero value otherwise, and set '*errorCode' to the platform-dependent
// error code encountered if the local address could not be resolved. On
// success, '*errorCode' is not modified. IP addresses of ethernet and
// wireless network interfaces only are loaded to the 'localAddresses'.
{
BSLS_ASSERT(localAddresses);
BSLS_ASSERT(0 < numAddresses);
localAddresses->clear();
// To obtain a list of local addresses on Unix-like machine, we use 'ioctl'
// function. 'ioctl' called with 'SIOCGIFCONF' code fills passed array of
// 'ifreq' structures with information about all network interfaces being
// presented. The required size of this array is obtained from another
// 'ioctl' call with request code specific for different platforms.
struct ifconf ifc;
int sd;
// Create a socket so we can use ioctl on the file descriptor to retrieve
// interfaces info.
sd = socket(AF_INET, SOCK_DGRAM, 0);
if (-1 == sd) {
if (errorCode) {
*errorCode = errno;
}
return -1; // RETURN
}
CloseSocketGuard cld(sd);
ifc.ifc_len = 0;
ifc.ifc_req = 0;
// Calculating size of buffer for addresses. There is no universal
// solution for all Unix-like platforms, so we use specific ioctl request
// code in each case.
int bufLen = 0;
int ret = 0;
#if defined(BSLS_PLATFORM_OS_AIX)
// 'SIOCGSIZIFCONF': Gets the size of memory that is required to get
// configuration information for all interfaces returned by 'SIOCGIFCONF'.
int ifconfSize = 0;
ret = ioctl(sd, SIOCGSIZIFCONF, (caddr_t)&ifconfSize);
bufLen = ifconfSize;
#elif defined(BSLS_PLATFORM_OS_SUNOS) || defined (BSLS_PLATFORM_OS_SOLARIS)
// 'SIOCGIFNUM': Gets the number of interfaces returned by 'SIOCGIFCONF'.
int NumberOfInterfaces = 0;
ret = ioctl(sd, SIOCGIFNUM, &NumberOfInterfaces);
bufLen = NumberOfInterfaces * sizeof(struct ifreq);
#elif defined(BSLS_PLATFORM_OS_DARWIN)
// There are not any special ioctls to get neccessary buffer size on
// Darwin, so it can be obtained experimentally. We need to give system
// excessive buffer and the required size will be returned through
// 'ifc.ifc_len' field.
const int MAX_TRIES = 5;
int numReqs = 10;
int numTries = 0;
bslma::Allocator *eda = bslma::Default::defaultAllocator();
do {
int experimentalSize = sizeof(struct ifreq)*numReqs;
char *experimentalBuf =
static_cast<char *>(eda->allocate(experimentalSize));
bslma::DeallocatorGuard<bslma::Allocator> guard(experimentalBuf, eda);
ifc.ifc_len = experimentalSize;
ifc.ifc_buf = experimentalBuf;
// Keep calling ioctl until we provide it a big enough buffer.
if (ioctl(sd, SIOCGIFCONF, &ifc) < 0) {
if (errorCode) {
*errorCode = EFAULT;
}
return -1; // RETURN
}
if (ifc.ifc_len == bufLen) {
// As soon as we reach (or exceed) the requested amount of memory,
// system call will return the same value for any excess.
break;
} else {
// It is possibly insufficient amout of memory.
bufLen = ifc.ifc_len;
numReqs *= 2;
}
++numTries;
} while (MAX_TRIES > numTries);
#else
// If 'ifc_req' is NULL, 'SIOCGIFCONF' returns the necessary buffer size
// in bytes for receiving all available addresses in 'ifc_len'.
ret = ioctl(sd, SIOCGIFCONF, &ifc);
bufLen = ifc.ifc_len;
#endif
if (ret) {
if (errorCode) {
*errorCode = EFAULT;
}
return -1; // RETURN
}
if (bufLen == 0) {
if (errorCode) {
*errorCode = ENODATA;
}
return -1; // RETURN
}
// Memory allocation.
bslma::Allocator *da = bslma::Default::defaultAllocator();
char *buf = static_cast<char *>(da->allocate(bufLen));
bsl::memset(buf, 0, bufLen);
bslma::DeallocatorGuard<bslma::Allocator> guard(buf, da);
// Receiving addresses.
ifc.ifc_req = reinterpret_cast<struct ifreq *>(buf);
ifc.ifc_len = bufLen;
if (ioctl(sd, SIOCGIFCONF, &ifc) == 0) {
int handledBytesNum = 0;
while (handledBytesNum < ifc.ifc_len &&
static_cast<int>(localAddresses->size()) < numAddresses) {
ifreq *ifr = reinterpret_cast<struct ifreq *>(buf);
if (ifr->ifr_addr.sa_family == AF_INET) {
const bsl::string LOCALHOST("127.0.0.1");
char host[NI_MAXHOST] = {0};
int rc = getnameinfo(&ifr->ifr_addr,
sizeof(struct sockaddr_in),
host,
sizeof host,
0,
0,
NI_NUMERICHOST);
if (0 == rc && LOCALHOST != host) {
sockaddr_in *saIn = reinterpret_cast<sockaddr_in *>(
&ifr->ifr_addr);
btlso::IPv4Address address(saIn->sin_addr.s_addr, 0);
localAddresses->push_back(address);
}
}
size_t delta = 0;
#if defined(BSLS_PLATFORM_OS_AIX) || defined(BSLS_PLATFORM_OS_DARWIN)
// These platforms store data of interfaces in a different way.
// That is why we have to shift pointer manually.
size_t addrSize = (ifr->ifr_addr.sa_len > sizeof(ifr->ifr_addr)
? ifr->ifr_addr.sa_len
: sizeof(ifr->ifr_addr));
delta = sizeof(ifr->ifr_name) + addrSize;
#else
delta = sizeof(struct ifreq);
#endif
buf = buf + delta;
handledBytesNum += static_cast<int>(delta);
}
} else {
if (errorCode) {
*errorCode = EFAULT;
}
return -1; // RETURN
}
return 0;
}
double CommFunc::Abs(const double &x)
{
complex<double> cld(x);
double ldAbs = abs(cld);
return(ldAbs);
}
/**
* @brief emulate instruction
* @return returns false if something goes wrong (e.g. illegal instruction)
*
* Current limitations:
*
* - Illegal instructions are not implemented
* - Excess cycles due to page boundary crossing are not calculated
* - Some known architectural bugs are not emulated
*/
bool Cpu::emulate()
{
/* fetch instruction */
uint8_t insn = fetch_op();
bool retval = true;
/* emulate instruction */
switch(insn)
{
/* BRK */
case 0x0: brk(); break;
/* ORA (nn,X) */
case 0x1: ora(load_byte(addr_indx()),6); break;
/* ORA nn */
case 0x5: ora(load_byte(addr_zero()),3); break;
/* ASL nn */
case 0x6: asl_mem(addr_zero(),5); break;
/* PHP */
case 0x8: php(); break;
/* ORA #nn */
case 0x9: ora(fetch_op(),2); break;
/* ASL A */
case 0xA: asl_a(); break;
/* ORA nnnn */
case 0xD: ora(load_byte(addr_abs()),4); break;
/* ASL nnnn */
case 0xE: asl_mem(addr_abs(),6); break;
/* BPL nn */
case 0x10: bpl(); break;
/* ORA (nn,Y) */
case 0x11: ora(load_byte(addr_indy()),5); break;
/* ORA nn,X */
case 0x15: ora(load_byte(addr_zerox()),4); break;
/* ASL nn,X */
case 0x16: asl_mem(addr_zerox(),6); break;
/* CLC */
case 0x18: clc(); break;
/* ORA nnnn,Y */
case 0x19: ora(load_byte(addr_absy()),4); break;
/* ORA nnnn,X */
case 0x1D: ora(load_byte(addr_absx()),4); break;
/* ASL nnnn,X */
case 0x1E: asl_mem(addr_absx(),7); break;
/* JSR */
case 0x20: jsr(); break;
/* AND (nn,X) */
case 0x21: _and(load_byte(addr_indx()),6); break;
/* BIT nn */
case 0x24: bit(addr_zero(),3); break;
/* AND nn */
case 0x25: _and(load_byte(addr_zero()),3); break;
/* ROL nn */
case 0x26: rol_mem(addr_zero(),5); break;
/* PLP */
case 0x28: plp(); break;
/* AND #nn */
case 0x29: _and(fetch_op(),2); break;
/* ROL A */
case 0x2A: rol_a(); break;
/* BIT nnnn */
case 0x2C: bit(addr_abs(),4); break;
/* AND nnnn */
case 0x2D: _and(load_byte(addr_abs()),4); break;
/* ROL nnnn */
case 0x2E: rol_mem(addr_abs(),6); break;
/* BMI nn */
case 0x30: bmi(); break;
/* AND (nn,Y) */
case 0x31: _and(load_byte(addr_indy()),5); break;
/* AND nn,X */
case 0x35: _and(load_byte(addr_zerox()),4); break;
/* ROL nn,X */
case 0x36: rol_mem(addr_zerox(),6); break;
/* SEC */
case 0x38: sec(); break;
/* AND nnnn,Y */
case 0x39: _and(load_byte(addr_absy()),4); break;
/* AND nnnn,X */
case 0x3D: _and(load_byte(addr_absx()),4); break;
/* ROL nnnn,X */
case 0x3E: rol_mem(addr_absx(),7); break;
/* RTI */
case 0x40: rti(); break;
/* EOR (nn,X) */
case 0x41: eor(load_byte(addr_indx()),6); break;
/* EOR nn */
case 0x45: eor(load_byte(addr_zero()),3); break;
/* LSR nn */
case 0x46: lsr_mem(addr_zero(),5); break;
/* PHA */
case 0x48: pha(); break;
/* EOR #nn */
case 0x49: eor(fetch_op(),2); break;
/* BVC */
case 0x50: bvc(); break;
/* JMP nnnn */
case 0x4C: jmp(); break;
/* EOR nnnn */
case 0x4D: eor(load_byte(addr_abs()),4); break;
/* LSR A */
case 0x4A: lsr_a(); break;
/* LSR nnnn */
case 0x4E: lsr_mem(addr_abs(),6); break;
/* EOR (nn,Y) */
case 0x51: eor(load_byte(addr_indy()),5); break;
/* EOR nn,X */
case 0x55: eor(load_byte(addr_zerox()),4); break;
/* LSR nn,X */
case 0x56: lsr_mem(addr_zerox(),6); break;
/* CLI */
case 0x58: cli(); break;
/* EOR nnnn,Y */
case 0x59: eor(load_byte(addr_absy()),4); break;
/* EOR nnnn,X */
case 0x5D: eor(load_byte(addr_absx()),4); break;
/* LSR nnnn,X */
case 0x5E: lsr_mem(addr_absx(),7); break;
/* RTS */
case 0x60: rts(); break;
/* ADC (nn,X) */
case 0x61: adc(load_byte(addr_indx()),6); break;
/* ADC nn */
case 0x65: adc(load_byte(addr_zero()),3); break;
/* ROR nn */
case 0x66: ror_mem(addr_zero(),5); break;
/* PLA */
case 0x68: pla(); break;
/* ADC #nn */
case 0x69: adc(fetch_op(),2); break;
/* ROR A */
case 0x6A: ror_a(); break;
/* JMP (nnnn) */
case 0x6C: jmp_ind(); break;
/* ADC nnnn */
case 0x6D: adc(load_byte(addr_abs()),4); break;
/* ROR nnnn */
case 0x6E: ror_mem(addr_abs(),6); break;
/* BVS */
case 0x70: bvs(); break;
/* ADC (nn,Y) */
case 0x71: adc(load_byte(addr_indy()),5); break;
/* ADC nn,X */
case 0x75: adc(load_byte(addr_zerox()),4); break;
/* ROR nn,X */
case 0x76: ror_mem(addr_zerox(),6); break;
/* SEI */
case 0x78: sei(); break;
/* ADC nnnn,Y */
case 0x79: adc(load_byte(addr_absy()),4); break;
/* ADC nnnn,X */
case 0x7D: adc(load_byte(addr_absx()),4); break;
/* ROR nnnn,X */
case 0x7E: ror_mem(addr_absx(),7); break;
/* STA (nn,X) */
case 0x81: sta(addr_indx(),6); break;
/* STY nn */
case 0x84: sty(addr_zero(),3); break;
/* STA nn */
case 0x85: sta(addr_zero(),3); break;
/* STX nn */
case 0x86: stx(addr_zero(),3); break;
/* DEY */
case 0x88: dey(); break;
/* TXA */
case 0x8A: txa(); break;
/* STY nnnn */
case 0x8C: sty(addr_abs(),4); break;
/* STA nnnn */
case 0x8D: sta(addr_abs(),4); break;
/* STX nnnn */
case 0x8E: stx(addr_abs(),4); break;
/* BCC nn */
case 0x90: bcc(); break;
/* STA (nn,Y) */
case 0x91: sta(addr_indy(),6); break;
/* STY nn,X */
case 0x94: sty(addr_zerox(),4); break;
/* STA nn,X */
case 0x95: sta(addr_zerox(),4); break;
/* STX nn,Y */
case 0x96: stx(addr_zeroy(),4); break;
/* TYA */
case 0x98: tya(); break;
/* STA nnnn,Y */
case 0x99: sta(addr_absy(),5); break;
/* TXS */
case 0x9A: txs(); break;
/* STA nnnn,X */
case 0x9D: sta(addr_absx(),5); break;
/* LDY #nn */
case 0xA0: ldy(fetch_op(),2); break;
/* LDA (nn,X) */
case 0xA1: lda(load_byte(addr_indx()),6); break;
/* LDX #nn */
case 0xA2: ldx(fetch_op(),2); break;
/* LDY nn */
case 0xA4: ldy(load_byte(addr_zero()),3); break;
/* LDA nn */
case 0xA5: lda(load_byte(addr_zero()),3); break;
/* LDX nn */
case 0xA6: ldx(load_byte(addr_zero()),3); break;
/* TAY */
case 0xA8: tay(); break;
/* LDA #nn */
case 0xA9: lda(fetch_op(),2); break;
/* TAX */
case 0xAA: tax(); break;
/* LDY nnnn */
case 0xAC: ldy(load_byte(addr_abs()),4); break;
/* LDA nnnn */
case 0xAD: lda(load_byte(addr_abs()),4); break;
/* LDX nnnn */
case 0xAE: ldx(load_byte(addr_abs()),4); break;
/* BCS nn */
case 0xB0: bcs(); break;
/* LDA (nn,Y) */
case 0xB1: lda(load_byte(addr_indy()),5); break;
/* LDY nn,X */
case 0xB4: ldy(load_byte(addr_zerox()),3); break;
/* LDA nn,X */
case 0xB5: lda(load_byte(addr_zerox()),3); break;
/* LDX nn,Y */
case 0xB6: ldx(load_byte(addr_zeroy()),3); break;
/* CLV */
case 0xB8: clv(); break;
/* LDA nnnn,Y */
case 0xB9: lda(load_byte(addr_absy()),4); break;
/* TSX */
case 0xBA: tsx(); break;
/* LDY nnnn,X */
case 0xBC: ldy(load_byte(addr_absx()),4); break;
/* LDA nnnn,X */
case 0xBD: lda(load_byte(addr_absx()),4); break;
/* LDX nnnn,Y */
case 0xBE: ldx(load_byte(addr_absy()),4); break;
/* CPY #nn */
case 0xC0: cpy(fetch_op(),2); break;
/* CMP (nn,X) */
case 0xC1: cmp(load_byte(addr_indx()),6); break;
/* CPY nn */
case 0xC4: cpy(load_byte(addr_zero()),3); break;
/* CMP nn */
case 0xC5: cmp(load_byte(addr_zero()),3); break;
/* DEC nn */
case 0xC6: dec(addr_zero(),5); break;
/* INY */
case 0xC8: iny(); break;
/* CMP #nn */
case 0xC9: cmp(fetch_op(),2); break;
/* DEX */
case 0xCA: dex(); break;
/* CPY nnnn */
case 0xCC: cpy(load_byte(addr_abs()),4); break;
/* CMP nnnn */
case 0xCD: cmp(load_byte(addr_abs()),4); break;
/* DEC nnnn */
case 0xCE: dec(addr_abs(),6); break;
/* BNE nn */
case 0xD0: bne(); break;
/* CMP (nn,Y) */
case 0xD1: cmp(load_byte(addr_indy()),5); break;
/* CMP nn,X */
case 0xD5: cmp(load_byte(addr_zerox()),4); break;
/* DEC nn,X */
case 0xD6: dec(addr_zerox(),6); break;
/* CLD */
case 0xD8: cld(); break;
/* CMP nnnn,Y */
case 0xD9: cmp(load_byte(addr_absy()),4); break;
/* CMP nnnn,X */
case 0xDD: cmp(load_byte(addr_absx()),4); break;
/* DEC nnnn,X */
case 0xDE: dec(addr_absx(),7); break;
/* CPX #nn */
case 0xE0: cpx(fetch_op(),2); break;
/* SBC (nn,X) */
case 0xE1: sbc(load_byte(addr_indx()),6); break;
/* CPX nn */
case 0xE4: cpx(load_byte(addr_zero()),3); break;
/* SBC nn */
case 0xE5: sbc(load_byte(addr_zero()),3); break;
/* INC nn */
case 0xE6: inc(addr_zero(),5); break;
/* INX */
case 0xE8: inx(); break;
/* SBC #nn */
case 0xE9: sbc(fetch_op(),2); break;
/* NOP */
case 0xEA: nop(); break;
/* CPX nnnn */
case 0xEC: cpx(load_byte(addr_abs()),4); break;
/* SBC nnnn */
case 0xED: sbc(load_byte(addr_abs()),4); break;
/* INC nnnn */
case 0xEE: inc(addr_abs(),6); break;
/* BEQ nn */
case 0xF0: beq(); break;
/* SBC (nn,Y) */
case 0xF1: sbc(load_byte(addr_indy()),5); break;
/* SBC nn,X */
case 0xF5: sbc(load_byte(addr_zerox()),4); break;
/* INC nn,X */
case 0xF6: inc(addr_zerox(),6); break;
/* SED */
case 0xF8: sed(); break;
/* SBC nnnn,Y */
case 0xF9: sbc(load_byte(addr_absy()),4); break;
/* SBC nnnn,X */
case 0xFD: sbc(load_byte(addr_absx()),4); break;
/* INC nnnn,X */
case 0xFE: inc(addr_absx(),7); break;
/* Unknown or illegal instruction */
default:
D("Unknown instruction: %X at %04x\n", insn,pc());
retval = false;
}
return retval;
}
