int add_node_to_channel(char *channel, int node, int monitor_only)
{
channel *search = find_channel(channel);
if (search)
{
if (test_bit(search->barred, node))
return (-1);
set_bit(search->monitors, node);
search->num_monitor++;
if (!monitor_only)
{
set_bit(search->onchannel, node);
search->num_onchannel++;
}
return (0);
}
if (!(search = malloc(sizeof(channel))))
{
return (-1);
}
search->next = base;
base = search;
make_channel_name(channel, search->name);
*search->title = '\000';
clear_bits(search->monitors, MAX_NODES);
clear_bits(search->onchannel, MAX_NODES);
clear_bits(search->moderator, MAX_NODES);
clear_bits(search->barred, MAX_NODES);
search->num_monitor = search->num_onchannel =
search->num_moderator = search->num_barred = 0;
}
static inline void clear_fmt_bits(void __iomem *addr, u32 bits)
{
clear_bits(addr + SPIFMT0, bits);
clear_bits(addr + SPIFMT1, bits);
clear_bits(addr + SPIFMT2, bits);
clear_bits(addr + SPIFMT3, bits);
}
/* Tests bits set/clear/test functions */
static void test01(struct sb *sb, block_t blocks)
{
tux3_msg(sb, "---- test bitops ----");
unsigned char bits[16];
memset(bits, 0, sizeof(bits));
/* set some bits */
set_bits(bits, 6, 20);
set_bits(bits, 49, 16);
set_bits(bits, 0x51, 2);
/* test set bits */
test_assert(all_set(bits, 6, 20));
test_assert(all_set(bits, 49, 16));
test_assert(all_set(bits, 0x51, 2));
/* test clear bits */
test_assert(all_clear(bits, 6, 20) == 0);
test_assert(all_clear(bits, 49, 16) == 0);
test_assert(all_clear(bits, 0x51, 2) == 0);
/* should return false */
test_assert(all_set(bits, 5, 20) == 0);
test_assert(all_set(bits, 49, 17) == 0);
test_assert(all_set(bits, 0x51, 3) == 0);
test_assert(all_clear(bits, 5, 20) == 0);
test_assert(all_clear(bits, 49, 17) == 0);
test_assert(all_clear(bits, 0x51, 3) == 0);
/* all zero now */
clear_bits(bits, 6, 20);
clear_bits(bits, 49, 16);
clear_bits(bits, 0x51, 2);
test_assert(all_clear(bits, 0, 8 * sizeof(bits)));
test_assert(all_clear(bits, 6, 20));
test_assert(all_clear(bits, 49, 16));
test_assert(all_clear(bits, 0x51, 2));
test_assert(all_set(bits, 6, 20) == 0);
test_assert(all_set(bits, 49, 16) == 0);
test_assert(all_set(bits, 0x51, 2) == 0);
/* Corner case */
#if 1
unsigned char *bitmap = malloc(8); /* bitmap must be array of ulong */
#else
unsigned char *bitmap = malloc(7);
#endif
set_bits(bitmap, 0, 7 * 8);
test_assert(all_set(bitmap, 0, 7 * 8));
test_assert(all_clear(bitmap, 0, 7 * 8) == 0);
clear_bits(bitmap, 0, 7 * 8);
test_assert(all_clear(bitmap, 0, 7 * 8));
test_assert(all_set(bitmap, 0, 7 * 8) == 0);
free(bitmap);
clean_main(sb);
}
// write some bits to EEPROM only within one byte
void _eeprom_write_bits(uint16_t byte, uint8_t bit, uint16_t length, uint8_t val, uint8_t * array)
{
// printf("Write value %d to byte %d bit %d with length %d\n", val, byte, bit, length);
uint8_t b = 0;
// if length is smaller than 8 bits, get the old value from eeprom
if (length < 8)
{
b = (NULL == array) ? eeprom_read_byte((uint8_t*)(byte + 0)) : array[byte];
b = clear_bits(b, bit, length);
}
// set bits from given value
b = b | (val << (8 - length - bit));
if (NULL == array)
{
eeprom_write_byte((uint8_t*)(byte + 0), b);
}
else
{
array[byte] = b;
}
}
int main(){
uint8_t rd_buf[1];
char str[6];
// Initialize UART
UART_Init(MY_UBRR);
init_twi();
sei();
init_LSM6DS3();
rd_buf[0] = check_bit(CTRL9_XL,SOFT_EN);
sprintf(str,"%02X\r\n",rd_buf[0]);
UART_Transmit_String(str);
set_bits(CTRL9_XL, SOFT_EN);
rd_buf[0] = check_bit(CTRL9_XL,SOFT_EN);
sprintf(str,"%02X\r\n",rd_buf[0]);
UART_Transmit_String(str);
clear_bits(CTRL9_XL, SOFT_EN);
rd_buf[0] = check_bit(CTRL9_XL,SOFT_EN);
sprintf(str,"%02X\r\n",rd_buf[0]);
UART_Transmit_String(str);
return 0;
}
static void davinci_spi_set_dma_req(const struct spi_device *spi, int enable)
{
struct davinci_spi *davinci_spi = spi_master_get_devdata(spi->master);
if (enable)
set_bits(davinci_spi->base + SPIINT, SPI_SPIINT_DMA_REQ_EN);
else
clear_bits(davinci_spi->base + SPIINT, SPI_SPIINT_DMA_REQ_EN);
}
static int davinci_spi_bufs_prep(struct spi_device *spi,
struct davinci_spi *davinci_spi,
struct davinci_spi_config_t *spi_cfg)
{
u32 sPIPC0;
/* configuraton parameter for SPI */
if (spi_cfg->lsb_first)
set_fmt_bits(davinci_spi->base, SPI_SPIFMT_SHIFTDIR_MASK);
else
clear_fmt_bits(davinci_spi->base, SPI_SPIFMT_SHIFTDIR_MASK);
if (spi_cfg->clk_high)
set_fmt_bits(davinci_spi->base, SPI_SPIFMT_POLARITY_MASK);
else
clear_fmt_bits(davinci_spi->base, SPI_SPIFMT_POLARITY_MASK);
if (spi_cfg->phase_in)
set_fmt_bits(davinci_spi->base, SPI_SPIFMT_PHASE_MASK);
else
clear_fmt_bits(davinci_spi->base, SPI_SPIFMT_PHASE_MASK);
if (davinci_spi->version == DAVINCI_SPI_VERSION_2) {
clear_fmt_bits(davinci_spi->base, SPI_SPIFMT_WDELAY_MASK);
set_fmt_bits(davinci_spi->base,
((spi_cfg->wdelay << SPI_SPIFMT_WDELAY_SHIFT)
& SPI_SPIFMT_WDELAY_MASK));
if (spi_cfg->odd_parity)
set_fmt_bits(davinci_spi->base,
SPI_SPIFMT_ODD_PARITY_MASK);
else
clear_fmt_bits(davinci_spi->base,
SPI_SPIFMT_ODD_PARITY_MASK);
if (spi_cfg->parity_enable)
set_fmt_bits(davinci_spi->base,
SPI_SPIFMT_PARITYENA_MASK);
else
clear_fmt_bits(davinci_spi->base,
SPI_SPIFMT_PARITYENA_MASK);
if (spi_cfg->wait_enable)
set_fmt_bits(davinci_spi->base,
SPI_SPIFMT_WAITENA_MASK);
else
clear_fmt_bits(davinci_spi->base,
SPI_SPIFMT_WAITENA_MASK);
if (spi_cfg->timer_disable)
set_fmt_bits(davinci_spi->base,
SPI_SPIFMT_DISTIMER_MASK);
else
clear_fmt_bits(davinci_spi->base,
SPI_SPIFMT_DISTIMER_MASK);
}
/* Clock internal */
if (spi_cfg->clk_internal)
set_bits(davinci_spi->base + SPIGCR1, SPI_SPIGCR1_CLKMOD_MASK);
else
clear_bits(davinci_spi->base + SPIGCR1,
SPI_SPIGCR1_CLKMOD_MASK);
/* master mode default */
set_bits(davinci_spi->base + SPIGCR1, SPI_SPIGCR1_MASTER_MASK);
if (spi_cfg->intr_level)
iowrite32(SPI_INTLVL_1, davinci_spi->base + SPILVL);
else
iowrite32(SPI_INTLVL_0, davinci_spi->base + SPILVL);
switch (spi_cfg->pin_op_modes) {
case SPI_OPMODE_3PIN:
sPIPC0 = (SPI_SPIPC0_DIFUN_DI << SPI_SPIPC0_DIFUN_SHIFT)
| (SPI_SPIPC0_DOFUN_DO << SPI_SPIPC0_DOFUN_SHIFT)
| (SPI_SPIPC0_CLKFUN_CLK << SPI_SPIPC0_CLKFUN_SHIFT);
break;
case SPI_OPMODE_SPISCS_4PIN:
sPIPC0 = (SPI_SPIPC0_DIFUN_DI << SPI_SPIPC0_DIFUN_SHIFT)
| (SPI_SPIPC0_DOFUN_DO << SPI_SPIPC0_DOFUN_SHIFT)
| (SPI_SPIPC0_CLKFUN_CLK << SPI_SPIPC0_CLKFUN_SHIFT)
| (1 << spi->chip_select);
break;
case SPI_OPMODE_SPIENA_4PIN:
sPIPC0 = (SPI_SPIPC0_DIFUN_DI << SPI_SPIPC0_DIFUN_SHIFT)
| (SPI_SPIPC0_DOFUN_DO << SPI_SPIPC0_DOFUN_SHIFT)
| (SPI_SPIPC0_CLKFUN_CLK << SPI_SPIPC0_CLKFUN_SHIFT)
| (SPI_SPIPC0_SPIENA << SPI_SPIPC0_SPIENA_SHIFT);
break;
case SPI_OPMODE_5PIN:
sPIPC0 = (SPI_SPIPC0_DIFUN_DI << SPI_SPIPC0_DIFUN_SHIFT)
| (SPI_SPIPC0_DOFUN_DO << SPI_SPIPC0_DOFUN_SHIFT)
| (SPI_SPIPC0_CLKFUN_CLK << SPI_SPIPC0_CLKFUN_SHIFT)
| (SPI_SPIPC0_SPIENA << SPI_SPIPC0_SPIENA_SHIFT)
| (1 << spi->chip_select);
break;
default:
return -1;
}
iowrite32(sPIPC0, davinci_spi->base + SPIPC0);
if (spi_cfg->loop_back)
set_bits(davinci_spi->base + SPIGCR1,
SPI_SPIGCR1_LOOPBACK_MASK);
else
clear_bits(davinci_spi->base + SPIGCR1,
SPI_SPIGCR1_LOOPBACK_MASK);
return 0;
}
void game_manager::title_screen_func()
{
curr_game_mode = gm_title_screen;
irq_init();
//irqEnable(irq_vblank);
bios_wait_for_vblank();
// Use video Mode 0, use 1D object mapping, enable forced blank,
// and display BG 0.
reg_dispcnt = dcnt_mode0 | dcnt_obj_1d | dcnt_blank_on | dcnt_bg0_on;
//// Use video Mode 0, use 1D object mapping, enable forced blank,
//// and display BG 0, BG 1, BG 2, and BG 3
//reg_dispcnt = dcnt_mode0 | dcnt_obj_1d | dcnt_blank_on | dcnt_bg0_on
// | dcnt_bg1_on | dcnt_bg2_on | dcnt_bg3_on | dcnt_obj_on;
// Use screen base block 28 for BG0's Map
reg_bg0cnt = bgcnt_sbb(bg0_sbb);
reg_bg1cnt = bgcnt_sbb(bg1_sbb);
reg_bg2cnt = bgcnt_sbb(bg2_sbb);
reg_bg3cnt = bgcnt_sbb(bg3_sbb);
// Clear bgofs_mirror
for ( u32 i=0; i<3; ++i )
{
gfx_manager::bgofs_mirror[i].curr.x
= gfx_manager::bgofs_mirror[i].prev.x = {0};
gfx_manager::bgofs_mirror[i].curr.y
= gfx_manager::bgofs_mirror[i].prev.y = {0};
}
gfx_manager::copy_bgofs_mirror_to_registers();
// Copy the title screen's tiles and tilemap to VRAM
bios_do_lz77_uncomp_vram( title_screenTiles, bg_tile_vram );
gfx_manager::upload_bg_palettes_to_target(bg_pal_ram);
// This is sort of a hack.
bios_do_lz77_uncomp_wram( title_screenMap,
active_level::bg0_screenblock_mirror );
active_level_manager::copy_sublevel_from_array_2d_helper_to_vram();
// Disable forced blank
clear_bits( reg_dispcnt, dcnt_blank_mask );
//memcpy8( test_sram_arr, (void *)debug_arr_u32, test_sram_arr_size );
for (;;)
{
bios_wait_for_vblank();
key_poll();
// Start the game if the Start button is hit
if ( key_hit(key_start) )
{
irqSet( irq_vblank, (u32)mmVBlank );
irqEnable(irq_vblank);
// Don't call mmInitDefault more than once. It uses malloc(),
// and it apparently MaxMOD doesn't ever call free().
mmInitDefault( (mm_addr)practice_17_bin, 8 );
mmSetVBlankHandler(reinterpret_cast<void*>(vblank_func));
reinit_the_game();
break;
}
}
}
// Action_mark - update the BOT for the block [blk_start, blk_end).
// Current typical use is for splitting a block.
// Action_single - update the BOT for an allocation.
// Action_verify - BOT verification.
void G1BlockOffsetArray::do_block_internal(HeapWord* blk_start,
HeapWord* blk_end,
Action action) {
assert(Universe::heap()->is_in_reserved(blk_start),
"reference must be into the heap");
assert(Universe::heap()->is_in_reserved(blk_end-1),
"limit must be within the heap");
// This is optimized to make the test fast, assuming we only rarely
// cross boundaries.
uintptr_t end_ui = (uintptr_t)(blk_end - 1);
uintptr_t start_ui = (uintptr_t)blk_start;
// Calculate the last card boundary preceding end of blk
intptr_t boundary_before_end = (intptr_t)end_ui;
clear_bits(boundary_before_end, right_n_bits(LogN));
if (start_ui <= (uintptr_t)boundary_before_end) {
// blk starts at or crosses a boundary
// Calculate index of card on which blk begins
size_t start_index = _array->index_for(blk_start);
// Index of card on which blk ends
size_t end_index = _array->index_for(blk_end - 1);
// Start address of card on which blk begins
HeapWord* boundary = _array->address_for_index(start_index);
assert(boundary <= blk_start, "blk should start at or after boundary");
if (blk_start != boundary) {
// blk starts strictly after boundary
// adjust card boundary and start_index forward to next card
boundary += N_words;
start_index++;
}
assert(start_index <= end_index, "monotonicity of index_for()");
assert(boundary <= (HeapWord*)boundary_before_end, "tautology");
switch (action) {
case Action_mark: {
if (init_to_zero()) {
_array->set_offset_array(start_index, boundary, blk_start);
break;
} // Else fall through to the next case
}
case Action_single: {
_array->set_offset_array(start_index, boundary, blk_start);
// We have finished marking the "offset card". We need to now
// mark the subsequent cards that this blk spans.
if (start_index < end_index) {
HeapWord* rem_st = _array->address_for_index(start_index) + N_words;
HeapWord* rem_end = _array->address_for_index(end_index) + N_words;
set_remainder_to_point_to_start(rem_st, rem_end);
}
break;
}
case Action_check: {
_array->check_offset_array(start_index, boundary, blk_start);
// We have finished checking the "offset card". We need to now
// check the subsequent cards that this blk spans.
check_all_cards(start_index + 1, end_index);
break;
}
default:
ShouldNotReachHere();
}
}
}
void BCEscapeAnalyzer::set_global_escape(ArgumentMap vars) {
clear_bits(vars, _arg_local);
clear_bits(vars, _arg_stack);
if (vars.contains_allocated())
_allocated_escapes = true;
}
/*
* Store Schedule Run information
*
* Parse Run statement:
*
* Run <keyword=value ...> [on] 2 january at 23:45
*
* Default Run time is daily at 0:0
*
* There can be multiple run statements, they are simply chained
* together.
*
*/
void store_run(LEX *lc, RES_ITEM *item, int index, int pass)
{
char *p;
int i, j;
int options = lc->options;
int token, state, state2 = 0, code = 0, code2 = 0;
bool found;
utime_t utime;
RES *res;
RUNRES **run = (RUNRES **)(item->value);
URES *res_all = (URES *)my_config->m_res_all;
lc->options |= LOPT_NO_IDENT; /* Want only "strings" */
/*
* Clear local copy of run record
*/
memset(&lrun, 0, sizeof(lrun));
/*
* Scan for Job level "full", "incremental", ...
*/
for (found = true; found; ) {
found = false;
token = lex_get_token(lc, T_NAME);
for (i = 0; !found && RunFields[i].name; i++) {
if (bstrcasecmp(lc->str, RunFields[i].name)) {
found = true;
if (lex_get_token(lc, T_ALL) != T_EQUALS) {
scan_err1(lc, _("Expected an equals, got: %s"), lc->str);
/* NOT REACHED */
}
switch (RunFields[i].token) {
case 's': /* Data spooling */
token = lex_get_token(lc, T_NAME);
if (bstrcasecmp(lc->str, "yes") || bstrcasecmp(lc->str, "true")) {
lrun.spool_data = true;
lrun.spool_data_set = true;
} else if (bstrcasecmp(lc->str, "no") || bstrcasecmp(lc->str, "false")) {
lrun.spool_data = false;
lrun.spool_data_set = true;
} else {
scan_err1(lc, _("Expect a YES or NO, got: %s"), lc->str);
}
break;
case 'L': /* Level */
token = lex_get_token(lc, T_NAME);
for (j = 0; joblevels[j].level_name; j++) {
if (bstrcasecmp(lc->str, joblevels[j].level_name)) {
lrun.level = joblevels[j].level;
lrun.job_type = joblevels[j].job_type;
j = 0;
break;
}
}
if (j != 0) {
scan_err1(lc, _("Job level field: %s not found in run record"), lc->str);
/* NOT REACHED */
}
break;
case 'p': /* Priority */
token = lex_get_token(lc, T_PINT32);
if (pass == 2) {
lrun.Priority = lc->pint32_val;
}
break;
case 'P': /* Pool */
case 'f': /* FullPool */
case 'v': /* VFullPool */
case 'i': /* IncPool */
case 'd': /* DiffPool */
case 'n': /* NextPool */
token = lex_get_token(lc, T_NAME);
if (pass == 2) {
res = GetResWithName(R_POOL, lc->str);
if (res == NULL) {
scan_err1(lc, _("Could not find specified Pool Resource: %s"),
lc->str);
/* NOT REACHED */
}
switch(RunFields[i].token) {
case 'P':
lrun.pool = (POOLRES *)res;
break;
case 'f':
lrun.full_pool = (POOLRES *)res;
break;
case 'v':
lrun.vfull_pool = (POOLRES *)res;
break;
case 'i':
lrun.inc_pool = (POOLRES *)res;
break;
case 'd':
lrun.diff_pool = (POOLRES *)res;
break;
case 'n':
lrun.next_pool = (POOLRES *)res;
break;
}
}
break;
case 'S': /* Storage */
token = lex_get_token(lc, T_NAME);
if (pass == 2) {
res = GetResWithName(R_STORAGE, lc->str);
if (res == NULL) {
scan_err1(lc, _("Could not find specified Storage Resource: %s"),
lc->str);
/* NOT REACHED */
}
lrun.storage = (STORERES *)res;
}
break;
case 'M': /* Messages */
token = lex_get_token(lc, T_NAME);
if (pass == 2) {
res = GetResWithName(R_MSGS, lc->str);
if (res == NULL) {
scan_err1(lc, _("Could not find specified Messages Resource: %s"),
lc->str);
/* NOT REACHED */
}
lrun.msgs = (MSGSRES *)res;
}
break;
case 'm': /* Max run sched time */
token = lex_get_token(lc, T_QUOTED_STRING);
if (!duration_to_utime(lc->str, &utime)) {
scan_err1(lc, _("expected a time period, got: %s"), lc->str);
return;
}
lrun.MaxRunSchedTime = utime;
lrun.MaxRunSchedTime_set = true;
break;
case 'a': /* Accurate */
token = lex_get_token(lc, T_NAME);
if (strcasecmp(lc->str, "yes") == 0 || strcasecmp(lc->str, "true") == 0) {
lrun.accurate = true;
lrun.accurate_set = true;
} else if (strcasecmp(lc->str, "no") == 0 || strcasecmp(lc->str, "false") == 0) {
lrun.accurate = false;
lrun.accurate_set = true;
} else {
scan_err1(lc, _("Expect a YES or NO, got: %s"), lc->str);
}
break;
default:
scan_err1(lc, _("Expected a keyword name, got: %s"), lc->str);
/* NOT REACHED */
break;
} /* end switch */
} /* end if bstrcasecmp */
} /* end for RunFields */
/*
* At this point, it is not a keyword. Check for old syle
* Job Levels without keyword. This form is depreciated!!!
*/
if (!found) {
for (j = 0; joblevels[j].level_name; j++) {
if (bstrcasecmp(lc->str, joblevels[j].level_name)) {
lrun.level = joblevels[j].level;
lrun.job_type = joblevels[j].job_type;
found = true;
break;
}
}
}
} /* end for found */
/*
* Scan schedule times.
* Default is: daily at 0:0
*/
state = s_none;
set_defaults();
for (; token != T_EOL; (token = lex_get_token(lc, T_ALL))) {
int len;
bool pm = false;
bool am = false;
switch (token) {
case T_NUMBER:
state = s_mday;
code = atoi(lc->str) - 1;
if (code < 0 || code > 30) {
scan_err0(lc, _("Day number out of range (1-31)"));
}
break;
case T_NAME: /* This handles drop through from keyword */
case T_UNQUOTED_STRING:
if (strchr(lc->str, (int)'-')) {
state = s_range;
break;
}
if (strchr(lc->str, (int)':')) {
state = s_time;
break;
}
if (strchr(lc->str, (int)'/')) {
state = s_modulo;
break;
}
if (lc->str_len == 3 && (lc->str[0] == 'w' || lc->str[0] == 'W') &&
is_an_integer(lc->str+1)) {
code = atoi(lc->str+1);
if (code < 0 || code > 53) {
scan_err0(lc, _("Week number out of range (0-53)"));
/* NOT REACHED */
}
state = s_woy; /* Week of year */
break;
}
/*
* Everything else must be a keyword
*/
for (i = 0; keyw[i].name; i++) {
if (bstrcasecmp(lc->str, keyw[i].name)) {
state = keyw[i].state;
code = keyw[i].code;
i = 0;
break;
}
}
if (i != 0) {
scan_err1(lc, _("Job type field: %s in run record not found"), lc->str);
/* NOT REACHED */
}
break;
case T_COMMA:
continue;
default:
scan_err2(lc, _("Unexpected token: %d:%s"), token, lc->str);
/* NOT REACHED */
break;
}
switch (state) {
case s_none:
continue;
case s_mday: /* Day of month */
if (!have_mday) {
clear_bits(0, 30, lrun.mday);
have_mday = true;
}
set_bit(code, lrun.mday);
break;
case s_month: /* Month of year */
if (!have_month) {
clear_bits(0, 11, lrun.month);
have_month = true;
}
set_bit(code, lrun.month);
break;
case s_wday: /* Week day */
if (!have_wday) {
clear_bits(0, 6, lrun.wday);
have_wday = true;
}
set_bit(code, lrun.wday);
break;
case s_wom: /* Week of month 1st, ... */
if (!have_wom) {
clear_bits(0, 4, lrun.wom);
have_wom = true;
}
set_bit(code, lrun.wom);
break;
case s_woy:
if (!have_woy) {
clear_bits(0, 53, lrun.woy);
have_woy = true;
}
set_bit(code, lrun.woy);
break;
case s_time: /* Time */
if (!have_at) {
scan_err0(lc, _("Time must be preceded by keyword AT."));
/* NOT REACHED */
}
if (!have_hour) {
clear_bits(0, 23, lrun.hour);
}
// Dmsg1(000, "s_time=%s\n", lc->str);
p = strchr(lc->str, ':');
if (!p) {
scan_err0(lc, _("Time logic error.\n"));
/* NOT REACHED */
}
*p++ = 0; /* Separate two halves */
code = atoi(lc->str); /* Pick up hour */
code2 = atoi(p); /* Pick up minutes */
len = strlen(p);
if (len >= 2) {
p += 2;
}
if (bstrcasecmp(p, "pm")) {
pm = true;
} else if (bstrcasecmp(p, "am")) {
am = true;
} else if (len != 2) {
scan_err0(lc, _("Bad time specification."));
/* NOT REACHED */
}
/*
* Note, according to NIST, 12am and 12pm are ambiguous and
* can be defined to anything. However, 12:01am is the same
* as 00:01 and 12:01pm is the same as 12:01, so we define
* 12am as 00:00 and 12pm as 12:00.
*/
if (pm) {
/*
* Convert to 24 hour time
*/
if (code != 12) {
code += 12;
}
} else if (am && code == 12) {
/*
* AM
*/
code -= 12;
}
if (code < 0 || code > 23 || code2 < 0 || code2 > 59) {
scan_err0(lc, _("Bad time specification."));
/* NOT REACHED */
}
set_bit(code, lrun.hour);
lrun.minute = code2;
have_hour = true;
break;
case s_at:
have_at = true;
break;
case s_last:
lrun.last_set = true;
if (!have_wom) {
clear_bits(0, 4, lrun.wom);
have_wom = true;
}
break;
case s_modulo:
p = strchr(lc->str, '/');
if (!p) {
scan_err0(lc, _("Modulo logic error.\n"));
}
*p++ = 0; /* Separate two halves */
if (is_an_integer(lc->str) && is_an_integer(p)) {
/*
* Check for day modulo specification.
*/
code = atoi(lc->str) - 1;
code2 = atoi(p);
if (code < 0 || code > 30 || code2 < 0 || code2 > 30) {
scan_err0(lc, _("Bad day specification in modulo."));
}
if (code > code2) {
scan_err0(lc, _("Bad day specification, offset must always be <= than modulo."));
}
if (!have_mday) {
clear_bits(0, 30, lrun.mday);
have_mday = true;
}
/*
* Set the bits according to the modulo specification.
*/
for (i = 0; i < 31; i++) {
if (i % code2 == 0) {
set_bit(i + code, lrun.mday);
}
}
} else if (strlen(lc->str) == 3 && strlen(p) == 3 &&
(lc->str[0] == 'w' || lc->str[0] == 'W') &&
(p[0] == 'w' || p[0] == 'W') &&
is_an_integer(lc->str + 1) &&
is_an_integer(p + 1)) {
/*
* Check for week modulo specification.
*/
code = atoi(lc->str + 1);
code2 = atoi(p + 1);
if (code < 0 || code > 53 || code2 < 0 || code2 > 53) {
scan_err0(lc, _("Week number out of range (0-53) in modulo"));
}
if (code > code2) {
scan_err0(lc, _("Bad week number specification in modulo, offset must always be <= than modulo."));
}
if (!have_woy) {
clear_bits(0, 53, lrun.woy);
have_woy = true;
}
/*
* Set the bits according to the modulo specification.
*/
for (i = 0; i < 54; i++) {
if (i % code2 == 0) {
set_bit(i + code - 1, lrun.woy);
}
}
} else {
scan_err0(lc, _("Bad modulo time specification. Format for weekdays is '01/02', for yearweeks is 'w01/w02'."));
}
break;
case s_range:
p = strchr(lc->str, '-');
if (!p) {
scan_err0(lc, _("Range logic error.\n"));
}
*p++ = 0; /* Separate two halves */
if (is_an_integer(lc->str) && is_an_integer(p)) {
/*
* Check for day range.
*/
code = atoi(lc->str) - 1;
code2 = atoi(p) - 1;
if (code < 0 || code > 30 || code2 < 0 || code2 > 30) {
scan_err0(lc, _("Bad day range specification."));
}
if (!have_mday) {
clear_bits(0, 30, lrun.mday);
have_mday = true;
}
if (code < code2) {
set_bits(code, code2, lrun.mday);
} else {
set_bits(code, 30, lrun.mday);
set_bits(0, code2, lrun.mday);
}
} else if (strlen(lc->str) == 3 && strlen(p) == 3 &&
(lc->str[0] == 'w' || lc->str[0] == 'W') &&
(p[0] == 'w' || p[0] == 'W') &&
is_an_integer(lc->str + 1) &&
is_an_integer(p + 1)) {
/*
* Check for week of year range.
*/
code = atoi(lc->str + 1);
code2 = atoi(p + 1);
if (code < 0 || code > 53 || code2 < 0 || code2 > 53) {
scan_err0(lc, _("Week number out of range (0-53)"));
}
if (!have_woy) {
clear_bits(0, 53, lrun.woy);
have_woy = true;
}
if (code < code2) {
set_bits(code, code2, lrun.woy);
} else {
set_bits(code, 53, lrun.woy);
set_bits(0, code2, lrun.woy);
}
} else {
/*
* lookup first half of keyword range (week days or months).
*/
lcase(lc->str);
for (i = 0; keyw[i].name; i++) {
if (bstrcmp(lc->str, keyw[i].name)) {
state = keyw[i].state;
code = keyw[i].code;
i = 0;
break;
}
}
if (i != 0 || (state != s_month && state != s_wday && state != s_wom)) {
scan_err0(lc, _("Invalid month, week or position day range"));
/* NOT REACHED */
}
/*
* Lookup end of range.
*/
lcase(p);
for (i = 0; keyw[i].name; i++) {
if (bstrcmp(p, keyw[i].name)) {
state2 = keyw[i].state;
code2 = keyw[i].code;
i = 0;
break;
}
}
if (i != 0 || state != state2 || code == code2) {
scan_err0(lc, _("Invalid month, weekday or position range"));
/* NOT REACHED */
}
if (state == s_wday) {
if (!have_wday) {
clear_bits(0, 6, lrun.wday);
have_wday = true;
}
if (code < code2) {
set_bits(code, code2, lrun.wday);
} else {
set_bits(code, 6, lrun.wday);
set_bits(0, code2, lrun.wday);
}
} else if (state == s_month) {
if (!have_month) {
clear_bits(0, 11, lrun.month);
have_month = true;
}
if (code < code2) {
set_bits(code, code2, lrun.month);
} else {
/*
* This is a bit odd, but we accept it anyway
*/
set_bits(code, 11, lrun.month);
set_bits(0, code2, lrun.month);
}
} else {
/*
* Must be position
*/
if (!have_wom) {
clear_bits(0, 4, lrun.wom);
have_wom = true;
}
if (code < code2) {
set_bits(code, code2, lrun.wom);
} else {
set_bits(code, 4, lrun.wom);
set_bits(0, code2, lrun.wom);
}
}
}
break;
case s_hourly:
have_hour = true;
set_bits(0, 23, lrun.hour);
break;
case s_weekly:
have_mday = have_wom = have_woy = true;
set_bits(0, 30, lrun.mday);
set_bits(0, 4, lrun.wom);
set_bits(0, 53, lrun.woy);
break;
case s_daily:
have_mday = true;
set_bits(0, 6, lrun.wday);
break;
case s_monthly:
have_month = true;
set_bits(0, 11, lrun.month);
break;
default:
scan_err0(lc, _("Unexpected run state\n"));
/* NOT REACHED */
break;
}
}
/* Allocate run record, copy new stuff into it,
* and append it to the list of run records
* in the schedule resource.
*/
if (pass == 2) {
RUNRES *tail;
/* Create new run record */
RUNRES *nrun = (RUNRES *)malloc(sizeof(RUNRES));
memcpy(nrun, &lrun, sizeof(RUNRES));
nrun ->next = NULL;
if (!*run) { /* If empty list */
*run = nrun; /* Add new record */
} else {
for (tail = *run; tail->next; tail=tail->next)
{ }
tail->next = nrun;
}
}
lc->options = options; /* Restore scanner options */
set_bit(index, res_all->res_sch.hdr.item_present);
clear_bit(index, res_all->hdr.inherit_content);
}
int main(int argc, char *argv[])
{
if (1) {
warn("---- test bitops ----");
unsigned char bits[16];
memset(bits, 0, sizeof(bits));
set_bits(bits, 6, 20);
set_bits(bits, 49, 16);
set_bits(bits, 0x51, 2);
hexdump(bits, sizeof(bits));
/* should return true */
printf("ones = %i\n", all_set(bits, 6, 20));
printf("ones = %i\n", all_set(bits, 49, 16));
printf("ones = %i\n", all_set(bits, 0x51, 2));
/* should return false */
printf("ones = %i\n", all_set(bits, 5, 20));
printf("ones = %i\n", all_set(bits, 49, 17));
printf("ones = %i\n", all_set(bits, 0x51, 3));
clear_bits(bits, 6, 20);
clear_bits(bits, 49, 16);
clear_bits(bits, 0x51, 2);
hexdump(bits, sizeof(bits)); // all zero now
/* corner case */
unsigned char *bitmap = malloc(7);
set_bits(bitmap, 0, 7 * 8);
int ret = all_set(bitmap, 0, 7 * 8);
assert(ret);
clear_bits(bitmap, 0, 7 * 8);
free(bitmap);
}
struct dev *dev = &(struct dev){ .bits = 3 };
struct sb *sb = rapid_sb(dev, .volblocks = 150);
struct inode *bitmap = rapid_open_inode(sb, NULL, 0);
sb->freeblocks = sb->volblocks;
sb->nextalloc = sb->volblocks; // this should wrap around to zero
sb->bitmap = bitmap;
init_buffers(dev, 1 << 20, 0);
unsigned blocksize = 1 << dev->bits;
unsigned dumpsize = blocksize > 16 ? 16 : blocksize;
for (int block = 0; block < 10; block++) {
struct buffer_head *buffer = blockget(bitmap->map, block);
memset(bufdata(buffer), 0, blocksize);
set_buffer_clean(buffer);
}
for (int i = 0; i < 12; i++) {
block_t block = balloc_from_range(sb, 121, 10, 1);
printf("%Li\n", (L)block);
}
hexdump(bufdata(blockget(bitmap->map, 0)), dumpsize);
hexdump(bufdata(blockget(bitmap->map, 1)), dumpsize);
hexdump(bufdata(blockget(bitmap->map, 2)), dumpsize);
block_t block;
sb->nextalloc++; // gap
for (int i = 0; i < 1; i++)
balloc(sb, 1, &block);
sb->nextalloc++; // gap
for (int i = 0; i < 10; i++)
balloc(sb, 1, &block);
hexdump(bufdata(blockget(bitmap->map, 0)), dumpsize);
hexdump(bufdata(blockget(bitmap->map, 1)), dumpsize);
hexdump(bufdata(blockget(bitmap->map, 2)), dumpsize);
bitmap_dump(bitmap, 0, sb->volblocks);
printf("%Li used, %Li free\n", (L)count_range(bitmap, 0, sb->volblocks), (L)sb->freeblocks);
bfree(sb, 0x7e, 1);
bfree(sb, 0x80, 1);
bitmap_dump(bitmap, 0, sb->volblocks);
exit(0);
}
static void init_cpu_capabilities(struct vmm_vcpu *vcpu)
{
u32 funcs, b, c, d;
struct x86_vcpu_priv *priv = x86_vcpu_priv(vcpu);
struct cpuid_response *func_response;
extern struct cpuinfo_x86 cpu_info;
for (funcs = CPUID_BASE_VENDORSTRING;
funcs < CPUID_BASE_FUNC_LIMIT; funcs++) {
func_response =
(struct cpuid_response *)
&priv->standard_funcs[funcs];
switch (funcs) {
case CPUID_BASE_VENDORSTRING:
cpuid(CPUID_BASE_VENDORSTRING,
&func_response->resp_eax,
&func_response->resp_ebx,
&func_response->resp_ecx,
&func_response->resp_edx);
func_response->resp_eax = CPUID_BASE_FUNC_LIMIT;
break;
case CPUID_BASE_FEATURES:
cpuid(CPUID_BASE_FEATURES, &func_response->resp_eax,
&b, &c, &d);
/* NR cpus and apic id */
clear_bits(16, 31, (volatile unsigned long *)&b);
b |= ((vcpu->subid << 24)
| (vcpu->guest->vcpu_count << 16));
func_response->resp_ebx = b;
/* No VMX or x2APIC */
if (cpu_info.vendor == x86_VENDOR_INTEL) {
clear_bit(CPUID_FEAT_ECX_x2APIC_BIT, (volatile unsigned long *)&c);
clear_bit(CPUID_FEAT_ECX_VMX_BIT, (volatile unsigned long *)&c);
}
clear_bit(CPUID_FEAT_ECX_MONITOR_BIT, (volatile unsigned long *)&c);
func_response->resp_ecx = c;
/* No PAE, MTRR, PGE, ACPI, PSE & MSR */
clear_bit(CPUID_FEAT_EDX_PAE_BIT, (volatile unsigned long *)&d);
clear_bit(CPUID_FEAT_EDX_MTRR_BIT, (volatile unsigned long *)&d);
clear_bit(CPUID_FEAT_EDX_PGE_BIT, (volatile unsigned long *)&d);
clear_bit(CPUID_FEAT_EDX_ACPI_BIT, (volatile unsigned long *)&d);
clear_bit(CPUID_FEAT_EDX_HTT_BIT, (volatile unsigned long *)&d);
clear_bit(CPUID_FEAT_EDX_PSE_BIT, (volatile unsigned long *)&d);
clear_bit(CPUID_FEAT_EDX_MSR_BIT, (volatile unsigned long *)&d);
func_response->resp_edx = d;
break;
default:
func_response->resp_eax = 0;
func_response->resp_ebx = 0;
func_response->resp_ecx = 0;
func_response->resp_edx = 0;
break;
}
}
for (funcs = CPUID_EXTENDED_BASE;
funcs < CPUID_EXTENDED_FUNC_LIMIT; funcs++) {
func_response =
(struct cpuid_response *)
&priv->extended_funcs[funcs - CPUID_EXTENDED_BASE];
switch (funcs) {
case CPUID_EXTENDED_BASE:
cpuid(CPUID_EXTENDED_FEATURES,
&func_response->resp_eax,
&func_response->resp_ebx,
&func_response->resp_ecx,
&func_response->resp_edx);
func_response->resp_eax =
CPUID_EXTENDED_L2_CACHE_TLB_IDENTIFIER
- CPUID_EXTENDED_BASE;
break;
case CPUID_EXTENDED_FEATURES: /* replica of base features */
cpuid(CPUID_EXTENDED_FEATURES, &func_response->resp_eax,
&b, &c, &d);
/* NR cpus and apic id */
clear_bits(16, 31, (volatile unsigned long *)&b);
b |= ((vcpu->subid << 24)
| (vcpu->guest->vcpu_count << 16));
func_response->resp_ebx = b;
/* No VMX or x2APIC */
if (cpu_info.vendor == x86_VENDOR_INTEL) {
clear_bit(CPUID_FEAT_ECX_x2APIC_BIT, (volatile unsigned long *)&c);
clear_bit(CPUID_FEAT_ECX_VMX_BIT, (volatile unsigned long *)&c);
}
clear_bit(CPUID_FEAT_ECX_MONITOR_BIT, (volatile unsigned long *)&c);
func_response->resp_ecx = c;
/* No PAE, MTRR, PGE, ACPI, PSE & MSR */
clear_bit(CPUID_FEAT_EDX_PAE_BIT, (volatile unsigned long *)&d);
clear_bit(CPUID_FEAT_EDX_MTRR_BIT, (volatile unsigned long *)&d);
clear_bit(CPUID_FEAT_EDX_PGE_BIT, (volatile unsigned long *)&d);
clear_bit(CPUID_FEAT_EDX_ACPI_BIT, (volatile unsigned long *)&d);
clear_bit(CPUID_FEAT_EDX_HTT_BIT, (volatile unsigned long *)&d);
clear_bit(CPUID_FEAT_EDX_PSE_BIT, (volatile unsigned long *)&d);
clear_bit(CPUID_FEAT_EDX_MSR_BIT, (volatile unsigned long *)&d);
func_response->resp_edx = d;
break;
}
}
switch(cpu_info.vendor) {
case x86_VENDOR_AMD:
for (funcs = CPUID_EXTENDED_BASE;
funcs < CPUID_EXTENDED_FUNC_LIMIT; funcs++) {
switch(funcs) {
case AMD_CPUID_EXTENDED_L1_CACHE_TLB_IDENTIFIER:
cpuid(AMD_CPUID_EXTENDED_L1_CACHE_TLB_IDENTIFIER,
&func_response->resp_eax,
&func_response->resp_ebx,
&func_response->resp_ecx,
&func_response->resp_edx);
break;
case CPUID_EXTENDED_L2_CACHE_TLB_IDENTIFIER:
cpuid(CPUID_EXTENDED_L2_CACHE_TLB_IDENTIFIER,
&func_response->resp_eax,
&func_response->resp_ebx,
&func_response->resp_ecx,
&func_response->resp_edx);
break;
}
}
break;
case x86_VENDOR_INTEL:
for (funcs = CPUID_BASE_VENDORSTRING;
funcs < CPUID_BASE_FUNC_LIMIT; funcs++) {
func_response =
(struct cpuid_response *)
&priv->standard_funcs[funcs];
switch (funcs) {
}
}
break;
}
}
int main()
{
/* part1.c */
printf("== one() ==\n");
one(3, 4);
one(10, 10);
printf("== two() ==\n");
two(50);
two(100);
printf("== three() ==\n");
three();
printf("== four() ==\n");
four(0.5);
four(1.5);
printf("== five() ==\n");
five(3, 3);
five(3, 4);
/* part2.c */
printf("== six() ==\n");
float *p_six;
int i4 = 4, i432 = 432;
p_six = six(&i4);
printf("%d == %f\n", i4, *p_six);
free(p_six);
p_six = six(&i432);
printf("%d == %f\n", i432, *p_six);
free(p_six);
printf("== seven() ==\n");
seven(2, 12);
seven(14, 20);
printf("== eight() ==\n");
eight();
printf("== nine() ==\n");
nine();
printf("== ten() ==\n");
int i_ten = 100;
ten(&i_ten);
printf("%d == 0?\n", i_ten);
/* part3.c */
printf("== eleven() ==\n");
eleven();
printf("== twelve() ==\n");
twelve();
printf("== thirteen() ==\n");
thirteen();
printf("== fourteen() ==\n");
fourteen("red");
fourteen("orange");
fourteen("blue");
fourteen("green");
printf("== fifteen() ==\n");
fifteen(1);
fifteen(2);
fifteen(3);
/* part4.c */
printf("== sixteen() ==\n");
char *str = sixteen();
printf("%s\n", str);
free(str);
printf("== seventeen() ==\n");
seventeen(35);
seventeen(20);
printf("== eighteen() ==\n");
eighteen(3);
eighteen(5);
printf("== clear_bits() ==\n");
long int result;
result = clear_bits(0xFF, 0x55);
printf("%ld\n", result);
result = clear_bits(0x00, 0xF0);
printf("%ld\n", result);
result = clear_bits(0xAB, 0x00);
printf("%ld\n", result);
result = clear_bits(0xCA, 0xFE);
printf("%ld\n", result);
result = clear_bits(0x14, 0x00);
printf("%ld\n", result);
result = clear_bits(0xBB, 0xBB);
printf("%ld\n", result);
return 0;
}
/**
* davinci_spi_bufs - functions which will handle transfer data
* @spi: spi device on which data transfer to be done
* @t: spi transfer in which transfer info is filled
*
* This function will put data to be transferred into data register
* of SPI controller and then wait untill the completion will be marked
* by the IRQ Handler.
*/
static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
{
struct davinci_spi *davinci_spi;
int int_status, count, ret;
u8 conv, tmp;
u32 tx_data, data1_reg_val;
struct davinci_spi_config_t *spi_cfg;
u32 buf_val, flg_val;
struct davinci_spi_platform_data *pdata;
davinci_spi = spi_master_get_devdata(spi->master);
pdata = davinci_spi->pdata;
davinci_spi->tx = t->tx_buf;
davinci_spi->rx = t->rx_buf;
/* convert len to words bbased on bits_per_word */
conv = davinci_spi->slave[spi->chip_select].bytes_per_word;
davinci_spi->count = t->len / conv;
INIT_COMPLETION(davinci_spi->done);
spi_cfg = (struct davinci_spi_config_t *)spi->controller_data;
ret = davinci_spi_bufs_prep(spi, davinci_spi, spi_cfg);
if (ret)
return ret;
/* Enable SPI */
set_bits(davinci_spi->base + SPIGCR1, SPI_SPIGCR1_SPIENA_MASK);
/* Put delay val if required */
iowrite32(0 | (8 << 24) | (8 << 16), davinci_spi->base + SPIDELAY);
count = davinci_spi->count;
data1_reg_val = spi_cfg->cs_hold << SPI_SPIDAT1_CSHOLD_SHIFT;
tmp = ~(0x1 << spi->chip_select);
/* CD default = 0xFF */
/* check for GPIO */
if ((pdata->chip_sel != NULL) &&
(pdata->chip_sel[spi->chip_select] != DAVINCI_SPI_INTERN_CS))
gpio_set_value(pdata->chip_sel[spi->chip_select], 0);
else
clear_bits(davinci_spi->base + SPIDEF, ~tmp);
data1_reg_val |= tmp << SPI_SPIDAT1_CSNR_SHIFT;
while (1)
if (ioread32(davinci_spi->base + SPIBUF)
& SPI_SPIBUF_RXEMPTY_MASK)
break;
/* Determine the command to execute READ or WRITE */
if (t->tx_buf) {
clear_bits(davinci_spi->base + SPIINT, SPI_SPIINT_MASKALL);
while (1) {
tx_data = davinci_spi->get_tx(davinci_spi);
data1_reg_val &= ~(0xFFFF);
data1_reg_val |= (0xFFFF & tx_data);
buf_val = ioread32(davinci_spi->base + SPIBUF);
if ((buf_val & SPI_SPIBUF_TXFULL_MASK) == 0) {
iowrite32(data1_reg_val,
davinci_spi->base + SPIDAT1);
count--;
}
while (ioread32(davinci_spi->base + SPIBUF)
& SPI_SPIBUF_RXEMPTY_MASK)
udelay(1);
/* getting the returned byte */
if (t->rx_buf) {
buf_val = ioread32(davinci_spi->base + SPIBUF);
davinci_spi->get_rx(buf_val, davinci_spi);
}
if (count <= 0)
break;
}
} else {
if (spi_cfg->poll_mode) { /* In Polling mode receive */
while (1) {
/* keeps the serial clock going */
if ((ioread32(davinci_spi->base + SPIBUF)
& SPI_SPIBUF_TXFULL_MASK) == 0)
iowrite32(data1_reg_val,
davinci_spi->base + SPIDAT1);
while (ioread32(davinci_spi->base + SPIBUF)
& SPI_SPIBUF_RXEMPTY_MASK) {
}
flg_val = ioread32(davinci_spi->base + SPIFLG);
buf_val = ioread32(davinci_spi->base + SPIBUF);
davinci_spi->get_rx(buf_val, davinci_spi);
count--;
if (count <= 0)
break;
}
} else { /* Receive in Interrupt mode */
int i;
for (i = 0; i < davinci_spi->count; i++) {
set_bits(davinci_spi->base + SPIINT,
SPI_SPIINT_BITERR_INTR
| SPI_SPIINT_OVRRUN_INTR
| SPI_SPIINT_RX_INTR);
iowrite32(data1_reg_val,
davinci_spi->base + SPIDAT1);
while (ioread32(davinci_spi->base + SPIINT)
& SPI_SPIINT_RX_INTR) {
}
}
iowrite32((data1_reg_val & 0x0ffcffff),
davinci_spi->base + SPIDAT1);
}
}
/*
* Check for bit error, desync error,parity error,timeout error and
* receive overflow errors
*/
int_status = ioread32(davinci_spi->base + SPIFLG);
ret = davinci_spi_check_error(davinci_spi, int_status);
if (ret != 0)
return ret;
/* SPI Framework maintains the count only in bytes so convert back */
davinci_spi->count *= conv;
return t->len;
}
static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
{
struct davinci_spi *davinci_spi;
int int_status = 0;
int count;
u8 conv = 1;
u8 tmp;
u32 data1_reg_val;
struct davinci_spi_dma *davinci_spi_dma;
int word_len, data_type, ret;
unsigned long tx_reg, rx_reg;
struct davinci_spi_config_t *spi_cfg;
struct davinci_spi_platform_data *pdata;
davinci_spi = spi_master_get_devdata(spi->master);
pdata = davinci_spi->pdata;
BUG_ON(davinci_spi->dma_channels == NULL);
davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select];
tx_reg = (unsigned long)davinci_spi->pbase + SPIDAT1;
rx_reg = (unsigned long)davinci_spi->pbase + SPIBUF;
/* used for macro defs */
davinci_spi->tx = t->tx_buf;
davinci_spi->rx = t->rx_buf;
/* convert len to words bbased on bits_per_word */
conv = davinci_spi->slave[spi->chip_select].bytes_per_word;
davinci_spi->count = t->len / conv;
INIT_COMPLETION(davinci_spi->done);
init_completion(&davinci_spi_dma->dma_rx_completion);
init_completion(&davinci_spi_dma->dma_tx_completion);
word_len = conv * 8;
if (word_len <= 8)
data_type = DAVINCI_DMA_DATA_TYPE_S8;
else if (word_len <= 16)
data_type = DAVINCI_DMA_DATA_TYPE_S16;
else if (word_len <= 32)
data_type = DAVINCI_DMA_DATA_TYPE_S32;
else
return -1;
spi_cfg = (struct davinci_spi_config_t *)spi->controller_data;
ret = davinci_spi_bufs_prep(spi, davinci_spi, spi_cfg);
if (ret)
return ret;
/* Put delay val if required */
iowrite32(0, davinci_spi->base + SPIDELAY);
count = davinci_spi->count; /* the number of elements */
data1_reg_val = spi_cfg->cs_hold << SPI_SPIDAT1_CSHOLD_SHIFT;
/* CD default = 0xFF */
tmp = ~(0x1 << spi->chip_select);
if ((pdata->chip_sel != NULL) &&
(pdata->chip_sel[spi->chip_select] != DAVINCI_SPI_INTERN_CS))
gpio_set_value(pdata->chip_sel[spi->chip_select], 0);
else
clear_bits(davinci_spi->base + SPIDEF, ~tmp);
data1_reg_val |= tmp << SPI_SPIDAT1_CSNR_SHIFT;
/* disable all interrupts for dma transfers */
clear_bits(davinci_spi->base + SPIINT, SPI_SPIINT_MASKALL);
/* Disable SPI to write configuration bits in SPIDAT */
clear_bits(davinci_spi->base + SPIGCR1, SPI_SPIGCR1_SPIENA_MASK);
iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1);
/* Enable SPI */
set_bits(davinci_spi->base + SPIGCR1, SPI_SPIGCR1_SPIENA_MASK);
while (1)
if (ioread32(davinci_spi->base + SPIBUF)
& SPI_SPIBUF_RXEMPTY_MASK)
break;
if (t->tx_buf != NULL) {
t->tx_dma = dma_map_single(&spi->dev, (void *)t->tx_buf, count,
DMA_TO_DEVICE);
if (dma_mapping_error(t->tx_dma)) {
pr_err("%s(): Couldn't DMA map a %d bytes TX buffer\n",
__func__, count);
return -1;
}
davinci_set_dma_transfer_params(davinci_spi_dma->dma_tx_channel,
data_type, count, 1, 0, ASYNC);
davinci_set_dma_dest_params(davinci_spi_dma->dma_tx_channel,
tx_reg, INCR, W8BIT);
davinci_set_dma_src_params(davinci_spi_dma->dma_tx_channel,
t->tx_dma, INCR, W8BIT);
davinci_set_dma_src_index(davinci_spi_dma->dma_tx_channel,
data_type, 0);
davinci_set_dma_dest_index(davinci_spi_dma->dma_tx_channel, 0,
0);
} else {
/* We need TX clocking for RX transaction */
t->tx_dma = dma_map_single(&spi->dev,
(void *)davinci_spi->tmp_buf, count + 1,
DMA_TO_DEVICE);
if (dma_mapping_error(t->tx_dma)) {
pr_err("%s(): Couldn't DMA map a %d bytes TX "
"tmp buffer\n", __func__, count);
return -1;
}
davinci_set_dma_transfer_params(davinci_spi_dma->dma_tx_channel,
data_type, count + 1, 1, 0, ASYNC);
davinci_set_dma_dest_params(davinci_spi_dma->dma_tx_channel,
tx_reg, INCR, W8BIT);
davinci_set_dma_src_params(davinci_spi_dma->dma_tx_channel,
t->tx_dma, INCR, W8BIT);
davinci_set_dma_src_index(davinci_spi_dma->dma_tx_channel,
data_type, 0);
davinci_set_dma_dest_index(davinci_spi_dma->dma_tx_channel, 0,
0);
}
if (t->rx_buf != NULL) {
/* initiate transaction */
iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1);
t->rx_dma = dma_map_single(&spi->dev, (void *)t->rx_buf, count,
DMA_FROM_DEVICE);
if (dma_mapping_error(t->rx_dma)) {
pr_err("%s(): Couldn't DMA map a %d bytes RX buffer\n",
__func__, count);
if (t->tx_buf != NULL)
dma_unmap_single(NULL, t->tx_dma,
count, DMA_TO_DEVICE);
return -1;
}
davinci_set_dma_transfer_params(davinci_spi_dma->dma_rx_channel,
data_type, count, 1, 0, ASYNC);
davinci_set_dma_src_params(davinci_spi_dma->dma_rx_channel,
rx_reg, INCR, W8BIT);
davinci_set_dma_dest_params(davinci_spi_dma->dma_rx_channel,
t->rx_dma, INCR, W8BIT);
davinci_set_dma_src_index(davinci_spi_dma->dma_rx_channel, 0,
0);
davinci_set_dma_dest_index(davinci_spi_dma->dma_rx_channel,
data_type, 0);
}
if ((t->tx_buf != NULL) || (t->rx_buf != NULL))
davinci_start_dma(davinci_spi_dma->dma_tx_channel);
if (t->rx_buf != NULL)
davinci_start_dma(davinci_spi_dma->dma_rx_channel);
if ((t->rx_buf != NULL) || (t->tx_buf != NULL))
davinci_spi_set_dma_req(spi, 1);
if (t->tx_buf != NULL)
wait_for_completion_interruptible(
&davinci_spi_dma->dma_tx_completion);
if (t->rx_buf != NULL)
wait_for_completion_interruptible(
&davinci_spi_dma->dma_rx_completion);
if (t->tx_buf != NULL)
dma_unmap_single(NULL, t->tx_dma, count, DMA_TO_DEVICE);
else
dma_unmap_single(NULL, t->tx_dma, count + 1, DMA_TO_DEVICE);
if (t->rx_buf != NULL)
dma_unmap_single(NULL, t->rx_dma, count, DMA_FROM_DEVICE);
/*
* Check for bit error, desync error,parity error,timeout error and
* receive overflow errors
*/
int_status = ioread32(davinci_spi->base + SPIFLG);
ret = davinci_spi_check_error(davinci_spi, int_status);
if (ret != 0)
return ret;
/* SPI Framework maintains the count only in bytes so convert back */
davinci_spi->count *= conv;
return t->len;
}
void ciMethodData::clear_eflag(methodDataOopDesc::EscapeFlag f) {
clear_bits(_eflags, f);
}
int JpegToBmp()
{
unsigned int aux, mark;
int n_restarts, restart_interval, leftover; /* RST check */
int i, j;
int turn;
int temp;
int xmsize;
/* First find the SOI marker: */
//mk_mon_debug_info(9999);
aux = get_next_MK();
if (aux != SOI_MK)
aborted_stream(0);
//if (verbose)
//fprintf(stderr, "%ld:\tINFO:\tFound the SOI marker!\n", ftell(fi));
//;
in_frame = 0;
restart_interval = 0;
for (i = 0; i < 4; i++)
QTvalid[i] = 0;
/* Now process segments as they appear: */
do {
mark = get_next_MK();
switch (mark) {
case SOF_MK: //ffc0 start of the frame
//if (verbose);
//fprintf(stderr, "%ld:\tINFO:\tFound the SOF marker!\n", ftell(fi));
in_frame = 1;
//get_size(fi); /* header size, don't care */
get_size(); //0011 17
/* load basic image parameters */
//fgetc(fi); /* precision, 8bit, don't care */
FGETC(); //8
y_size = get_size();//FGETC() twice
x_size = get_size();
mk_mon_debug_info(x_size);
mk_mon_debug_info(y_size);
//if (verbose);
//fprintf(stderr, "\tINFO:\tImage size is %d by %d\n", x_size, y_size);
//n_comp = fgetc(fi); /* # of components */
n_comp = FGETC();
mk_mon_debug_info(123456);
mk_mon_debug_info(n_comp);
mk_mon_debug_info(654321);
//if (1) {
//fprintf(stderr, "\tINFO:\t");
////switch (n_comp) {
//case 1:
//printf( "Monochrome\n");
//break;
//case 3:
//printf( "Color\n");
// break;
////default:
// printf( "Not a picture!\n");
//break;
//}
//fprintf(stderr, " JPEG image!\n");
//}
for (i = 0; i < n_comp; i++) {
/* component specifiers */
//comp[i].CID = fgetc(fi);
comp[i].CID = FGETC();
//aux = fgetc(fi);
aux = FGETC();
comp[i].HS = first_quad(aux); //0x11 >> 4 1
comp[i].VS = second_quad(aux); //&15 1
//comp[i].QT = fgetc(fi);
comp[i].QT = FGETC();
}
//if ((n_comp > 1) && verbose);
/*fprintf(stderr,
"\tINFO:\tColor format is %d:%d:%d, H=%d\n",
comp[0].HS * comp[0].VS, comp[1].HS * comp[1].VS, comp[2].HS * comp[2].VS,
comp[1].HS);*/
if (init_MCU() == -1)
aborted_stream(1);
/* dimension scan buffer for YUV->RGB conversion */
//FrameBuffer = (unsigned char *)mk_malloc((size_t) x_size * y_size * n_comp);
ColorBuffer = (unsigned char *)mk_malloc((size_t) MCU_sx * MCU_sy * n_comp);
FBuff = (FBlock *) mk_malloc(sizeof(FBlock));
PBuff = (PBlock *) mk_malloc(sizeof(PBlock));
if ( (ColorBuffer == NULL) || (FBuff == NULL) || (PBuff == NULL)) {
//fprintf(stderr, "\tERROR:\tCould not allocate pixel storage!\n");
aborted_stream(2);
}
break;
case DHT_MK:
//if (verbose)
//fprintf(stderr, "%ld:\tINFO:\tDefining Huffman Tables\n", ftell(fi));
if (load_huff_tables() == -1)
aborted_stream(2);
break;
case DQT_MK: //FFDB, the following 0084 shows the table length 132
//if (verbose)
//fprintf(stderr, "%ld:\tINFO:\tDefining Quantization Tables\n", ftell(fi));
if (load_quant_tables() == -1)
aborted_stream(3);
break;
case DRI_MK:
get_size(); /* skip size */
restart_interval = get_size();
mk_mon_debug_info(00000000);
mk_mon_debug_info(restart_interval);
mk_mon_debug_info(00000000);
//if (verbose)
//fprintf(stderr, "%ld:\tINFO:\tDefining Restart Interval %d\n", ftell(fi),
//restart_interval);
//;
break;
case SOS_MK: /* lots of things to do here */ //ffda
//if (verbose);
//fprintf(stderr, "%ld:\tINFO:\tFound the SOS marker!\n", ftell(fi));
get_size(); /* don't care */
//aux = fgetc(fi);
aux = FGETC(); //03
if (aux != (unsigned int)n_comp) {
//fprintf(stderr, "\tERROR:\tBad component interleaving!\n");
aborted_stream(4);
}
for (i = 0; i < n_comp; i++) {
//aux = fgetc(fi);
aux = FGETC();
if (aux != comp[i].CID) {
//fprintf(stderr, "\tERROR:\tBad Component Order!\n");
aborted_stream(5);
}
//aux = fgetc(fi);
aux = FGETC();
comp[i].DC_HT = first_quad(aux);
comp[i].AC_HT = second_quad(aux);
}
get_size();
//fgetc(fi); /* skip things */
FGETC();
MCU_column = 0;
MCU_row = 0;
clear_bits();
reset_prediction();
/* main MCU processing loop here */
if (restart_interval) {
n_restarts = ceil_div(mx_size * my_size, restart_interval) - 1;
leftover = mx_size * my_size - n_restarts * restart_interval;
/* final interval may be incomplete */
for (i = 0; i < n_restarts; i++) {
//temp = restart_interval*i;
for (j = 0; j < restart_interval; j++){
//turn = (temp+j) & 0x3;
process_MCU();}
/* proc till all EOB met */
aux = get_next_MK();
if (!RST_MK(aux)) {
//fprintf(stderr, "%ld:\tERROR:\tLost Sync after interval!\n", ftell(fi));
aborted_stream(6);
} else if (verbose);
//fprintf(stderr, "%ld:\tINFO:\tFound Restart Marker\n", ftell(fi));
reset_prediction();
clear_bits();
} /* intra-interval loop */
} else
leftover = mx_size * my_size; //picture size in units of MCUs
/* process till end of row without restarts */
for (i = 0; i < leftover; i++){
//turn = i & 0x3;
process_MCU();
}
in_frame = 0;
break;
case EOI_MK:
//if (verbose);
//fprintf(stderr, "%ld:\tINFO:\tFound the EOI marker!\n", ftell(fi));
if (in_frame)
aborted_stream(7);
//if (verbose);
/*fprintf(stderr, "\tINFO:\tTotal skipped bytes %d, total stuffers %d\n", passed,
stuffers);*/
//fclose(fi);
//mk_mon_debug_info(8888);
//write_bmp();
// mk_mon_debug_info(6666);
//printf("%ld,%ld", x_size * y_size * n_comp,MCU_sx * MCU_sy * n_comp);
//free_structures();
return 0;
break;
case COM_MK: //ffee
//if (verbose);
//fprintf(stderr, "%ld:\tINFO:\tSkipping comments\n", ftell(fi));
skip_segment();
break;
case EOF:
//if (verbose);
//fprintf(stderr, "%ld:\tERROR:\tRan out of input data!\n", ftell(fi));
aborted_stream(8);
default:
if ((mark & MK_MSK) == APP_MK) {//when read from FFEC, this will hold again
//if (verbose);
//fprintf(stderr, "%ld:\tINFO:\tSkipping application data\n", ftell(fi));
skip_segment();
break;
}
if (RST_MK(mark)) {
reset_prediction();
break;
}
/* if all else has failed ... */
//fprintf(stderr, "%ld:\tWARNING:\tLost Sync outside scan, %d!\n", ftell(fi), mark);
aborted_stream(9);
break;
} /* end switch */
} while (1);
return 0;
}
int JpegToBmp()
{
unsigned int aux, mark;
int n_restarts, restart_interval, leftover; /* RST check */
int i, j;
/*No Need to do the file operation operation*/
#ifdef FILE_IO
fi = fopen(file1, "rb");
if (fi == NULL)
{
return 0;
}
#else
#ifdef INPUT_DMA
// wait for input data to arrive
//mk_mon_debug_info(0xFF);
// read input file DRAM (via my cmem-out)
ddr_input = (unsigned int*)(shared_pt_REMOTEADDR + 1024*1024*4);
cmem_input_circ_buff = (unsigned int*) (mb1_cmemout0_BASEADDR);
hw_dma_receive_addr((int*)(cmem_input_circ_buff + buff_sel * INPUT_READ_SIZE_INT), (void*)(&ddr_input[ddr_input_chunck_offset*INPUT_READ_SIZE_INT]), INPUT_READ_SIZE_INT, (void*)mb1_dma0_BASEADDR);
ddr_input_chunck_offset++;
buff_sel = CHANGE_BUFFER(buff_sel);
for (i = 0 ; i < NUM_OF_INIT_BUFF_LOAD-1; i++)
{
while(hw_dma_status_addr( (void *) mb1_dma0_BASEADDR));
hw_dma_receive_addr((unsigned int*)(cmem_input_circ_buff + buff_sel * INPUT_READ_SIZE_INT), (void*)(&ddr_input[ddr_input_chunck_offset*INPUT_READ_SIZE_INT]), INPUT_READ_SIZE_INT, (void*)mb1_dma0_BASEADDR);
ddr_input_chunck_offset++;
buff_sel = CHANGE_BUFFER(buff_sel);
}
fi = (unsigned char *)(cmem_input_circ_buff);
#else
fi = (volatile unsigned int *)(shared_pt_REMOTEADDR+1024*1024*4);
#endif
#endif
/* First find the SOI marker: */
aux = get_next_MK(fi);
if (aux != SOI_MK)
aborted_stream(fi);
if (verbose)
{
#ifdef FILE_IO
fprintf(stderr, "%ld:\tINFO:\tFound the SOI marker!\n", ftell(fi));
#else
//printf("%d:\tINFO:\tFound the SOI marker!\n", FTELL());
#endif
}
in_frame = 0;
restart_interval = 0;
for (i = 0; i < 4; i++)
QTvalid[i] = 0;
/* Now process segments as they appear: */
do {
mark = get_next_MK(fi);
//mk_mon_debug_info(0XFFF);
//mk_mon_debug_info(mark);
//mk_mon_debug_info(bit_counter);
//mk_mon_debug_info(0XFFF);
switch (mark) {
case SOF_MK:
if (verbose)
{
#ifdef FILE_IO
fprintf(stderr, "%ld:\tINFO:\tFound the SOF marker!\n", ftell(fi));
#else
//printf("%d:\tINFO:\tFound the SOF marker!\n", FTELL());
#endif
}
in_frame = 1;
get_size(fi); /* header size, don't care */
/* load basic image parameters */
#ifdef FILE_IO
fgetc(fi); /* precision, 8bit, don't care */
#else
FGETC(fi); /* precision, 8bit, don't care */
#endif
y_size = get_size(fi);
x_size = get_size(fi);
if (verbose)
{
#ifdef FILE_IO
fprintf(stderr, "\tINFO:\tImage size is %d by %d\n", x_size, y_size);
#else
//printf("\tINFO:\tImage size is %d by %d\n", x_size, y_size);
#endif
}
#ifdef FILE_IO
n_comp = fgetc(fi); /* # of components */
#else
n_comp = FGETC(fi); /* # of components */
#endif
if (verbose)
{
#ifdef FILE_IO
fprintf(stderr, "\tINFO:\t");
#else
//printf("\tINFO:\t");
#endif
switch (n_comp)
{
#ifdef FILE_IO
case 1:
fprintf(stderr, "Monochrome");
break;
case 3:
fprintf(stderr, "Color");
break;
default:
fprintf(stderr, "Not a");
break;
#else
case 1:
//printf("Monochrome");
break;
case 3:
//printf("Color");
break;
default:
//printf("Not a");
break;
#endif
}
#ifdef FILE_IO
fprintf(stderr, " JPEG image!\n");
#else
//printf(" JPEG image!\n");
#endif
}
for (i = 0; i < n_comp; i++)
{
#ifdef FILE_IO
/* component specifiers */
comp[i].CID = fgetc(fi);
aux = fgetc(fi);
comp[i].HS = first_quad(aux);
comp[i].VS = second_quad(aux);
comp[i].QT = fgetc(fi);
#else
/* component specifiers */
comp[i].CID = FGETC(fi);
aux = FGETC(fi);
comp[i].HS = first_quad(aux);
comp[i].VS = second_quad(aux);
comp[i].QT = FGETC(fi);
#endif
}
if ((n_comp > 1) && verbose)
{
#ifdef FILE_IO
fprintf(stderr,
"\tINFO:\tColor format is %d:%d:%d, H=%d\n",
comp[0].HS * comp[0].VS, comp[1].HS * comp[1].VS, comp[2].HS * comp[2].VS,
comp[1].HS);
#else
#if 0
//printf("\tINFO:\tColor format is %d:%d:%d, H=%d\n",
comp[0].HS * comp[0].VS, comp[1].HS * comp[1].VS, comp[2].HS * comp[2].VS,
comp[1].HS);
#endif
#endif
}
if (init_MCU() == -1)
aborted_stream(fi);
/* dimension scan buffer for YUV->RGB conversion */
/* TODO */
#if 0
FrameBuffer = (volatile unsigned char *)mk_malloc((size_t) x_size * y_size * n_comp);
#else
FrameBuffer = (unsigned int *) mb1_cmemout1_BASEADDR;
#endif
//ColorBuffer = (volatile unsigned char *)mk_malloc((size_t) MCU_sx * MCU_sy * n_comp);
#if 0
FBuff = (FBlock *) mk_malloc(sizeof(FBlock));
#else
MY_MK_MALLOC(FBuff,FBlock,1);
#endif
#if 0
PBuff = (PBlock *) mk_malloc(sizeof(PBlock));
#else
MY_MK_MALLOC(PBuff,PBlock,1);
#endif
if ((FrameBuffer == NULL) /*|| (ColorBuffer == NULL)*/ || (FBuff == NULL) || (PBuff == NULL))
{
#ifdef FILE_IO
fprintf(stderr, "\tERROR:\tCould not allocate pixel storage!\n");
#else
//printf("\tERROR:\tCould not allocate pixel storage!\n");
#endif
}
break;
case DHT_MK:
if (verbose)
{
#ifdef FILE_IO
fprintf(stderr, "%ld:\tINFO:\tDefining Huffman Tables\n", ftell(fi));
#else
//printf("%d:\tINFO:\tDefining Huffman Tables\n", FTELL());
#endif
}
if (load_huff_tables(fi) == -1)
aborted_stream(fi);
break;
case DQT_MK:
if (verbose)
{
#ifdef FILE_IO
fprintf(stderr, "%ld:\tINFO:\tDefining Quantization Tables\n", ftell(fi));
#else
//printf("%d:\tINFO:\tDefining Quantization Tables\n", FTELL());
#endif
}
if (load_quant_tables(fi) == -1)
aborted_stream(fi);
break;
case DRI_MK:
get_size(fi); /* skip size */
restart_interval = get_size(fi);
if (verbose)
{
#ifdef FILE_IO
fprintf(stderr, "%ld:\tINFO:\tDefining Restart Interval %d\n", ftell(fi),restart_interval);
#else
//printf("%d:\tINFO:\tDefining Restart Interval %d\n", FTELL(), restart_interval);
#endif
}
break;
case SOS_MK: /* lots of things to do here */
//mk_mon_debug_info(01);
//mk_mon_debug_info(bit_counter);
//mk_mon_debug_info(02);
if (verbose)
{
#ifdef FILE_IO
fprintf(stderr, "%ld:\tINFO:\tFound the SOS marker!\n", ftell(fi));
#else
//printf("%d:\tINFO:\tFound the SOS marker!\n", FTELL(fi));
#endif
}
get_size(fi); /* don't care */
#ifdef FILE_IO
aux = fgetc(fi);
#else
aux = FGETC(fi);
#endif
if (aux != (unsigned int)n_comp)
{
#ifdef FILE_IO
fprintf(stderr, "\tERROR:\tBad component interleaving!\n");
#else
//printf("\tERROR:\tBad component interleaving!\n");
#endif
aborted_stream(fi);
}
for (i = 0; i < n_comp; i++)
{
#ifdef FILE_IO
aux = fgetc(fi);
#else
aux = FGETC(fi);
#endif
if (aux != comp[i].CID)
{
#ifdef FILE_IO
fprintf(stderr, "\tERROR:\tBad Component Order!\n");
#else
//printf("\tERROR:\tBad Component Order!\n");
#endif
aborted_stream(fi);
}
#ifdef FILE_IO
aux = fgetc(fi);
#else
aux = FGETC(fi);
#endif
comp[i].DC_HT = first_quad(aux);
comp[i].AC_HT = second_quad(aux);
}
get_size(fi);
#ifdef FILE_IO
fgetc(fi); /* skip things */
#else
FGETC(fi); /* skip things */
#endif
MCU_column = 0;
MCU_row = 0;
clear_bits();
reset_prediction();
/* main MCU processing loop here */
if (restart_interval)
{
n_restarts = ceil_div(mx_size * my_size, restart_interval) - 1;
leftover = mx_size * my_size - n_restarts * restart_interval;
/* final interval may be incomplete */
for (i = 0; i < n_restarts; i++)
{
for (j = 0; j < restart_interval; j++)
{
process_MCU(fi);
}
/* proc till all EOB met */
aux = get_next_MK(fi);
if (!RST_MK(aux))
{
#ifdef FILE_IO
fprintf(stderr, "%ld:\tERROR:\tLost Sync after interval!\n", ftell(fi));
#else
//printf("%d:\tERROR:\tLost Sync after interval!\n", FTELL());
#endif
aborted_stream(fi);
}
else if (verbose)
{
//printf("%d:\tINFO:\tFound Restart Marker\n", FTELL());
}
reset_prediction();
clear_bits();
} /* intra-interval loop */
}
else
{
leftover = mx_size * my_size;
}
/* process till end of row without restarts */
for (i = 0; i < leftover; i++)
{
process_MCU(fi);
}
in_frame = 0;
//mk_mon_debug_info(0XFEFE);
//mk_mon_debug_info(0XFEFE);
break;
case EOI_MK:
//mk_mon_debug_info(0XDEADBEE2);
if (verbose)
{
#ifdef FILE_IO
fprintf(stderr, "%ld:\tINFO:\tFound the EOI marker!\n", ftell(fi));
#else
//printf("%d:\tINFO:\tFound the EOI marker!\n", FTELL());
#endif
}
if (in_frame)
{
aborted_stream(fi);
}
if (verbose)
{
#ifdef FILE_IO
fprintf(stderr, "\tINFO:\tTotal skipped bytes %d, total stuffers %d\n", passed, stuffers);
#else
//printf("\tINFO:\tTotal skipped bytes %d, total stuffers %d\n", passed, stuffers);
#endif
}
#ifdef FILE_IO
fclose(fi);
#else
/*Check if something has to be done!!*/
#endif
#ifdef FILE_IO
// write_bmp(file2);
#else
/*Need to implement the function to write in DDR*/
// write_bmp_to_ddr_1();
//printf_frame_buffer();
#endif
#ifdef FILE_IO
free_structures();
#else
/*No Need to do anything as structures are static*/
//mk_mon_debug_info(0XDEADBEE1);
//free_structures();
//mk_mon_debug_info(0XDEADBEE2);
#endif
/* signal to core 2 that the FIFO is initialized and can be read from. */
while(cheap_is_empty(producer) != 1)
{
#if 0
mk_mon_debug_info(producer->readc);
mk_mon_debug_info(producer->writec);
#endif
}
*fifo_sync_data = 0;
DMA_SEND_BLOCKING((void *)fifo_sync, (int*)fifo_sync_data, sizeof(int),(void *)mb1_dma0_BASEADDR,DMA_flag);
return 0;
break;
case COM_MK:
if (verbose)
{
#ifdef FILE_IO
fprintf(stderr, "%ld:\tINFO:\tSkipping comments\n", ftell(fi));
#else
//printf("%d:\tINFO:\tSkipping comments\n", FTELL());
#endif
}
skip_segment(fi);
break;
case 0XD9:
//case 0XD9:
if (verbose)
{
#ifdef FILE_IO
fprintf(stderr, "%ld:\tERROR:\tRan out of input data!\n", ftell(fi));
#else
//printf("%d:\tERROR:\tRan out of input data!\n", FTELL());
#endif
}
aborted_stream(fi);
default:
if ((mark & MK_MSK) == APP_MK)
{
if (verbose)
{
#ifdef FILE_IO
fprintf(stderr, "%ld:\tINFO:\tSkipping application data\n", ftell(fi));
#else
//printf("%d:\tINFO:\tSkipping application data\n", FTELL());
#endif
}
skip_segment(fi);
break;
}
if (RST_MK(mark))
{
reset_prediction();
break;
}
/* if all else has failed ... */
#ifdef FILE_IO
fprintf(stderr, "%ld:\tWARNING:\tLost Sync outside scan, %d!\n", ftell(fi), mark);
#else
//printf("%d:\tWARNING:\tLost Sync outside scan, %d!\n", FTELL(), mark);
#endif
aborted_stream(fi);
break;
} /* end switch */
} while (1);
return 0;
}
void BCEscapeAnalyzer::set_method_escape(ArgumentMap vars) {
clear_bits(vars, _arg_local);
}
void ciMethodData::clear_eflag(MethodData::EscapeFlag f) {
clear_bits(_eflags, f);
}
void BCEscapeAnalyzer::set_dirty(ArgumentMap vars) {
clear_bits(vars, _dirty);
}
int JpegToBmp()
{
unsigned int aux, mark;
int n_restarts, restart_interval, leftover; /* RST check */
int i, j;
/* First find the SOI marker: */
aux = get_next_MK();
if (aux != SOI_MK)
aborted_stream(0);
in_frame = 0;
restart_interval = 0;
for (i = 0; i < 4; i++)
QTvalid[i] = 0;
/* Now process segments as they appear: */
do {
mark = get_next_MK();
switch (mark) {
case SOF_MK: //ffc0 start of the frame
in_frame = 1;
get_size(); //0011 17
/* load basic image parameters */
FGETC(); //8
y_size = get_size();//FGETC() twice
x_size = get_size();
n_comp = FGETC();
for (i = 0; i < n_comp; i++) {
comp[i].CID = FGETC();
aux = FGETC();
comp[i].HS = first_quad(aux); //0x11 >> 4 1
comp[i].VS = second_quad(aux); //&15 1
comp[i].QT = FGETC();
}
if (init_MCU() == -1)
aborted_stream(1);
/* dimension scan buffer for YUV->RGB conversion */
ColorBuffer = (unsigned char *)mk_malloc((size_t) MCU_sx * MCU_sy * n_comp);
// ColorBuffer = (unsigned int*)mk_malloc(sizeof(unsigned int) * MCU_sy * x_size);
FBuff = (FBlock *) mk_malloc(sizeof(FBlock));
if ( (ColorBuffer == NULL) || (FBuff == NULL)) {
aborted_stream(2);
}
break;
case DHT_MK:
if (load_huff_tables() == -1)
aborted_stream(2);
break;
case DQT_MK: //FFDB, the following 0084 shows the table length 132
if (load_quant_tables() == -1)
aborted_stream(3);
break;
case DRI_MK:
get_size(); /* skip size */
restart_interval = get_size();
break;
case SOS_MK: /* lots of things to do here */ //ffda
get_size(); /* don't care */
aux = FGETC(); //03
if (aux != (unsigned int)n_comp) {
aborted_stream(4);
}
for (i = 0; i < n_comp; i++) {
aux = FGETC();
if (aux != comp[i].CID) {
aborted_stream(5);
}
aux = FGETC();
comp[i].DC_HT = first_quad(aux);
comp[i].AC_HT = second_quad(aux);
}
get_size();
FGETC();
MCU_column = 0;
MCU_row = 0;
clear_bits();
reset_prediction();
/* main MCU processing loop here */
if (restart_interval) {
n_restarts = ceil_div(mx_size * my_size, restart_interval) - 1;
leftover = mx_size * my_size - n_restarts * restart_interval;
/* final interval may be incomplete */
for (i = 0; i < n_restarts; i++) {
for (j = 0; j < restart_interval; j++)
{
process_MCU();
/* proc till all EOB met */
}
aux = get_next_MK();
if (!RST_MK(aux)) {
aborted_stream(6);
} else if (verbose);
reset_prediction();
clear_bits();
} /* intra-interval loop */
} else
leftover = mx_size * my_size; //picture size in units of MCUs
/* process till end of row without restarts */
for (i = 0; i < leftover; i++){
process_MCU();
}
in_frame = 0;
break;
case EOI_MK:
if (in_frame)
aborted_stream(7);
return 0;
break;
case COM_MK: //ffee
skip_segment();
break;
case EOF:
aborted_stream(8);
default:
if ((mark & MK_MSK) == APP_MK) {//when read from FFEC, this will hold again
skip_segment();
break;
}
if (RST_MK(mark)) {
reset_prediction();
break;
}
/* if all else has failed ... */
aborted_stream(9);
break;
} /* end switch */
} while (1);
return 0;
}
inline void clear_nth_bit(intptr_t& x, int n) { clear_bits(x, nth_bit(n)); }
int main()
{
printf("== one() ==\n");
one(3, 4);
one(10, 10);
printf("== two() ==\n");
const char* a = "20";
two(a);
const char* b = "100";
two(b);
printf("== three() ==\n");
three();
printf("== four() ==\n");
four(0.5);
four(1.5);
printf("== five() ==\n");
const int num1 = 3;
const int num2 = 3;
five(&num1, &num2);
const int num3 = 4;
five(&num1, &num3);
printf("== six() ==\n");
float *p_six;
int i4 = 4, i432 = 432;
p_six = six(&i4);
printf("%d == %f\n", i4, *p_six);
free(p_six);
p_six = six(&i432);
printf("%d == %f\n", i432, *p_six);
free(p_six);
printf("== seven() ==\n");
const char s = 'S';
seven(&s);
const char t = '_';
seven(&t);
printf("== eight() ==\n");
eight();
printf("== nine() ==\n");
nine();
printf("== ten() ==\n");
int i_ten = 100;
ten(&i_ten);
printf("%d == 0?\n", i_ten);
printf("== eleven() ==\n");
eleven();
printf("== twelve() ==\n");
twelve();
printf("== thirteen() ==\n");
thirteen(10);
printf("== fourteen() ==\n");
fourteen("red");
fourteen("orange");
fourteen("blue");
fourteen("green");
printf("== fifteen() ==\n");
fifteen(1);
fifteen(2);
fifteen(3);
printf("== sixteen() ==\n");
char *str = sixteen();
printf("%s\n", str);
free(str);
printf("== seventeen() ==\n");
seventeen(35);
seventeen(20);
printf("== eighteen() ==\n");
eighteen(3);
eighteen(5);
printf("== clear_bits() ==\n");
long int result;
result = clear_bits(0xFF, 0x55);
printf("%ld\n", result);
result = clear_bits(0x00, 0xF0);
printf("%ld\n", result);
result = clear_bits(0xAB, 0x00);
printf("%ld\n", result);
result = clear_bits(0xCA, 0xFE);
printf("%ld\n", result);
result = clear_bits(0x14, 0x00);
printf("%ld\n", result);
result = clear_bits(0xBB, 0xBB);
printf("%ld\n", result);
return 0;
}
void game_manager::reinit_the_game()
{
curr_game_mode = gm_initializing_the_game;
bios_wait_for_vblank();
gfx_manager::fade_out_to_white(15);
gfx_manager::init_hud_vram_as_tiles_start_offset();
// Use video Mode 0, use 1D object mapping, enable forced blank,
// display BG 0, BG 1, and objects.
reg_dispcnt = dcnt_mode0 | dcnt_obj_1d | dcnt_blank_on | dcnt_bg0_on
| dcnt_bg1_on | dcnt_obj_on;
//// Use video Mode 0, use 1D object mapping, enable forced blank,
//// and display BG 0, BG 1, BG 2, BG 3, and objects
//reg_dispcnt = dcnt_mode0 | dcnt_obj_1d | dcnt_blank_on | dcnt_bg0_on
// | dcnt_bg1_on | dcnt_bg2_on | dcnt_bg3_on | dcnt_obj_on;
// Use screen base block 28 for BG0's Map.
reg_bg0cnt = bgcnt_sbb(bg0_sbb) | bgcnt_prio(1);
// Give BG1 a higher display priority than BG0.
reg_bg1cnt = bgcnt_sbb(bg1_sbb) | bgcnt_prio(0);
reg_bg2cnt = bgcnt_sbb(bg2_sbb) | bgcnt_prio(1);
reg_bg3cnt = bgcnt_sbb(bg3_sbb) | bgcnt_prio(1);
//u32 the_metatile_id = gfx_manager::get_metatile_number_of_block_type
// (bt_eyes);
//u32 the_palette_id = gfx_manager::get_palette_number_of_block_type
// (bt_eyes);
//u32 num_tiles_per_metatile = gfx_manager::num_tiles_in_ss_16x16;
//
//for ( u32 i=0; i<screenblock_size; ++i )
//{
// se_ram[bg1_sbb][i]
// = se_id( the_metatile_id * num_tiles_per_metatile )
// | se_palbank(the_palette_id);
//}
//bios_wait_for_vblank();
//for ( u32 i=0; i<screenblock_size; ++i )
//{
// se_ram[bg1_sbb][i] = bt_wood * 4;
//}
// Copy the sprite palettes to OBJ Palette RAM.
gfx_manager::upload_sprite_palettes_to_target(obj_pal_ram);
//// Copy the sprite graphics to OBJ Video RAM.
//gfx_manager::upload_default_sprite_graphics();
// Also, copy the_block_gfxPalLen to BG Palette RAM
gfx_manager::upload_bg_palettes_to_target(bg_pal_ram);
//bios_wait_for_vblank();
// Finally, copy the_block_gfxTiles to BG VRAM, screenblock 0
gfx_manager::upload_bg_tiles_to_vram();
//bios_wait_for_vblank();
sprite_manager::next_oam_index = 0;
active_level_manager::load_level(&test_level);
// Also, start playing music when the game is started.
mmStart( MOD_PRACTICE_17, MM_PLAY_LOOP );
// An extra bios_wait_for_vblank() so that
bios_wait_for_vblank();
gfx_manager::fade_out_to_white(1);
// Disable forced blank
clear_bits( reg_dispcnt, dcnt_blank_mask );
gfx_manager::fade_in(15);
bios_wait_for_vblank();
//curr_game_mode = gm_in_sublevel;
}
void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
{
clear_bits(tsr_bits, &vcpu->arch.tsr);
update_timer_ints(vcpu);
}
