static int pic32_spi_probe(struct udevice *bus) { struct pic32_spi_priv *priv = dev_get_priv(bus); struct dm_spi_bus *dm_spi = dev_get_uclass_priv(bus); struct udevice *clkdev; fdt_addr_t addr; fdt_size_t size; int ret; debug("%s: %d, bus: %i\n", __func__, __LINE__, bus->seq); addr = fdtdec_get_addr_size(gd->fdt_blob, bus->of_offset, "reg", &size); if (addr == FDT_ADDR_T_NONE) return -EINVAL; priv->regs = ioremap(addr, size); if (!priv->regs) return -EINVAL; dm_spi->max_hz = fdtdec_get_int(gd->fdt_blob, bus->of_offset, "spi-max-frequency", 250000000); /* get clock rate */ ret = clk_get_by_index(bus, 0, &clkdev); if (ret < 0) { printf("pic32-spi: error, clk not found\n"); return ret; } priv->clk_rate = clk_get_periph_rate(clkdev, ret); /* initialize HW */ pic32_spi_hw_init(priv); /* set word len */ pic32_spi_set_word_size(priv, SPI_DEFAULT_WORDLEN); /* PIC32 SPI controller can automatically drive /CS during transfer * depending on fifo fill-level. /CS will stay asserted as long as * TX fifo is non-empty, else will be deasserted confirming completion * of the ongoing transfer. To avoid this sort of error we will drive * /CS manually by toggling cs-gpio pins. */ ret = gpio_request_by_name_nodev(gd->fdt_blob, bus->of_offset, "cs-gpios", 0, &priv->cs_gpio, GPIOD_IS_OUT); if (ret) { printf("pic32-spi: error, cs-gpios not found\n"); return ret; } return 0; }
int s5p_serial_setbrg(struct udevice *dev, int baudrate) { struct s5p_serial_platdata *plat = dev->platdata; struct s5p_uart *const uart = plat->reg; u32 uclk; #ifdef CONFIG_CLK_EXYNOS struct udevice *clk_dev; u32 ret; ret = clk_get_by_index(dev, 1, &clk_dev); if (ret < 0) return ret; uclk = clk_get_periph_rate(clk_dev, ret); #else uclk = get_uart_clk(plat->port_id); #endif s5p_serial_baud(uart, uclk, baudrate); return 0; }