/*
* process_usb_nodes() - Process a list of USB nodes, adding them to our list
* of USB ports.
* @blob: fdt blob
* @node_list: list of nodes to process (any <=0 are ignored)
* @count: number of nodes to process
*
* Return: 0 - ok, -1 - error
*/
static int process_usb_nodes(const void *blob, int node_list[], int count)
{
struct fdt_usb config;
int node, i;
int clk_done = 0;
port_count = 0;
for (i = 0; i < count; i++) {
if (port_count == USB_PORTS_MAX) {
printf("tegrausb: Cannot register more than %d ports\n",
USB_PORTS_MAX);
return -1;
}
debug("USB %d: ", i);
node = node_list[i];
if (!node)
continue;
if (fdt_decode_usb(blob, node, &config)) {
debug("Cannot decode USB node %s\n",
fdt_get_name(blob, node, NULL));
return -1;
}
if (!clk_done) {
config_clock(get_pll_timing());
clk_done = 1;
}
config.initialized = 0;
/* add new USB port to the list of available ports */
port[port_count++] = config;
}
return 0;
}
int board_usb_init(const void *blob)
{
struct fdt_usb config;
unsigned osc_freq = clock_get_rate(CLOCK_ID_OSC);
enum clock_osc_freq freq;
int node_list[USB_PORTS_MAX];
int node, count, i;
/* Set up the USB clocks correctly based on our oscillator frequency */
freq = clock_get_osc_freq();
config_clock(usb_pll[freq]);
/* count may return <0 on error */
count = fdtdec_find_aliases_for_id(blob, "usb",
COMPAT_NVIDIA_TEGRA20_USB, node_list, USB_PORTS_MAX);
for (i = 0; i < count; i++) {
debug("USB %d: ", i);
node = node_list[i];
if (!node)
continue;
if (fdt_decode_usb(blob, node, osc_freq, &config)) {
debug("Cannot decode USB node %s\n",
fdt_get_name(blob, node, NULL));
return -1;
}
if (add_port(&config, usb_pll[freq]))
return -1;
set_host_mode(&config);
}
return 0;
}
int main(void) {
config_clock();
initVars();
config_uart1();
config_timer1();
config_timer2();
while(1) {
if(final_send.getGraphData)
sendGraphData();
sendDatax();
}
return 1;
}
int board_usb_init(const void *blob)
{
struct fdt_usb config;
enum clock_osc_freq freq;
int node_list[USB_PORTS_MAX];
int node, count, i;
/* Set up the USB clocks correctly based on our oscillator frequency */
freq = clock_get_osc_freq();
config_clock(usb_pll[freq]);
/* count may return <0 on error */
count = fdtdec_find_aliases_for_id(blob, "usb",
COMPAT_NVIDIA_TEGRA20_USB, node_list, USB_PORTS_MAX);
for (i = 0; i < count; i++) {
if (port_count == USB_PORTS_MAX) {
printf("tegrausb: Cannot register more than %d ports\n",
USB_PORTS_MAX);
return -1;
}
debug("USB %d: ", i);
node = node_list[i];
if (!node)
continue;
if (fdt_decode_usb(blob, node, &config)) {
debug("Cannot decode USB node %s\n",
fdt_get_name(blob, node, NULL));
return -1;
}
config.initialized = 0;
/* add new USB port to the list of available ports */
port[port_count++] = config;
}
return 0;
}
int main(void)
{
WDTCTL = WDTPW | WDTHOLD; // Stop watchdog ti
config_clock();
config_spi();
config_i2c();
config_gpio();
// LED Table
uint8_t led_table[TABLE_SIZE]; // [ 0x0E + Brightness | B | G | R ]
off(led_table, NUM_LED);
uint32_t i, reset_count=0;
srand(32);
/*
// TESTING
uint8_t IO_A, IO_B, IO_C, IO_D;
IO_A = IO_B = IO_C = IO_D = 0;
*/
// SENSE Table
uint16_t sense_table[NUM_SENSE];
/*
UCB1I2CSA = SLAVE_ADDR_MASK; // Slave's address
while(UCB1CTL1 & UCTXSTP);
UCB1CTL1 |= UCTR | UCTXSTT; // Transmit and Start
while(!(UCB1IFG & UCTXIFG));
UCB1TXBUF = 0x00; // Inputs
while(!(UCB1IFG & UCTXIFG));
UCB1CTL1 |= UCTXSTP; // Stop
*/
//P6OUT |= BIT5; // get ready to turn off
//IR_INPUT; // high impedance
for(;;)
{
P1OUT ^= 0x01; // blinky
/*
gather(sense_table);
random_shift(led_table, 48*5);
//flip(led_table);
put_data_24(led_table, 48*5);
for(i=0;i<0xFFFF;i++) // shitty delay
__asm__("nop\nnop\nnop\nnop\nnop\nnop\nnop");
// inject(sense_table);
*/
gather(sense_table);
off(led_table, NUM_LED);
process(led_table, sense_table);
//random_shift(led_table, NUM_LED);
put_data(led_table, NUM_LED);
// Read Inputs
/*
//while(UCB1CTL1 & UCTXSTP);
UCB1CTL1 &= ~UCTR;
UCB1CTL1 |= UCTXSTT; // Transmit and Start
while(UCB1CTL1 & UCTXSTT);
while(!(UCB1IFG & UCRXIFG));
IO_A = UCB1RXBUF; // PORT 0 INPUT
while(!(UCB1IFG & UCRXIFG));
IO_B = UCB1RXBUF; // PORT 1 INPUT
while(!(UCB1IFG & UCRXIFG));
IO_C = UCB1RXBUF; // PORT 0 INPUT
UCB1CTL1 |= UCTXSTP; // Stop
while(UCB1CTL1 & UCTXSTP);
while(!(UCB1IFG & UCRXIFG));
IO_D = UCB1RXBUF; // PORT 1 INPUT
if(IO_B&0x01)
P1OUT |= 0x01;
else
P1OUT ^= 0x01;
*/
/*
for(i=0;i<0xFFFF;i++) // shitty delay
__asm__("nop\nnop\nnop\nnop\nnop\nnop\nnop");
*/
} // main loop
return 0;
}
int board_usb_init(const void *blob)
{
#ifdef CONFIG_OF_CONTROL
struct fdt_usb config;
int clk_done = 0;
int node, upto = 0;
unsigned osc_freq = clock_get_rate(CLOCK_ID_OSC);
#if defined(CONFIG_TEGRA3)
struct usb_ctlr *usb1ctlr;
#endif
do {
node = fdt_decode_next_alias(blob, "usb",
COMPAT_NVIDIA_TEGRA250_USB, &upto);
if (node < 0)
break;
if (fdt_decode_usb(blob, node, osc_freq, &config))
return -1;
if (!config.enabled)
continue;
/* The first port we find gets to set the clocks */
if (!clk_done) {
config_clock(config.params);
clk_done = 1;
}
if (config.host_mode) {
/* Only one host-dev port is supported */
if (host_dev_ctlr)
return -1;
host_dev_ctlr = config.reg;
}
if (add_port(config.periph_id, config.reg, config.params,
config.utmi))
return -1;
#if defined(CONFIG_TEGRA3)
fdt_setup_gpio(&config.vbus_gpio);
fdt_setup_gpio(&config.vbus_pullup_gpio);
usb1ctlr = (struct usb_ctlr *)NV_PA_USB1_BASE;
/*
* BIAS Pad Power Down is common among all 3 USB
* controllers and can be controlled from USB1 only.
*/
bf_writel(UTMIP_BIASPD, 0, &usb1ctlr->utmip_bias_cfg0);
#endif
} while (node);
#else
enum clock_osc_freq freq;
const int *params;
/* Get the Oscillator frequency */
freq = clock_get_osc_freq();
/* Enable PLL U for USB */
params = &usb_pll[freq][0];
config_clock(params);
/* Set up our two ports */
#ifdef CONFIG_TEGRA2_USB1_HOST
host_dev_ctlr = (struct usb_ctlr *)NV_PA_USB1_BASE;
#endif
probe_port((struct usb_ctlr *)CONFIG_TEGRA2_USB0, params);
probe_port((struct usb_ctlr *)CONFIG_TEGRA2_USB1, params);
#endif /* CONFIG_OF_CONTROL */
usb_set_host_mode();
port_current = -1;
return 0;
}
void menu()
{
exit_menu = 0;
uint8_t menu,regreso,opcion=0,continue_menu=0;
while(exit_menu ==0)
{
regreso =0;
clrscr();
gotoxy(0x01,0x01);
UART0_putsf(MenuOp);
menu = UART0_getch();
switch (menu)
{
case 'a': /*Mensaje de marquesina */
{
clrscr();
UART0_putsf(SubMenuOp1);
gotoxy(6,10);
TextSave(TEXT_ADDRESS);
exit_menu =0;
break;
}
case 'b': /*Ajuste de Reloj*/
{
clrscr();
gotoxy(0x01,0x01);
UART0_putsf(SubMenuOp2);
opcion = 0;
while(opcion == 0)
{
if( Timer2_Flag ())
{
gotoxy(0x06,0x06);
Clock_Update();
Clock_Display();
}
if(UART0_kbhit() == 0x0D)
{
clrscr();
gotoxy(0x01,0x01);
UART0_putsf(SubMenuOp2a);
gotoxy(0x06,0x06);
config_clock();
clrscr();
gotoxy(0x01,0x01);
UART0_putsf(SubMenuOp2);
opcion = 0;
}
if(UART0_kbhit() == 0x1B)
{
opcion = 1;
}
} /* ajuste(hr:min) (mostrar reloj actual) */
exit_menu =0;
break;
}
case 'c':
{
exit_menu =1;
clrscr();
break;/*Salir */
}
default:
{
exit_menu =0;
break;
}
}
}
if(continue_menu == 1)
{
clrscr();
}
}
