uint16
cpu_get_src_reg (sim_cpu* cpu, uint8 reg)
{
switch (reg)
{
case 0:
return cpu_get_a (cpu);
case 1:
return cpu_get_b (cpu);
case 2:
return cpu_get_ccr (cpu);
case 3:
return cpu_get_tmp3 (cpu);
case 4:
return cpu_get_d (cpu);
case 5:
return cpu_get_x (cpu);
case 6:
return cpu_get_y (cpu);
case 7:
return cpu_get_sp (cpu);
default:
return 0;
}
}
void
emul_bench (struct _sim_cpu* cpu)
{
int op;
op = cpu_get_d (cpu);
switch (op)
{
case 0:
bench_mode = 0;
gettimeofday (&bench_start, 0);
break;
case 1:
gettimeofday (&bench_stop, 0);
if (bench_mode != 0)
printf ("bench start not called...\n");
bench_mode = 1;
break;
case 2:
{
int sz = 0;
int addr = cpu_get_x (cpu);
double t_start, t_stop, t;
char buf[1024];
op = cpu_get_y (cpu);
t_start = (double) (bench_start.tv_sec) * 1.0e6;
t_start += (double) (bench_start.tv_usec);
t_stop = (double) (bench_stop.tv_sec) * 1.0e6;
t_stop += (double) (bench_stop.tv_usec);
while (sz < 1024)
{
buf[sz] = memory_read8 (cpu, addr);
if (buf[sz] == 0)
break;
sz ++;
addr++;
}
buf[1023] = 0;
if (bench_mode != 1)
printf ("bench_stop not called");
bench_mode = -1;
t = t_stop - t_start;
printf ("%-40.40s [%6d] %3.3f us\n", buf,
op, t / (double) (op));
break;
}
}
}
void
emul_write(struct _sim_cpu* state)
{
int addr = cpu_get_x (state) & 0x0FFFF;
int size = cpu_get_d (state) & 0x0FFFF;
if (addr + size > 0x0FFFF) {
size = 0x0FFFF - addr;
}
state->cpu_running = 0;
while (size)
{
uint8 val = memory_read8 (state, addr);
write(0, &val, 1);
addr ++;
size--;
}
}
uint16
cpu_get_reg (sim_cpu* cpu, uint8 reg)
{
switch (reg)
{
case 0:
return cpu_get_x (cpu);
case 1:
return cpu_get_y (cpu);
case 2:
return cpu_get_sp (cpu);
case 3:
return cpu_get_pc (cpu);
default:
return 0;
}
}
int
sim_fetch_register (SIM_DESC sd, int rn, unsigned char *memory, int length)
{
sim_cpu *cpu;
uint16 val;
int size = 2;
cpu = STATE_CPU (sd, 0);
switch (rn)
{
case A_REGNUM:
val = cpu_get_a (cpu);
size = 1;
break;
case B_REGNUM:
val = cpu_get_b (cpu);
size = 1;
break;
case D_REGNUM:
val = cpu_get_d (cpu);
break;
case X_REGNUM:
val = cpu_get_x (cpu);
break;
case Y_REGNUM:
val = cpu_get_y (cpu);
break;
case SP_REGNUM:
val = cpu_get_sp (cpu);
break;
case PC_REGNUM:
val = cpu_get_pc (cpu);
break;
case PSW_REGNUM:
val = cpu_get_ccr (cpu);
size = 1;
break;
case PAGE_REGNUM:
val = cpu_get_page (cpu);
size = 1;
break;
default:
val = 0;
break;
}
if (size == 1)
{
memory[0] = val;
}
else
{
memory[0] = val >> 8;
memory[1] = val & 0x0FF;
}
return size;
}
static int
m68hc11_reg_fetch (SIM_CPU *cpu, int rn, unsigned char *memory, int length)
{
uint16 val;
int size = 2;
switch (rn)
{
case A_REGNUM:
val = cpu_get_a (cpu);
size = 1;
break;
case B_REGNUM:
val = cpu_get_b (cpu);
size = 1;
break;
case D_REGNUM:
val = cpu_get_d (cpu);
break;
case X_REGNUM:
val = cpu_get_x (cpu);
break;
case Y_REGNUM:
val = cpu_get_y (cpu);
break;
case SP_REGNUM:
val = cpu_get_sp (cpu);
break;
case PC_REGNUM:
val = cpu_get_pc (cpu);
break;
case PSW_REGNUM:
val = cpu_get_ccr (cpu);
size = 1;
break;
case PAGE_REGNUM:
val = cpu_get_page (cpu);
size = 1;
break;
default:
val = 0;
break;
}
if (size == 1)
{
memory[0] = val;
}
else
{
memory[0] = val >> 8;
memory[1] = val & 0x0FF;
}
return size;
}
