Exemplos de cpu_int_restore em C++ (Cpp)

Exemplo n.º 1

Arquivo: sark_pkt.c Projeto: SpiNNakerManchester/spinnaker_tools

uint pkt_tx_kd(uint key, uint data)
{
    pkt_t pkt = {2, data, key};

    uint cpsr = cpu_int_disable();

    if (event.pkt_count >= event.pkt_size) {
        cpu_int_restore(cpsr);
        return 0;
    }

    if (event.pkt_count == 0) {
        vic[VIC_ENABLE] = 1 << CC_TNF_INT;
    }

    event.pkt_count++;

    if (event.pkt_count > event.pkt_max) {
        event.pkt_max = event.pkt_count;
    }

    event.pkt_queue[event.pkt_insert] = pkt;
    event.pkt_insert = (event.pkt_insert + 1) & (event.pkt_size - 1);

    cpu_int_restore(cpsr);

    return 1;
}

Exemplo n.º 2

Arquivo: dumpBounce.c Projeto: PRiME-Manchester/fault_tolerance

// ------------------------------------------------------------------------
// functions
// ------------------------------------------------------------------------
INT_HANDLER timer_int_han (void)
{
  #ifdef DEBUG
    // count entries //##
    sark.vcpu->user2++;
  #endif

  // clear interrupt in timer,
  tc[T1_INT_CLR] = (uint) tc;

  // check if router not blocked
  if ((rtr[RTR_STATUS] & RTR_BLOCKED_MASK) == 0)
  {
    // access packet queue with fiq disabled,
    uint cpsr = cpu_fiq_disable ();

    // if queue not empty turn on packet bouncing,
    if (pkt_queue.tail != pkt_queue.head)
    {
      // restore fiq after queue access,
      cpu_int_restore (cpsr);

      // enable comms. cont. interrupt to bounce packets
      vic[VIC_ENABLE] = 1 << CC_TNF_INT;
    }
    else
    {
      // restore fiq after queue access,
      cpu_int_restore (cpsr);
    }
  }

  #ifdef DEBUG
    // update packet counters,
    //##  sark.vcpu->user0 = pkt_ctr0;
    sark.vcpu->user1 = pkt_ctr1;
    //##  sark.vcpu->user2 = pkt_ctr2;
    //##  sark.vcpu->user3 = pkt_ctr3;
  #endif

  // and tell VIC we're done
  vic[VIC_VADDR] = (uint) vic;
}

Exemplo n.º 3

Arquivo: dumpBounce.c Projeto: PRiME-Manchester/fault_tolerance

INT_HANDLER cc_int_han (void)
{
  //TODO: may need to deal with packet timestamp.

  // check if router not blocked
  if ((rtr[RTR_STATUS] & RTR_BLOCKED_MASK) == 0)
  {
    // access packet queue with fiq disabled,
    uint cpsr = cpu_fiq_disable ();
    
    // if queue not empty bounce packet,
    if (pkt_queue.tail != pkt_queue.head)
    {
      // dequeue packet,
      uint hdr = pkt_queue.queue[pkt_queue.head].hdr;
      uint pld = pkt_queue.queue[pkt_queue.head].pld; 
      uint key = pkt_queue.queue[pkt_queue.head].key;
    
      // update queue pointer,
      pkt_queue.head = (pkt_queue.head + 1) % PKT_QUEUE_SIZE;
    
      // restore fiq after queue access,
      cpu_int_restore (cpsr);
    
      // write header and route,
      cc[CC_TCR] = hdr & PKT_CONTROL_MASK;
      cc[CC_SAR] = cc_sar | (hdr & PKT_ROUTE_MASK);
    
      // maybe write payload,
      if (hdr & PKT_PLD_MASK)
      {
        cc[CC_TXDATA] = pld; 
      }
    
      // write key to fire packet,
      cc[CC_TXKEY] = key;
    
      #ifdef DEBUG
        // count entries //##
        sark.vcpu->user3++;

        // and count packet
        //# pkt_ctr3++;
      #endif
    }
    else
    {
      // restore fiq after queue access,
      cpu_int_restore (cpsr);
    
      // and disable comms. cont. interrupts
      vic[VIC_DISABLE] = 1 << CC_TNF_INT;
    }
  }
  else
  {
    // disable comms. cont. interrupts
    vic[VIC_DISABLE] = 1 << CC_TNF_INT;
  }

  // and tell VIC we're done
  vic[VIC_VADDR] = (uint) vic;
}