void __init davinci_map_common_io(void) { iotable_init(davinci_io_desc, ARRAY_SIZE(davinci_io_desc)); /* We want to check CPU revision early for cpu_is_davinci_xxxx() macros. * IO space mapping must be initialized before we can do that. */ davinci_check_revision(); if (cpu_is_davinci_dm644x()) { iotable_init(dm644x_io_desc, ARRAY_SIZE(dm644x_io_desc)); } else if (cpu_is_davinci_dm6467()) { davinci_cpu_index = DM6467_CPU_IDX; iotable_init(dm646x_io_desc, ARRAY_SIZE(dm646x_io_desc)); } else if (cpu_is_davinci_dm355()) { davinci_cpu_index = DM355_CPU_IDX; } /* Normally devicemaps_init() would flush caches and tlb after * mdesc->map_io(), but we must also do it here because of the CPU * revision check below. */ flush_tlb_all(); flush_cache_all(); davinci_mux_init(); davinci_clk_init(); }
void davinci_gpio_init(void) { struct gpio_bank *gpio_bank; #if defined(CONFIG_ARCH_DAVINCI644x) || defined(CONFIG_ARCH_DAVINCI_DM357) if (cpu_is_davinci_dm644x() || cpu_is_davinci_dm357()) gpio_bank = &gpio_bank_dm6446; #endif #ifdef CONFIG_ARCH_DAVINCI_DM355 if (cpu_is_davinci_dm355()) gpio_bank = &gpio_bank_dm355; #endif #ifdef CONFIG_ARCH_DAVINCI_DM365 if (cpu_is_davinci_dm365()) gpio_bank = &gpio_bank_dm365; #endif #ifdef CONFIG_ARCH_DAVINCI_DM646x if (cpu_is_davinci_dm6467()) gpio_bank = &gpio_bank_dm646x; #endif if (!gpio_bank) BUG(); davinci_gpio_irq_setup(gpio_bank); }
/* * This function initializes the GPIOs used by the SPI module * and it also registers the spi mastere device with the platform * and the spi slave devices with the spi bus */ static int __init davinci_spi_board_init(void) { int ret = 0; int size; struct spi_board_info *davinci_board_info; if (cpu_is_davinci_dm6467()) { davinci_board_info = dm6467_spi_board_info; size = ARRAY_SIZE(dm6467_spi_board_info); davinci_spi_device.resource = dm646x_spi_resources; davinci_spi_device.num_resources = ARRAY_SIZE(dm646x_spi_resources); davinci_spi_device.dev.platform_data = &dm646x_spi_platform_data; } else if (cpu_is_davinci_dm355()) { davinci_board_info = dm355_spi_board_info; size = ARRAY_SIZE(dm355_spi_board_info); davinci_spi_device.resource = dm355_spi_resources; davinci_spi_device.num_resources = ARRAY_SIZE(dm355_spi_resources); davinci_spi_device.dev.platform_data = &dm355_spi_platform_data; } else { printk (KERN_INFO "davinci_spi_board_init: NO spi support\n"); return 0; } /* Register the slave devices present in the board with SPI subsytem */ ret = spi_register_board_info(davinci_board_info, size); /* Register the master controller with platform */ (void)platform_device_register(&davinci_spi_device); return 0; }
void __init davinci_mux_init(void) { const struct pin_config *table; unsigned size; if (cpu_is_davinci_dm365()) { davinci_pins = dm365_pins; davinci_num_pins = ARRAY_SIZE(dm365_pins); table = davinci_dm365_pinmux; size = ARRAY_SIZE(davinci_dm365_pinmux); } else if (cpu_is_davinci_dm355()) { davinci_pins = dm355_pins; davinci_num_pins = ARRAY_SIZE(dm355_pins); table = davinci_dm355_pinmux; size = ARRAY_SIZE(davinci_dm355_pinmux); } else if (cpu_is_davinci_dm6467()) { davinci_pins = dm646x_pins; davinci_num_pins = ARRAY_SIZE(dm646x_pins); table = davinci_dm646x_pinmux; size = ARRAY_SIZE(davinci_dm646x_pinmux); } else if (cpu_is_davinci_dm644x()) { davinci_pins = dm644x_pins; davinci_num_pins = ARRAY_SIZE(dm644x_pins); table = davinci_dm644x_pinmux; size = ARRAY_SIZE(davinci_dm644x_pinmux); } else { if (!cpu_is_davinci_dm357()) BUG(); davinci_pins = dm357_pins; davinci_num_pins = ARRAY_SIZE(dm357_pins); table = davinci_dm357_pinmux; size = ARRAY_SIZE(davinci_dm357_pinmux); } davinci_mux_register(table, size, davinci_get_pins, pinmux_in_use); }
int __init dma_init(void) { struct dma_init_info info; info.edma_num_dmach = EDMA_DAVINCI_NUM_DMACH; info.edma_num_tcc = EDMA_DAVINCI_NUM_TCC; info.cc_reg0_int = IRQ_CCINT0; info.cc_error_int = IRQ_CCERRINT; if (cpu_is_davinci_dm6467()) { info.edma_num_evtq = EDMA_DM646X_NUM_EVQUE; info.edma_num_tc = EDMA_DM646X_NUM_TC; info.edma_num_param = EDMA_DM646X_NUM_PARAMENTRY; info.edma_chmap_exist = EDMA_DM646X_CHMAP_EXIST; info.edmatc_base_addrs = dm646x_edmatc_base_addrs; info.edma2event_map = dm646x_dma_ch_hw_event_map; info.edma_channels_arm = dm646x_edma_channels_arm; info.qdma_channels_arm = dm646x_qdma_channels_arm; info.param_entry_arm = dm646x_param_entry_arm; info.tcc_arm = dm646x_tcc_arm; info.param_entry_reserved = dm646x_param_entry_reserved; info.q_pri = dm646x_queue_priority_mapping; info.q_tc = dm646x_queue_tc_mapping; info.q_wm = dm646x_queue_watermark_level; info.tc_error_int = dm646x_tc_error_int; } else if (cpu_is_davinci_dm355()) { info.edma_num_evtq = EDMA_DM355_NUM_EVQUE; info.edma_num_tc = EDMA_DM355_NUM_TC; info.edma_num_param = EDMA_DM355_NUM_PARAMENTRY; info.edma_chmap_exist = EDMA_DM355_CHMAP_EXIST; info.edmatc_base_addrs = dm355_edmatc_base_addrs; info.edma2event_map = dm355_dma_ch_hw_event_map; info.edma_channels_arm = dm355_edma_channels_arm; info.qdma_channels_arm = dm355_qdma_channels_arm; info.param_entry_arm = dm355_param_entry_arm; info.tcc_arm = dm355_tcc_arm; info.param_entry_reserved = dm355_param_entry_reserved; info.q_pri = dm355_queue_priority_mapping; info.q_tc = dm355_queue_tc_mapping; info.q_wm = dm355_queue_watermark_level; info.tc_error_int = dm355_tc_error_int; } else if (cpu_is_davinci_dm365()) { info.edma_num_evtq = EDMA_DM365_NUM_EVQUE; info.edma_num_tc = EDMA_DM365_NUM_TC; info.edma_num_param = EDMA_DM365_NUM_PARAMENTRY; info.edma_chmap_exist = EDMA_DM365_CHMAP_EXIST; info.edmatc_base_addrs = dm365_edmatc_base_addrs; info.edma2event_map = dm365_dma_ch_hw_event_map; info.edma_channels_arm = dm365_edma_channels_arm; info.qdma_channels_arm = dm365_qdma_channels_arm; info.param_entry_arm = dm365_param_entry_arm; info.tcc_arm = dm365_tcc_arm; info.param_entry_reserved = dm365_param_entry_reserved; info.q_pri = dm365_queue_priority_mapping; info.q_tc = dm365_queue_tc_mapping; info.q_wm = dm365_queue_watermark_level; info.tc_error_int = dm365_tc_error_int; } else { /* Must be dm6446 or dm357 */ if (!cpu_is_davinci_dm644x() && !cpu_is_davinci_dm357()) BUG(); info.edma_num_evtq = EDMA_DM644X_NUM_EVQUE; info.edma_num_tc = EDMA_DM644X_NUM_TC; info.edma_num_param = EDMA_DM644X_NUM_PARAMENTRY; info.edma_chmap_exist = EDMA_DM644X_CHMAP_EXIST; info.edmatc_base_addrs = dm644x_edmatc_base_addrs; info.edma2event_map = dm644x_dma_ch_hw_event_map; info.edma_channels_arm = dm644x_edma_channels_arm; info.qdma_channels_arm = dm644x_qdma_channels_arm; info.param_entry_arm = dm644x_param_entry_arm; info.tcc_arm = dm644x_tcc_arm; info.param_entry_reserved = dm644x_param_entry_reserved; info.q_pri = dm644x_queue_priority_mapping; info.q_tc = dm644x_queue_tc_mapping; info.q_wm = dm644x_queue_watermark_level; info.tc_error_int = dm644x_tc_error_int; } return davinci_dma_init(&info); }
static int __init i2c_davinci_init(void) { int status; struct device *dev = NULL; DEB0("%s %s", __TIME__, __DATE__); DEB1("i2c_davinci_init()"); if (cpu_is_davinci_dm6467()) davinci_i2c_expander_op (0x3A, I2C_INT_DM646X, 0); /* * NOTE: On DaVinci EVM, the i2c bus frequency is set to 20kHz * so that the MSP430, which is doing software i2c, has * some extra processing time */ if (machine_is_davinci_evm()) i2c_davinci_busFreq = 20; else if (machine_is_davinci_dm6467_evm()) i2c_davinci_busFreq = 100; else if (i2c_davinci_busFreq > 200) i2c_davinci_busFreq = 400; /*Fast mode */ else i2c_davinci_busFreq = 100; /*Standard mode */ i2c_clock = clk_get (dev, "I2CCLK"); if (IS_ERR(i2c_clock)) return -1; clk_use (i2c_clock); clk_enable (i2c_clock); i2c_davinci_inputClock = clk_get_rate (i2c_clock); DEB1 ("IP CLOCK = %ld", i2c_davinci_inputClock); memset(&i2c_davinci_dev, 0, sizeof(i2c_davinci_dev)); init_waitqueue_head(&i2c_davinci_dev.cmd_wait); i2c_davinci_dev.regs = (davinci_i2cregsovly)I2C_BASE; status = (int)request_region(I2C_BASE, I2C_IOSIZE, MODULE_NAME); if (!status) { i2c_err("I2C is already in use\n"); return -ENODEV; } status = request_irq(IRQ_I2C, i2c_davinci_isr, 0, "i2c", &i2c_davinci_dev); if (status) { i2c_err("failed to request I2C IRQ"); goto do_release_region; } i2c_set_adapdata(&i2c_davinci_adap, &i2c_davinci_dev); status = i2c_add_adapter(&i2c_davinci_adap); if (status) { i2c_err("failed to add adapter"); goto do_free_irq; } i2c_davinci_reset(&i2c_davinci_dev); if (driver_register(&davinci_i2c_driver) != 0) printk(KERN_ERR "Driver register failed for davinci_i2c\n"); if (platform_device_register(&davinci_i2c_device) != 0) { printk(KERN_ERR "Device register failed for i2c\n"); driver_unregister(&davinci_i2c_driver); } return 0; do_free_irq: free_irq(IRQ_I2C, &i2c_davinci_dev); do_release_region: release_region(I2C_BASE, I2C_IOSIZE); return status; }