static inline void mxc_init_vpu(void)
{
if (cpu_is_mx32()) {
if (platform_device_register(&mxcvpu_device) < 0)
printk(KERN_ERR "Error: Registering the VPU.\n");
}
}
void pmic_voltage_init(void)
{
t_regulator_voltage volt;
/* Enable 4 mc13783 output voltages */
pmic_write_reg(REG_ARBITRATION_SWITCHERS, (1 << 5), (1 << 5));
/* Set mc13783 DVS speed 25mV each 4us */
pmic_write_reg(REG_SWITCHERS_4, (0 << 6), (3 << 6));
if (cpu_is_mx31())
volt.sw1a = SW1A_1_625V;
else
volt.sw1a = SW1A_1_425V;
pmic_power_regulator_set_voltage(SW_SW1A, volt);
volt.sw1a = SW1A_1_25V;
pmic_power_switcher_set_dvs(SW_SW1A, volt);
if (cpu_is_mx32()) {
volt.sw1a = SW1A_0_975V;
pmic_power_switcher_set_stby(SW_SW1A, volt);
}
volt.sw1b = SW1A_1_25V;
pmic_power_switcher_set_dvs(SW_SW1B, volt);
volt.sw1b = SW1A_1_25V;
pmic_power_switcher_set_stby(SW_SW1B, volt);
}
static void mxc_init_nand_mtd(void)
{
if (__raw_readl(MXC_CCM_RCSR) & MXC_CCM_RCSR_NF16B) {
mxc_nand_data.width = 2;
}
if (cpu_is_mx31()) {
(void)platform_device_register(&mxc_nand_mtd_device);
}
if (cpu_is_mx32()) {
(void)platform_device_register(&mxc_nandv2_mtd_device);
}
}
static inline void mxc_init_hmp4e(void)
{
if (cpu_is_mx32())
return;
/* override fuse for Hantro HW clock */
if (readl(IO_ADDRESS(IIM_BASE_ADDR + 0x808)) == 0x4) {
if (!(readl(IO_ADDRESS(IIM_BASE_ADDR + 0x800)) & (1 << 5))) {
writel(readl(IO_ADDRESS(IIM_BASE_ADDR + 0x808)) &
0xfffffffb, IO_ADDRESS(IIM_BASE_ADDR + 0x808));
}
}
platform_device_register(&hmp4e_device);
}
static inline void mxc_init_hmp4e(void)
{
u32 iim_reg = IO_ADDRESS(IIM_BASE_ADDR);
if (cpu_is_mx32())
return;
/* override fuse for Hantro HW clock */
if (__raw_readl(iim_reg + 0x808) == 0x4) {
if (!(__raw_readl(iim_reg + 0x800) & (1 << 5))) {
writel(__raw_readl(iim_reg + 0x808) & 0xfffffffb,
iim_reg + 0x808);
}
}
platform_device_register(&hmp4e_device);
}
