/* ------------------------------------------------------------------------*//**
* @FUNCTION cpu_detect
* @BRIEF Detect cpu and set internal global variables accordingly
* @RETURNS 0 on success
* OMAPCONF_ERR_UNEXPECTED
* OMAPCONF_ERR_CPU if cpu not recognized
* OMAPCONF_ERR_REG_ACCESS
* @param[in] none
* @DESCRIPTION Detect cpu and set internal global variables accordingly
*//*------------------------------------------------------------------------ */
int cpu_detect(void)
{
unsigned int id_code;
unsigned int status;
unsigned int prod_id_1;
#ifdef CPUID_DEBUG
char s[CPU_FULL_NAME_MAX_LENGTH];
char rev_s[CPU_REVISION_MAX_NAME_LENGTH];
char dev_type_s[CPU_DEVICE_TYPE_MAX_NAME_LENGTH];
#endif
/* Init variables */
cpu_init();
/* Retrieve OMAP chip & ES */
if (mem_read(ID_CODE, &id_code) != 0)
return OMAPCONF_ERR_REG_ACCESS;
dprintf("%s(): ID_CODE = 0x%08X\n", __func__, id_code);
switch (id_code) {
case OMAP5432_ES_1_0_ID_CODE:
cpu_set(OMAP_5432);
cpu_revision_set(REV_ES1_0);
break;
case OMAP5430_ES_1_0_ID_CODE:
case 0x0000002F: /* Zebu */
cpu_set(OMAP_5430);
cpu_revision_set(REV_ES1_0);
break;
case OMAP4470_ES_1_0_ID_CODE:
cpu_set(OMAP_4470);
cpu_revision_set(REV_ES1_0);
break;
case OMAP4460_ES_1_1_ID_CODE:
cpu_set(OMAP_4460);
cpu_revision_set(REV_ES1_1);
break;
case OMAP4460_ES_1_0_ID_CODE:
cpu_set(OMAP_4460);
cpu_revision_set(REV_ES1_0);
break;
case OMAP4430_ES_2_3_ID_CODE:
cpu_set(OMAP_4430);
cpu_revision_set(REV_ES2_3);
break;
case OMAP4430_ES_2_2_ID_CODE:
cpu_set(OMAP_4430);
cpu_revision_set(REV_ES2_2);
break;
case OMAP4430_ES_2_1_ID_CODE:
cpu_set(OMAP_4430);
cpu_revision_set(REV_ES2_1);
break;
case OMAP4430_ES_2_0_ID_CODE:
case OMAP4430_ES_1_0_ID_CODE:
/*
* Due to fusing issue between ES1.0 and ES2.0 (same code...),
* revision cannot be correctly detected.
* Workaround is to use Cortex-A9 own revision code, which did
* changed, but it is not accessible from user space...
* Only way is to use /proc/cpuinfo.
*/
cpu_set(OMAP_4430);
cpu_rev_get_from_cpuinfo(&cpu_rev);
switch (cpu_rev) {
case REV_ES2_0:
cpu_revision_set(REV_ES2_0);
break;
case REV_ES1_0:
cpu_revision_set(REV_ES1_0);
break;
default:
dprintf("%s(): unknown ARM Cortex-A9!\n", __func__);
return OMAPCONF_ERR_UNEXPECTED;
}
break;
default:
dprintf("%s(): OMAP ID CODE not recognized! (0x%08X)\n",
__func__, id_code);
return OMAPCONF_ERR_CPU;
}
dprintf("%s(): Chip is %s ES%s\n", __func__,
cpu_gets(s), cpu_revision_gets(rev_s));
/* Retrieve device type */
if (mem_read(OMAP44XX_STATUS, &status) != 0)
return OMAPCONF_ERR_REG_ACCESS;
dprintf("%s(): OMAP44XX_STATUS = 0x%08X\n", __func__, status);
switch (extract_bitfield(status, 8, 2)) {
case 3:
cpu_device_type_set(DEV_GP);
break;
case 2:
cpu_device_type_set(DEV_HS);
break;
case 1:
cpu_device_type_set(DEV_EMU);
break;
default:
cpu_device_type_set(DEV_TEST);
}
dprintf("%s(): Device Type is %s\n", __func__,
cpu_device_type_gets(dev_type_s));
/* Retrieve silicon performance type from EFuse */
if (mem_read(CONTROL_STD_FUSE_PROD_ID_1, &prod_id_1) != 0) {
fprintf(stderr,
"omapconf (%s()): could not read CONTROL_STD_FUSE_PROD_ID_1 register!\n",
__func__);
return OMAPCONF_ERR_REG_ACCESS;
}
dprintf("%s(): CONTROL_STD_FUSE_PROD_ID_1 = 0x%08X\n",
__func__, prod_id_1);
si_type = (silicon_type) extract_bitfield(prod_id_1, 16, 2);
dprintf("%s(): Silicon performance type is %s (%uMHz)\n",
__func__, cpu_silicon_type_gets(s),
cpu_silicon_max_speed_get());
/* Set CPU full name */
cpu_full_name_set();
dprintf("%s(): CPU full name is %s\n", __func__, cpu_full_name);
return 0;
}
/* ------------------------------------------------------------------------*//**
* @FUNCTION cpu_detect
* @BRIEF Detect cpu and set internal global variables accordingly
* @RETURNS 0 on success
* OMAPCONF_ERR_UNEXPECTED
* OMAPCONF_ERR_CPU if cpu not recognized
* OMAPCONF_ERR_REG_ACCESS
* @param[in] none
* @DESCRIPTION Detect cpu and set internal global variables accordingly
*//*------------------------------------------------------------------------ */
int cpu_detect(void)
{
unsigned int status;
unsigned int efuse;
unsigned int prod_id_1;
int ret;
unsigned char status_bit_start;
#ifdef CPUID_DEBUG
char s[CPU_FULL_NAME_MAX_LENGTH];
char rev_s[CPU_REVISION_MAX_NAME_LENGTH];
char dev_type_s[CPU_DEVICE_TYPE_MAX_NAME_LENGTH];
#endif
/* Init variables */
cpu_init();
/* Retrieve OMAP chip & ES */
/* Determine if device is of the AM or OMAP family */
if (cpu_is_omap())
ret = identify_omap();
else
ret = identify_sitara();
if (ret)
return ret;
dprintf("%s(): Chip is %s ES%s\n", __func__,
cpu_gets(s), cpu_revision_gets(rev_s));
/* Retrieve device type */
if (cpu_is_omap44xx()) {
ret = mem_read(OMAP44XX_STATUS, &status);
status_bit_start = 8;
} else if (cpu_is_omap54xx() || cpu_is_dra7xx()) {
ret = mem_read(OMAP54XX_STATUS, &status);
status_bit_start = 6;
} else if (cpu_is_am335x() || cpu_is_am437x()) {
ret = mem_read(AM335X_STATUS, &status);
status_bit_start = 8;
} else {
ret = -1;
}
if (ret)
return OMAPCONF_ERR_REG_ACCESS;
dprintf("%s(): OMAP44XX_STATUS = 0x%08X\n", __func__, status);
switch (extract_bitfield(status, status_bit_start, 2)) {
case 3:
cpu_device_type_set(DEV_GP);
break;
case 2:
cpu_device_type_set(DEV_HS);
break;
case 1:
cpu_device_type_set(DEV_EMU);
break;
default:
cpu_device_type_set(DEV_TEST);
}
dprintf("%s(): Device Type is %s\n", __func__,
cpu_device_type_gets(dev_type_s));
/* Retrieve silicon performance type from EFuse */
if (cpu_is_omap44xx()) {
if (mem_read(CONTROL_STD_FUSE_PROD_ID_1, &prod_id_1) != 0) {
fprintf(stderr,
"omapconf (%s()): could not read CONTROL_STD_FUSE_PROD_ID_1 register!\n",
__func__);
return OMAPCONF_ERR_REG_ACCESS;
}
dprintf("%s(): CONTROL_STD_FUSE_PROD_ID_1 = 0x%08X\n",
__func__, prod_id_1);
si_type = (silicon_type) extract_bitfield(prod_id_1, 16, 2);
} else if (cpu_is_omap54xx()) {
if (cpu_revision_get() == REV_ES1_0) {
if (cpu_silicon_max_speed_get() != 1200)
cpu_silicon_type_set(STANDARD_PERF_SI);
else
cpu_silicon_type_set(SPEEDBIN_SI);
} else {
if (cpu_silicon_max_speed_get() != 1700)
cpu_silicon_type_set(STANDARD_PERF_SI);
else
cpu_silicon_type_set(SPEEDBIN_SI);
}
} else if (cpu_is_dra7xx()) {
/* TBD: implement true detection when ID data is available */
cpu_silicon_type_set(STANDARD_PERF_SI);
} else if (cpu_is_am335x()){
if (mem_read(EFUSE_SMA_REG, &efuse) != 0) {
fprintf(stderr,
"omapconf: (%s()): could not read EFUSE_SMA register!\n",
__func__);
return OMAPCONF_ERR_REG_ACCESS;
}
switch (extract_bitfield(efuse, 16, 2)) {
case 0:
/*
* Silicon revision 1.0 does not support EFUSE SMA REG
* (returns all 0's if read)
* Setting as unknown until there is an alternate method
*/
cpu_package_type_set(PACKAGE_TYPE_MAX);
break;
case 1:
cpu_package_type_set(ZCZ);
break;
case 2:
cpu_package_type_set(ZCE);
break;
default:
fprintf(stderr,
"omapconf: (%s()): could not identify package type!\n",
__func__);
return OMAPCONF_ERR_UNEXPECTED;
}
}
dprintf("%s(): Silicon performance type is %s (%uMHz)\n",
__func__, cpu_silicon_type_gets(s),
cpu_silicon_max_speed_get());
/* Set CPU full name */
cpu_full_name_set();
dprintf("%s(): CPU full name is %s\n", __func__, cpu_full_name);
return 0;
}
/* ------------------------------------------------------------------------*//**
* @FUNCTION lib54xx_export
* @BRIEF export OMAP registers in XML format into file
* @RETURNS 0 in case of success
* OMAPCONF_ERR_ARG otherwise
* @param[in] file: export file name (default if == NULL)
* @DESCRIPTION export OMAP registers in XML format into file. If no
* file name provided, generate one using current date.
*//*------------------------------------------------------------------------ */
int lib54xx_export(char *file)
{
FILE *fp = NULL;
char default_file[64];
char export_date[32];
char version[RELEASE_VERSION_MAX_LENGTH];
char type[RELEASE_TYPE_MAX_LENGTH];
char date[RELEASE_DATE_MAX_LENGTH];
char kversion[KERNEL_VERSION_MAX_LENGTH];
char kauthor[KERNEL_AUTHOR_MAX_LENGTH];
char ktoolchain[KERNEL_TOOLCHAIN_MAX_LENGTH];
char ktype[KERNEL_TYPE_MAX_LENGTH];
char kdate[KERNEL_DATE_MAX_LENGTH];
char dev_name[CPU_NAME_MAX_LENGTH];
char dev_rev[CPU_REVISION_MAX_NAME_LENGTH];
char dev_type[CPU_DEVICE_TYPE_MAX_NAME_LENGTH];
char dev_si_type[CPU_SI_TYPE_MAX_NAME_LENGTH];
unsigned int dev_max_speed;
unsigned int i;
time_t t;
struct tm *tmp;
CHECK_CPU(54xx, OMAPCONF_ERR_CPU);
/* Get date */
t = time(NULL);
tmp = localtime(&t);
/* Open export file */
if (file == NULL) {
/* No file name given, generate default one */
strcpy(default_file,
"omapconf_export_Mon_Jan_01_00_00_00_CET_1970.xml");
if (tmp != NULL)
strftime(default_file, 64,
"omapconf_export_%a_%b_%d_%H_%M_%S_%Z_%Y.xml",
tmp);
fp = fopen(default_file, "w");
} else {
fp = fopen(file, "w");
}
if (fp == NULL) {
printf("Oups... could not create %s!!!\n\n", file);
return 0;
}
/* XML header */
fprintf(fp, "<?xml version=\"1.0\"?>\n\n");
strcpy(export_date, "Mon Jan 01 00:00:00 CET 1970");
if (tmp != NULL)
strftime(export_date, sizeof(export_date),
"%a %b %d %H:%M:%S %Z %Y", tmp);
fprintf(fp,
"<omapconf_export export_date=\"%s\" omapconf_version=\"%u.%u\" omapconf_builddate=\"%s\">\n",
export_date, OMAPCONF_REV_MAJOR, OMAPCONF_REV_MINOR, builddate);
release_details_get(version, type, date);
if (os_is_android())
fprintf(fp,
" <buildinfo os=\"android\" version=\"%s\" type=\"%s\" date=\"%s\">\n",
version, type, date);
else
fprintf(fp, " <buildinfo os=\"linux\" version=\"%s\">\n",
version);
kernel_details_get(kversion, kauthor, ktoolchain, ktype, kdate);
fprintf(fp,
" <kernel version=\"%s\" author=\"%s\" toolchain=\"%s\" type=\"%s\" date=\"%s\">\n",
kversion, kauthor, ktoolchain, ktype, kdate);
cpu_gets(dev_name);
cpu_revision_gets(dev_rev);
cpu_device_type_gets(dev_type);
cpu_silicon_type_gets(dev_si_type);
dev_max_speed = cpu_silicon_max_speed_get();
fprintf(fp,
" <device name=\"%s\" revision=\"%s\" type=\"%s\" silicon_type=\"%s\" max_speed_mhz=\"%u\">\n",
dev_name, dev_rev, dev_type, dev_si_type, dev_max_speed);
/* Export PRM registers */
fprintf(fp, " <module name=\"PRM\">\n");
for (i = 0; i < PRM54XX_MODS_COUNT; i++) {
if ((cpu_revision_get() != REV_ES1_0) &&
(i == PRM54XX_L4PER_PRM))
/* L4_PER does not exist on ES2.x */
continue;
prm54xx_export(fp, (prm54xx_mod_id) i);
}
fprintf(fp, " </module>\n");
/* Export CM registers */
fprintf(fp, " <module name=\"CM\">\n");
for (i = 0; i < CM54XX_MODS_COUNT; i++) {
if ((cpu_revision_get() != REV_ES1_0) &&
(i == CM54XX_L4PER_CM_CORE))
/* Does not exist on ES2.x */
continue;
cm54xx_export(fp, (cm54xx_mod_id) i);
}
fprintf(fp, " </module>\n");
/* Export Smart-Reflex registers */
fprintf(fp, " <module name=\"SR\">\n");
sr54xx_export(fp, SR54XX_SMARTREFLEX_MPU);
sr54xx_export(fp, SR54XX_SMARTREFLEX_MM);
sr54xx_export(fp, SR54XX_SMARTREFLEX_CORE);
fprintf(fp, " </module>\n");
/* Export CONTROL MODULE registers */
fprintf(fp, " <module name=\"CONTROL MODULE\">\n");
ctrlmod54xx_export(fp, CTRLMOD54XX_CTRL_MODULE_CORE);
ctrlmod54xx_export(fp, CTRLMOD54XX_CTRL_MODULE_CORE_PAD);
ctrlmod54xx_export(fp, CTRLMOD54XX_CTRL_MODULE_WKUP);
ctrlmod54xx_export(fp, CTRLMOD54XX_CTRL_MODULE_WKUP_PAD);
fprintf(fp, " </module>\n");
/* Export EMIF registers */
fprintf(fp, " <module name=\"EMIF\">\n");
emif54xx_export(fp, EMIF54XX_EMIF1);
emif54xx_export(fp, EMIF54XX_EMIF2);
fprintf(fp, " </module>\n");
fprintf(fp, " </device>\n");
fprintf(fp, " </kernel>\n");
fprintf(fp, " </build>\n");
fprintf(fp, "</omapconf_export>");
/* Close file */
if (fp != NULL)
fclose(fp);
if (file == NULL)
printf("Registers successfully exported in \"%s\" file.\n\n",
default_file);
else
printf("Registers successfully exported in \"%s\" file.\n\n",
file);
return 0;
}
