void timer_init_save_state(void) {
int i;
create_state_register(ST_TIMER,"timer_count",1,&timer_count,sizeof(double),REG_UINT32);
for(i=0;i<MAX_TIMER;i++) {
create_state_register(ST_TIMER,"t.del_it",i,&timers[i].del_it,sizeof(Uint32),REG_UINT32);
create_state_register(ST_TIMER,"t.time",i,&timers[i].time,sizeof(double),REG_UINT32);
create_state_register(ST_TIMER,"t.param",i,&timers[i].param,sizeof(Sint32),REG_INT32);
}
set_post_load_function(ST_TIMER,timer_post_load_state);
set_pre_save_function(ST_TIMER,timer_pre_save_state);
}
static void cpu_68k_init_save_state(void) {
create_state_register(ST_68k,"dreg",1,(void *)s68000context.dreg,sizeof(Uint32)*8,REG_UINT32);
create_state_register(ST_68k,"areg",1,(void *)s68000context.areg,sizeof(Uint32)*8,REG_UINT32);
create_state_register(ST_68k,"pc",1,(void *)&s68000context.pc,sizeof(Uint32),REG_UINT32);
create_state_register(ST_68k,"asp",1,(void *)&s68000context.asp,sizeof(Uint32),REG_UINT32);
create_state_register(ST_68k,"sr",1,(void *)&s68000context.sr,sizeof(Uint32),REG_UINT32);
create_state_register(ST_68k,"bank",1,(void *)&bankaddress,sizeof(Uint32),REG_UINT32);
create_state_register(ST_68k,"ram",1,(void *)memory.ram,0x10000,REG_UINT8);
// create_state_register(ST_68k,"kof2003_bksw",1,(void *)memory.kof2003_bksw,0x1000,REG_UINT8);
create_state_register(ST_68k,"current_vector",1,(void *)memory.rom.cpu_m68k.p,0x80,REG_UINT8);
set_post_load_function(ST_68k,cpu_68k_post_load_state);
}
void YM_DELTAT_savestate(YM_DELTAT *DELTAT)
{
#if 0 /* NOSTATE */
create_state_register(ST_YM2610_ADPCMB, "DT.portstate" ,1, &DELTAT->portstate , 1*sizeof(Uint8),REG_UINT8);
create_state_register(ST_YM2610_ADPCMB, "DT.address" ,1, &DELTAT->now_addr , 1*sizeof(Uint32),REG_UINT32);
create_state_register(ST_YM2610_ADPCMB, "DT.step" ,1, &DELTAT->now_step , 1*sizeof(Uint32),REG_UINT32);
create_state_register(ST_YM2610_ADPCMB, "DT.adpcmx" ,1, &DELTAT->adpcmx , 1*sizeof(Sint32),REG_INT32);
create_state_register(ST_YM2610_ADPCMB, "DT.adpcmd" ,1, &DELTAT->adpcmd , 1*sizeof(Sint32),REG_INT32);
create_state_register(ST_YM2610_ADPCMB, "DT.adpcml" ,1, &DELTAT->adpcml , 1*sizeof(Sint32),REG_INT32);
create_state_register(ST_YM2610_ADPCMB, "DT.next_leveling",1, &DELTAT->next_leveling , 1*sizeof(Sint32),REG_INT32);
create_state_register(ST_YM2610_ADPCMB, "DT.sample_step",1, &DELTAT->sample_step , 1*sizeof(Sint32),REG_INT32);
set_post_load_function(ST_YM2610_ADPCMB,adpcmb_post_load);
#endif
}
void cpu_z80_init_save_state(void) {
#if 1
create_state_register(ST_Z80,"pc",1,(void *)&z80_st.PC,sizeof(Uint16),REG_UINT16);
create_state_register(ST_Z80,"sp",1,(void *)&z80_st.SP,sizeof(Uint16),REG_UINT16);
create_state_register(ST_Z80,"af",1,(void *)&z80_st.AF,sizeof(Uint16),REG_UINT16);
create_state_register(ST_Z80,"bc",1,(void *)&z80_st.BC,sizeof(Uint16),REG_UINT16);
create_state_register(ST_Z80,"de",1,(void *)&z80_st.DE,sizeof(Uint16),REG_UINT16);
create_state_register(ST_Z80,"hl",1,(void *)&z80_st.HL,sizeof(Uint16),REG_UINT16);
create_state_register(ST_Z80,"ix",1,(void *)&z80_st.IX,sizeof(Uint16),REG_UINT16);
create_state_register(ST_Z80,"iy",1,(void *)&z80_st.IY,sizeof(Uint16),REG_UINT16);
create_state_register(ST_Z80,"af2",1,(void *)&z80_st.AF2,sizeof(Uint16),REG_UINT16);
create_state_register(ST_Z80,"bc2",1,(void *)&z80_st.BC2,sizeof(Uint16),REG_UINT16);
create_state_register(ST_Z80,"de2",1,(void *)&z80_st.DE2,sizeof(Uint16),REG_UINT16);
create_state_register(ST_Z80,"hl2",1,(void *)&z80_st.HL2,sizeof(Uint16),REG_UINT16);
create_state_register(ST_Z80,"iff1",1,(void *)&z80_st.IFF1,sizeof(Uint8),REG_UINT8);
create_state_register(ST_Z80,"iff2",1,(void *)&z80_st.IFF2,sizeof(Uint8),REG_UINT8);
create_state_register(ST_Z80,"im",1,(void *)&z80_st.IM,sizeof(Uint8),REG_UINT8);
/*
create_state_register(ST_Z80,"IRQVector",1,(void *)&z80_st.IRQV,sizeof(Uint8));
create_state_register(ST_Z80,"IRQLine",1,(void *)&z80_st.IRQL,sizeof(Uint8));
*/
#endif
// printf("size %d\n",z80_get_context_size());
/*
raze_context=(void*)malloc(z80_get_context_size());
create_state_register(ST_Z80,"context",1,(void *)raze_context,z80_get_context_size());
*/
create_state_register(ST_Z80,"bank",1,(void *)z80_bank,sizeof(Uint16)*4,REG_UINT16);
create_state_register(ST_Z80,"z80_ram",1,(void *)memory.z80_ram,sizeof(Uint8)*0x800,REG_UINT8);
set_post_load_function(ST_Z80,cpu_z80_post_load_state);
set_pre_save_function(ST_Z80,cpu_z80_pre_save_state);
}
