int main(int argc, char* argv[]) {
fprintf(stderr, "\n\nTesting two puts, a get, a del and two gets\n\n");
hd_t hd;
hdt_t key1 = hdt_string(0, "foo"), value1 = hdt_string(0, "bar");
hdt_t key2 = hdt_string(0, "pun"), value2 = hdt_string(0, "ach");
char mem[100];
hdt_t rvalue = { mem, 100 };
memset(area, 0, MEMSIZE);
hd_init_mem(&hd, 0, (void*)area, MEMSIZE);
CHECK(hd_put(&hd, &key1, &value1, 0));
CHECK(hd_put(&hd, &key2, &value2, 0));
hd_debug(&hd);
debug_mem(area, 512);
CHECK(hd_get(&hd, &key1, &rvalue));
fprintf(stderr, "Received '%-.*s'\n", rvalue.size, (char*)(rvalue.data));
CHECK(hd_del(&hd, &key1, &rvalue));
hd_debug(&hd);
debug_mem(area, 512);
if (hd_get(&hd, &key1, &rvalue) != HDERR_NOTFOUND) {
return ~0;
}
CHECK(hd_get(&hd, &key2, &rvalue));
fprintf(stderr, "Received '%-.*s'\n", rvalue.size, (char*)(rvalue.data));
return 0;
}
int main(int argc, char* argv[]) {
fprintf(stderr, "\n\nTesting rehash\n\n");
hd_t hd;
hdt_t key, value;
memset(area, 0, MEMSIZE);
hd_init_mem(&hd, 0, (void*)area, MEMSIZE);
int i=0;
for (; i<30; i++) {
char keymem[3], valmem[3];
keymem[0] = alphabet[i % 7];
keymem[1] = alphabet[i % 13];
keymem[2] = alphabet[i % 23];
valmem[0] = alphabet[25 - (i % 7)];
valmem[1] = alphabet[25 - (i % 13)];
valmem[2] = alphabet[25 - (i % 23)];
key = (hdt_t) {
keymem, 3
};
value = (hdt_t) {
valmem, 3
};
fprintf(stderr, "\nPutting %-.*s -> %-.*s\n", 3, keymem, 3, valmem);
CHECK(hd_put(&hd, &key, &value, 0));
hd_debug(&hd);
}
hd_debug(&hd);
debug_mem(area, 1024);
return 0;
}
int main(int argc, char* argv[]) {
fprintf(stderr, "\n\nTesting a put, a get, a del and one more put\n\n");
td_t td;
tdt_t key1 = tdt_string(0, "foo"), value1 = tdt_string(0, "bar");
tdt_t key2 = tdt_string(0, "puns"), value2 = tdt_string(0, "achs");
char mem[100];
tdt_t rvalue = { mem, 100 };
memset(area, 0, MEMSIZE);
td_init_mem(&td, 0, (void*)area, MEMSIZE);
fprintf(stderr, "\n\nEmpty:\n");
td_debug(&td);
fprintf(stderr, "\n\nPut:\n");
CHECK(td_put(&td, &key1, &value1, 0));
td_debug(&td);
fprintf(stderr, "\n\nGet:\n");
CHECK(td_get(&td, &key1, &rvalue, 0));
fprintf(stderr, "Received '%-.*s'\n", rvalue.size, (char*)(rvalue.data));
td_debug(&td);
fprintf(stderr, "\n\nDel:\n");
CHECK(td_del(&td, &key1, &rvalue, 0));
td_debug(&td);
fprintf(stderr, "\n\nGet:\n");
if (td_get(&td, &key1, &rvalue, 0) != TDERR_NOTFOUND) {
return ~0;
}
fprintf(stderr, "\n\nPut:\n");
CHECK(td_put(&td, &key2, &value2, 0));
td_debug(&td);
debug_mem(area, 512);
return 0;
}
int emu_0f(unsigned char *lina)
{
unsigned char *orig_lina = lina;
switch (lina[1]) {
case 0x00: /* lldt, ltr */
{
switch (REG_OPCODE(lina[2])) {
case 2: /* 0F 00 /2 LLDT r/m16 Load segment selector r/m16 into LDTR */
{
u_int addr, is_addr, reg, selector;
trace("lldt\n");
if (!opa.pe) {
set_guest_exc(EXC_UD, 0);
goto exc;
}
if (opa.cpl != 0) {
set_guest_exc(EXC_GP, 0);
goto exc;
}
lina += 2; /* move up to RM byte */
decode_rm16(&addr, &is_addr, ®, &lina);
if (emu_get(is_addr, addr, &selector, 2))
goto exc;
if (load_ldtr(selector))
goto exc;
break;
}
case 3: /* 0F 00 /3 LTR r/m16 Load r/m16 into TR */
{
u_int addr, is_addr, reg;
Bit32u dtr;
trace("ltr\n");
if (!opa.pe) {
set_guest_exc(EXC_UD, 0);
goto exc;
}
if (opa.cpl != 0) {
set_guest_exc(EXC_GP, 0);
goto exc;
}
lina += 2; /* move up to RM byte */
decode_rm16(&addr, &is_addr, ®, &lina);
if (emu_get(is_addr, addr, &dtr, 2))
goto exc;
if (load_tr(dtr))
goto exc;
break;
}
default:
unknown(lina);
}
break;
}
case 0x01: /* invlpg, lgdt, lidt, lmsw */
{
int reg_op = REG_OPCODE(lina[2]);
switch (reg_op) {
case 2: /* lgdt */
case 3: /* lidt */
{
u_int addr, is_addr, reg, limit, base;
lina += 2; /* move up to RM byte */
decode_rm(&addr, &is_addr, ®, &lina);
ASSERT(is_addr);
/* addr now points to the m16&32; lina is at next instr */
if (get_memory(opa.seg, addr, &limit, 2) != 0 ||
get_memory(opa.seg, addr+2, &base, opa.opb==4 ? 4 : 3) != 0)
goto exc;
/* by definition of lgdt/lidt, base is a linear address already. */
if (reg_op == 2) {
set_gdt(base, limit);
} else {
set_idt(base, limit);
}
debug_mem("loaded %cdt from 0x%08x\n", reg_op==2 ? 'g' : 'i', base);
break;
}
case 6: /* 0F 01 /6 LMSW r/m16 Loads r/m16 in msw of CR0 */
{
u_int addr, is_addr, reg, val;
trace("lmsw\n");
if (opa.pe && opa.cpl!=0) {
set_guest_exc(13, 0);
goto exc;
}
lina += 2; /* move up to RM byte */
decode_rm16(&addr, &is_addr, ®, &lina);
if (emu_get(is_addr, addr, &val, 2))
goto exc;
if (vmstate.cr[0] & 1 && !(val & 1))
val |= 1; /* can't clear PE with lmsw */
mov_to_cr(0, val, 0x0000000f); /* only PE, MP, EM, and TS can be affected */
break;
}
case 7: /* invlpg */
{
Bit32u ptr;
debug("invlpg\n");
lina += 2; /* move up to memory operand */
if (opa.opb==4) {
ptr = *(Bit32u*)lina;
} else {
ptr = *(Bit16u*)lina;
}
lina += opa.opb;
if (vmstate.cr[0]&PG_MASK) {
/* Modify a pte with itself. This should have the desired side
effect of flushing that TLB entry. */
sys_self_mod_pte_range(0, 0, /* add no flag bits */
0, /* remove no flag bits */
ptr, 1);
}
break;
}
default:
unknown(lina);
}
break;
}
case 0x06: /* clts 0F 06 */
{
if (opa.cpl!=0) {
set_guest_exc(13, 0);
goto exc;
} else {
vmstate.cr[0] &= ~TS_MASK;
lina += 2;
}
break;
}
case 0x08: /* invd 0F 08 */
case 0x09: /* wbinvd 0F 09 */
{
if (opa.cpl!=0) {
set_guest_exc(13, 0);
goto exc;
} else {
/* will not implement */
lina += 2;
}
break;
}
case 0x0b: /* UD2 */
{
set_guest_exc(6, 0);
goto exc;
}
case 0x20: /* MOV r <- CRx */
{
int cr = REG_OPCODE(lina[2]);
int reg = RM(lina[2]);
ASSERT(cr<5);
set_reg(reg, vmstate.cr[cr], 4);
lina += 3;
break;
}
case 0x21: /* MOV r <- DRx */
{
int dr = REG_OPCODE(lina[2]);
int reg = RM(lina[2]);
set_reg(reg, vmstate.dr[dr], 4);
lina += 3;
break;
}
case 0x22: /* MOV CRx <- r */
{
int cr = REG_OPCODE(lina[2]);
ASSERT(cr<5);
if (opa.pe && opa.cpl!=0) {
set_guest_exc(13, 0);
goto exc;
}
mov_to_cr(cr, get_reg(RM(lina[2]), 4), 0xffffffff);
lina += 3;
break;
}
case 0x23: /* MOV DRx <- r */
{
int dr = REG_OPCODE(lina[2]);
debug("mov dr%d <- r%d\n", dr, RM(lina[2]));
if (opa.pe && opa.cpl!=0) {
set_guest_exc(13, 0);
goto exc;
}
vmstate.dr[dr] = get_reg(RM(lina[2]), 4);
lina += 3;
break;
}
case 0x30: /* wrmsr */
{
int ctr = 0;
if (REG(ecx) == P6MSR_CTRSEL0)
ctr = 0;
else if (REG(ecx) == P6MSR_CTRSEL1)
ctr = 1;
else
unknown(lina); /* only performance counters are implemented */
sys_pctr(ctr==0 ? PCIOCS0 : PCIOCS1, 0, ®(eax));
lina += 2;
break;
}
case 0x32: /* rdmsr */
{
struct pctrst p;
int ctr = 0;
if (REG(ecx) == P6MSR_CTR0)
ctr = 0;
else if (REG(ecx) == P6MSR_CTR1)
ctr = 1;
else
unknown(lina); /* only performance counters are implemented */
sys_pctr(PCIOCRD, 0, &p);
REG(eax) = p.pctr_hwc[ctr];
REG(edx) = p.pctr_hwc[ctr] >> 32;
lina += 2;
break;
}
#if 0
case 0x33: /* rdpmc */
{
struct pctrst p;
/* or cpl!=0 and cr4 ... */
if (REG(ecx)>1) {
set_guest_exc(EXC_GP, 0);
goto exc;
}
sys_pctr(PCIOCRD, 0, &p);
REG(eax) = p.pctr_hwc[REG(ecx)];
REG(edx) = p.pctr_hwc[REG(ecx)] >> 32;
lina += 2;
break;
}
#endif
case 0xa2: /* cpuid */
{
/* cpuid may trap on a Cyrix. I don't care. */
leaveemu(ERR_UNIMPL);
break;
}
case 0xb2: /* lss */
case 0xb4: /* lfs */
case 0xb5: /* lgs */
{
int seg;
if (lina[1]==0xb2) {
seg = REGNO_SS;
} else if (lina[1]==0xb4) {
seg = REGNO_FS;
} else
seg = REGNO_GS;
if (load_far_pointer(&lina, seg))
goto exc;
break;
}
case 0x31: /* rdtsc ... should be enabled in xok */
case 0xc8: /* bswap should not trap */
default:
unknown(lina);
}
REG(eip) += lina-orig_lina;
return 0;
exc:
return -1;
}
