int hdmi_dst_display_path_config(bool enable)
{
HDMI_FUNC();
if (enable)
{
//FIXME: now nothing can be seen on TV if output UYVY from WDMA0
unsigned int hdmiSourceAddr = hdmi_mva_r;// + p->hdmi_width * p->hdmi_height * hdmi_bpp * hdmi_buffer_read_id;
struct disp_path_config_struct config = {0};
// Config RDMA->DPI1
config.srcWidth = 1280;
config.srcHeight = 720;
config.srcModule = DISP_MODULE_RDMA1;
config.inFormat = RDMA_INPUT_FORMAT_ARGB;
config.outFormat = RDMA_OUTPUT_FORMAT_ARGB;
config.addr = hdmiSourceAddr;
config.pitch = config.srcWidth * 4;
config.dstModule = DISP_MODULE_DPI0;
//if(-1 == dp_mutex_dst)
// dp_mutex_dst = disp_lock_mutex();
dp_mutex_dst = 2;
disp_dump_reg(DISP_MODULE_RDMA0);
disp_dump_reg(DISP_MODULE_RDMA1);
disp_dump_reg(DISP_MODULE_CONFIG);
HDMI_LOG("Get mutex ID %d for RDMA1>DPI1\n", dp_mutex_dst);
disp_path_get_mutex_(dp_mutex_dst);
disp_path_config_(&config, dp_mutex_dst);
disp_path_release_mutex_(dp_mutex_dst);
disp_dump_reg(DISP_MODULE_CONFIG);
disp_dump_reg(DISP_MODULE_RDMA0);
disp_dump_reg(DISP_MODULE_RDMA1);
}
else
{
if (-1 != dp_mutex_dst)
{
//FIXME: release mutex timeout
HDMI_LOG("Stop RDMA1>DPI1\n");
disp_path_get_mutex_(dp_mutex_dst);
DISP_REG_SET_FIELD(1 << dp_mutex_src , DISP_REG_CONFIG_MUTEX_INTEN, 1);
RDMAStop(1);
RDMAReset(1);
disp_path_release_mutex_(dp_mutex_dst);
//disp_unlock_mutex(dp_mutex_dst);
dp_mutex_dst = -1;
}
}
return 0;
}
int ddp_mem_test(void)
{
int result = 0;
struct disp_path_config_struct config;
unsigned int* pSrc;
unsigned char* pSrcPa;
unsigned int* pDst;
unsigned char* pDstPa;
pSrc= dma_alloc_coherent(NULL, DDP_TEST_WIDTH*DDP_TEST_HEIGHT*DDP_TEST_BPP, (dma_addr_t *)&pSrcPa, GFP_KERNEL);
if(pSrc==0 || pSrcPa==0)
{
printk("dma_alloc_coherent error! dma memory not available.\n");
return 0;
}
else
{
printk("[ddp] pSrc=0x%x, pSrcPa=0x%x \n", (unsigned int)pSrc, (unsigned int)pSrcPa);
}
memcpy((void*)pSrc, data_rgb888_64x64, DDP_TEST_WIDTH*DDP_TEST_HEIGHT*DDP_TEST_BPP);
pDst= dma_alloc_coherent(NULL, DDP_TEST_WIDTH*DDP_TEST_HEIGHT*DDP_TEST_BPP, (dma_addr_t *)&pDstPa, GFP_KERNEL);
if(pDst==0 || pDstPa==0)
{
printk("dma_alloc_coherent error! dma memory not available.\n");
return 0;
}
else
{
printk("[ddp] pDst=0x%x, pDstPa=0x%x \n",(unsigned int) pDst, (unsigned int)pDstPa);
}
memset((void*)pDst, 0, DDP_TEST_WIDTH*DDP_TEST_HEIGHT*DDP_TEST_BPP);
// config port to physical
{
M4U_PORT_STRUCT sPort;
sPort.ePortID = M4U_PORT_LCD_W;
sPort.Virtuality = 0;
sPort.Security = 0;
sPort.Distance = 1;
sPort.Direction = 0;
m4u_config_port(&sPort);
}
config.srcModule = DISP_MODULE_OVL;
config.addr = (unsigned int)pSrcPa;
config.inFormat = eRGB888;
config.pitch = DDP_TEST_WIDTH;
config.srcROI.x = 0;
config.srcROI.y = 0;
config.srcROI.width = DDP_TEST_WIDTH;
config.srcROI.height = DDP_TEST_HEIGHT;
config.srcWidth = DDP_TEST_WIDTH;
config.srcHeight = DDP_TEST_HEIGHT;
config.dstModule = DISP_MODULE_WDMA0;
config.outFormat = eRGB888;
config.dstAddr = (unsigned int)pDstPa;
config.dstWidth = DDP_TEST_WIDTH;
config.dstHeight = DDP_TEST_HEIGHT;
config.dstPitch = DDP_TEST_WIDTH;
/*
disp_power_on(DISP_MODULE_ROT);
disp_power_on(DISP_MODULE_SCL);
disp_power_on(DISP_MODULE_WDMA0);
*/
disp_path_get_mutex_(DDP_MUTEX_FOR_ROT_SCL_WDMA);
disp_path_config_(&config, DDP_MUTEX_FOR_ROT_SCL_WDMA);
printk("*after ddp test config start: -------------------\n");
disp_dump_reg(DISP_MODULE_OVL);
disp_dump_reg(DISP_MODULE_WDMA0);
disp_dump_reg(DISP_MODULE_CONFIG);
printk("*after ddp test config end: ---------------------\n");
disp_path_release_mutex_(DDP_MUTEX_FOR_ROT_SCL_WDMA);
if(*(volatile unsigned int*)DISP_REG_CONFIG_MUTEX1 != 0)
{
*(volatile unsigned int*)DISP_REG_CONFIG_MUTEX1 = 0;
}
printk("ddp_mem_test wdma wait done... \n");
WDMAWait(0);
printk("ddp_mem_test wdma done! \n");
if(0) //compare source
{
unsigned int diff_cnt = 0;
unsigned int t=0;
unsigned int size = DDP_TEST_WIDTH*DDP_TEST_HEIGHT*DDP_TEST_BPP;
for(t=0;t<size;t++)
{
if( *((unsigned char*)pSrc+t) != *((unsigned char*)data_rgb888_64x64+t) )
{
diff_cnt++;
printk("t=%d, diff_cnt=%d, dst=0x%x, gold=0x%x \n",
t,
diff_cnt,
*((unsigned char*)pSrc+t),
*((unsigned char*)data_rgb888_64x64+t) );
}
}
if(diff_cnt == 0)
printk("ddp_mem_test src compare result: success \n");
else
{
printk("ddp_mem_test src compare result: fail \n");
printk("detail, %d, %d, %%%d \n", diff_cnt, size, diff_cnt*100/size);
result = -1;
}
}
if(1) //compare dst
{
unsigned int diff_cnt = 0;
unsigned int t=0;
unsigned int size = DDP_TEST_WIDTH*DDP_TEST_HEIGHT*DDP_TEST_BPP;
for(t=0;t<size;t++)
{
if( *((unsigned char*)pDst+t) != *((unsigned char*)data_rgb888_64x64_golden+t) )
{
diff_cnt++;
printk("t=%d, diff_cnt=%d, dst=0x%x, gold=0x%x \n",
t,
diff_cnt,
*((unsigned char*)pDst+t),
*((unsigned char*)data_rgb888_64x64_golden+t) );
}
}
if(diff_cnt == 0)
printk("ddp_mem_test result: success \n");
else
{
printk("ddp_mem_test result: fail \n");
printk("detail, %d, %d, %%%d \n", diff_cnt, size, diff_cnt*100/size);
result = -1;
}
}
// print out dst buffer to save as golden
if(0)
{
unsigned int t=0;
unsigned int size = DDP_TEST_WIDTH*DDP_TEST_HEIGHT*DDP_TEST_BPP;
for(t=0;t<size;t++)
{
printk("0x%x, ", *((unsigned char*)pDst+t));
if((t+1)%12==0)
{
printk("\n%05d: ", (t+1)/12);
}
}
}
/*
disp_power_off(DISP_MODULE_ROT);
disp_power_off(DISP_MODULE_SCL);
disp_power_off(DISP_MODULE_WDMA0);
*/
//dealloc memory
dma_free_coherent(NULL, DDP_TEST_WIDTH*DDP_TEST_HEIGHT*DDP_TEST_BPP, pSrc, (dma_addr_t)&pSrcPa);
dma_free_coherent(NULL, DDP_TEST_WIDTH*DDP_TEST_HEIGHT*DDP_TEST_BPP, pDst, (dma_addr_t)&pDstPa);
return result;
}
