static int dpi_display_enable(struct omap_dss_device *dssdev)
{
int r;
r = omap_dss_start_device(dssdev);
if (r) {
DSSERR("failed to start device\n");
goto err0;
}
if (dssdev->state != OMAP_DSS_DISPLAY_DISABLED) {
DSSERR("display already enabled\n");
r = -EINVAL;
goto err1;
}
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
r = dpi_basic_init(dssdev);
if (r)
goto err2;
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dss_clk_enable(DSS_CLK_FCK2);
enable_vpll2_power(1);
r = dsi_pll_init(1, 1);
if (r)
goto err3;
#endif
r = dpi_set_mode(dssdev);
if (r)
goto err4;
mdelay(2);
dispc_enable_lcd_out(1);
r = dssdev->driver->enable(dssdev);
if (r)
goto err5;
dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
return 0;
err5:
dispc_enable_lcd_out(0);
err4:
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dsi_pll_uninit();
err3:
dss_clk_disable(DSS_CLK_FCK2);
#endif
err2:
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
err1:
omap_dss_stop_device(dssdev);
err0:
return r;
}
static void dpi_display_disable(struct omap_dss_device *dssdev)
{
if (dssdev->state == OMAP_DSS_DISPLAY_DISABLED)
return;
if (dssdev->state == OMAP_DSS_DISPLAY_SUSPENDED)
dpi_display_resume(dssdev);
dssdev->driver->disable(dssdev);
dispc_enable_lcd_out(0);
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dss_select_clk_source(0, 0);
dsi_pll_uninit();
enable_vpll2_power(0);
dss_clk_disable(DSS_CLK_FCK2);
#endif
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
omap_dss_stop_device(dssdev);
}
static int dpi_display_suspend(struct omap_dss_device *dssdev)
{
if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
return -EINVAL;
DSSDBG("dpi_display_suspend\n");
if (dssdev->driver->suspend)
dssdev->driver->suspend(dssdev);
dispc_enable_lcd_out(0);
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dss_select_clk_source(0, 0);
dsi_pll_uninit();
enable_vpll2_power(0);
dss_clk_disable(DSS_CLK_FCK2);
#endif
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED;
return 0;
}
int omapdss_dpi_display_enable(struct omap_dss_device *dssdev)
{
int r;
r = omap_dss_start_device(dssdev);
if (r) {
DSSERR("failed to start device\n");
goto err0;
}
if (cpu_is_omap34xx()) {
r = regulator_enable(dpi.vdds_dsi_reg);
if (r)
goto err1;
}
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
r = dpi_basic_init(dssdev);
if (r)
goto err2;
if (dpi_use_dsi_pll(dssdev)) {
dss_clk_enable(DSS_CLK_SYSCK);
r = dsi_pll_init(dpi.dsidev, 0, 1);
if (r)
goto err3;
}
r = dpi_set_mode(dssdev);
if (r)
goto err4;
mdelay(2);
dssdev->manager->enable(dssdev->manager);
return 0;
err4:
if (dpi_use_dsi_pll(dssdev))
dsi_pll_uninit(dpi.dsidev, true);
err3:
if (dpi_use_dsi_pll(dssdev))
dss_clk_disable(DSS_CLK_SYSCK);
err2:
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
if (cpu_is_omap34xx())
regulator_disable(dpi.vdds_dsi_reg);
err1:
omap_dss_stop_device(dssdev);
err0:
return r;
}
int omapdss_dpi_display_enable(struct omap_dss_device *dssdev)
{
int r;
r = omap_dss_start_device(dssdev);
if (r) {
DSSERR("failed to start device\n");
goto err0;
}
if (cpu_is_omap34xx()) {
r = regulator_enable(dpi.vdds_dsi_reg);
if (r)
goto err1;
}
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
r = dpi_basic_init(dssdev);
if (r)
goto err2;
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dss_clk_enable(DSS_CLK_SYSCK);
r = dsi_pll_init(dssdev, 0, 1);
if (r)
goto err3;
#endif
r = dpi_set_mode(dssdev);
if (r)
goto err4;
mdelay(2);
dssdev->manager->enable(dssdev->manager);
return 0;
err4:
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dsi_pll_uninit();
err3:
dss_clk_disable(DSS_CLK_SYSCK);
#endif
err2:
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
if (cpu_is_omap34xx())
regulator_disable(dpi.vdds_dsi_reg);
err1:
omap_dss_stop_device(dssdev);
err0:
return r;
}
static int dpi_display_enable(struct omap_display *display)
{
struct omap_panel *panel = display->panel;
int r;
if (display->state != OMAP_DSS_DISPLAY_DISABLED) {
DSSERR("display already enabled\n");
return -EINVAL;
}
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
r = dpi_basic_init(display);
if (r)
goto err0;
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dss_clk_enable(DSS_CLK_FCK2);
r = dsi_pll_init(0, 1);
if (r)
goto err1;
#endif
r = dpi_set_mode(display);
if (r)
goto err2;
mdelay(2);
dispc_enable_lcd_out(1);
r = panel->enable(display);
if (r)
goto err3;
display->state = OMAP_DSS_DISPLAY_ACTIVE;
return 0;
err3:
dispc_enable_lcd_out(0);
err2:
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dsi_pll_uninit();
err1:
dss_clk_disable(DSS_CLK_FCK2);
#endif
err0:
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
return r;
}
static int dpi_display_resume(struct omap_dss_device *dssdev)
{
int r = 0;
if (dssdev->state != OMAP_DSS_DISPLAY_SUSPENDED)
return -EINVAL;
DSSDBG("dpi_display_resume\n");
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dss_clk_enable(DSS_CLK_FCK2);
enable_vpll2_power(1);
r = dsi_pll_init(1, 1);
if (r)
goto err0;
r = dpi_set_mode(dssdev);
if (r)
goto err0;
#endif
dispc_enable_lcd_out(1);
if (dssdev->driver->resume) {
r = dssdev->driver->resume(dssdev);
if (r)
goto err1;
}
dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
return 0;
err1:
dispc_enable_lcd_out(0);
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
err0:
DSSERR("<%s!!> err0: failed to init DSI_PLL = %d\n", __func__, r);
dss_select_clk_source(0, 0);
dsi_pll_uninit();
dss_clk_disable(DSS_CLK_FCK2);
enable_vpll2_power(0);
#endif
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
return r;
}
static int omap_dss_set_manager(struct omap_overlay *ovl,
struct omap_overlay_manager *mgr)
{
if (!mgr)
return -EINVAL;
if (ovl->manager) {
DSSERR("overlay '%s' already has a manager '%s'\n",
ovl->name, ovl->manager->name);
return -EINVAL;
}
if (ovl->info.enabled) {
DSSERR("overlay has to be disabled to change the manager\n");
return -EINVAL;
}
ovl->manager = mgr;
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
/* XXX: on manual update display, in auto update mode, a bug happens
* here. When an overlay is first enabled on LCD, then it's disabled,
* and the manager is changed to TV, we sometimes get SYNC_LOST_DIGIT
* errors. Waiting before changing the channel_out fixes it. I'm
* guessing that the overlay is still somehow being used for the LCD,
* but I don't understand how or why. */
msleep(40);
dispc_set_channel_out(ovl->id, mgr->id);
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
return 0;
}
static int sdi_display_resume(struct omap_display *display)
{
int r;
if (display->state != OMAP_DSS_DISPLAY_SUSPENDED)
return -EINVAL;
twl4030_enable_regulator(RES_VAUX1);
sdi_pad_config(display, 1);
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
r = dss_sdi_enable();
if (r)
goto err;
mdelay(2);
dispc_enable_lcd_out(1);
if (display->panel->resume)
display->panel->resume(display);
display->state = OMAP_DSS_DISPLAY_ACTIVE;
return 0;
err:
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
sdi_pad_config(display, 0);
twl4030_disable_regulator(RES_VAUX1);
return r;
}
void dss_dump_clocks(struct seq_file *s)
{
unsigned long dpll4_ck_rate;
unsigned long dpll4_m4_ck_rate;
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
dpll4_ck_rate = clk_get_rate(clk_get_parent(dss.dpll4_m4_ck));
dpll4_m4_ck_rate = clk_get_rate(dss.dpll4_m4_ck);
seq_printf(s, "- DSS -\n");
seq_printf(s, "dpll4_ck %lu\n", dpll4_ck_rate);
if (cpu_is_omap3630())
seq_printf(s, "dss1_alwon_fclk = %lu / %lu = %lu\n",
dpll4_ck_rate,
dpll4_ck_rate / dpll4_m4_ck_rate,
dss_clk_get_rate(DSS_CLK_FCK1));
else
seq_printf(s, "dss1_alwon_fclk = %lu / %lu * 2 = %lu\n",
dpll4_ck_rate,
dpll4_ck_rate / dpll4_m4_ck_rate,
dss_clk_get_rate(DSS_CLK_FCK1));
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
}
static int sdi_display_resume(struct omap_dss_device *dssdev)
{
int r;
if (dssdev->state != OMAP_DSS_DISPLAY_SUSPENDED)
return -EINVAL;
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
r = dss_sdi_enable();
if (r)
goto err;
mdelay(2);
/* TODO: change here if LCD2 support is needed */
dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD, 1);
if (dssdev->driver->resume)
dssdev->driver->resume(dssdev);
dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
return 0;
err:
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
return r;
}
void omapdss_dpi_display_disable(struct omap_dss_device *dssdev)
{
if (dssdev->manager)
dssdev->manager->disable(dssdev->manager);
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
{
enum omap_dsi_index ix;
ix = (dssdev->channel == OMAP_DSS_CHANNEL_LCD) ? DSI1 : DSI2;
dss_select_dispc_clk_source(ix, DSS_SRC_DSS1_ALWON_FCLK);
dsi_pll_uninit(ix);
}
#endif
/* cut clock(s) */
dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
if (!cpu_is_omap44xx())
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
dss_mainclk_state_disable(true);
if (cpu_is_omap34xx() && !cpu_is_omap3630())
regulator_disable(dpi.vdds_dsi_reg);
omap_dss_stop_device(dssdev);
}
static void rfbi_enable_clocks(bool enable)
{
if (enable)
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
else
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
}
void omapdss_dpi_display_disable(struct omap_dss_device *dssdev)
{
dssdev->manager->disable(dssdev->manager);
if (dpi_use_dsi_pll(dssdev)) {
dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
dsi_pll_uninit(dpi.dsidev, true);
dss_clk_disable(DSS_CLK_SYSCK);
}
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
if (cpu_is_omap34xx())
regulator_disable(dpi.vdds_dsi_reg);
omap_dss_stop_device(dssdev);
}
void omapdss_dpi_display_disable(struct omap_dss_device *dssdev)
{
dssdev->manager->disable(dssdev->manager);
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dss_select_dispc_clk_source(DSS_CLK_SRC_FCK);
dsi_pll_uninit();
dss_clk_disable(DSS_CLK_SYSCK);
#endif
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
if (cpu_is_omap34xx())
regulator_disable(dpi.vdds_dsi_reg);
omap_dss_stop_device(dssdev);
}
static int dpi_display_resume(struct omap_dss_device *dssdev)
{
int r = 0;
if (dssdev->state != OMAP_DSS_DISPLAY_SUSPENDED)
return -EINVAL;
DSSDBG("dpi_display_resume\n");
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dss_clk_enable(DSS_CLK_FCK2);
r = dsi_pll_init(dssdev, 1, 1);
if (r) {
DSSERR("failed in dsi_pll_init\n");
goto err1;
}
r = dpi_set_mode(dssdev);
if (r) {
DSSERR("failed in dpi_set_mode\n");
goto err2;
}
mdelay(2);
#endif
dispc_enable_lcd_out(1);
if (dssdev->driver->resume)
dssdev->driver->resume(dssdev);
dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
return r;
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
err2:
dsi_pll_uninit();
dss_clk_disable(DSS_CLK_FCK2);
err1:
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
return r;
#endif
}
static void dss_clk_disable_all(void)
{
enum dss_clock clks;
clks = DSS_CLK_ICK | DSS_CLK_FCK1 | DSS_CLK_FCK2 | DSS_CLK_54M;
if (cpu_is_omap34xx() || cpu_is_omap44xx())
clks |= DSS_CLK_96M;
dss_clk_disable(clks);
}
static void dpi_display_disable(struct omap_dss_device *dssdev)
{
int lcd_channel_ix = 0;
int use_dsi_for_hdmi = 0;
if (strncmp("hdmi", dssdev->name, 4) == 0)
use_dsi_for_hdmi = 1;
if (dssdev->channel == OMAP_DSS_CHANNEL_LCD2)
lcd_channel_ix = 1;
if (dssdev->state == OMAP_DSS_DISPLAY_DISABLED)
return;
if (dssdev->state == OMAP_DSS_DISPLAY_SUSPENDED)
dpi_display_resume(dssdev);
dssdev->driver->disable(dssdev);
if (use_dsi_for_hdmi) {
dss_select_clk_source(0, 0);
dispc_go(OMAP_DSS_CHANNEL_LCD);
while (dispc_go_busy(OMAP_DSS_CHANNEL_LCD))
;
dsi_pll_uninit(lcd_channel_ix);
enable_vpll2_power(0);
dss_clk_disable(DSS_CLK_FCK2);
}
if (dssdev->channel == OMAP_DSS_CHANNEL_LCD2)
dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD2, 0);
else
dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD, 0);
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
omap_dss_stop_device(dssdev);
}
void omapdss_sdi_display_disable(struct omap_dss_device *dssdev)
{
dssdev->manager->disable(dssdev->manager);
dss_sdi_disable();
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
regulator_disable(sdi.vdds_sdi_reg);
omap_dss_stop_device(dssdev);
}
static void dpi_display_disable(struct omap_display *display)
{
if (display->state == OMAP_DSS_DISPLAY_DISABLED)
return;
if (display->state == OMAP_DSS_DISPLAY_SUSPENDED)
dpi_display_resume(display);
display->panel->disable(display);
dispc_enable_lcd_out(0);
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dss_select_clk_source(0, 0);
dsi_pll_uninit();
dss_clk_disable(DSS_CLK_FCK2);
#endif
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
display->state = OMAP_DSS_DISPLAY_DISABLED;
}
static int dpi_display_suspend(struct omap_dss_device *dssdev)
{
int use_dsi_for_hdmi = 0;
if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
return -EINVAL;
DSSDBG("dpi_display_suspend\n");
if (strncmp("hdmi", dssdev->name, 4) == 0)
use_dsi_for_hdmi = 1;
if (dssdev->driver->suspend)
dssdev->driver->suspend(dssdev);
if (use_dsi_for_hdmi) {
dss_select_clk_source(0, 0);
dispc_go(OMAP_DSS_CHANNEL_LCD);
while (dispc_go_busy(OMAP_DSS_CHANNEL_LCD))
;
dsi_pll_uninit(dsi1);
enable_vpll2_power(0);
dss_clk_disable(DSS_CLK_FCK2);
}
if (dssdev->channel == OMAP_DSS_CHANNEL_LCD2)
dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD2, 0);
else
dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD, 0);
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED;
return 0;
}
static int omap_dss_suspend(struct platform_device *pdev, pm_message_t state)
{
#ifdef CONFIG_FB_OMAP_BOOTLOADER_INIT
static int flag = 1;
DSSDBG("suspend %d\n", state.event);
if(flag == 1)
{
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
flag = 0;
}
#endif
return dss_suspend_all_devices();
}
void dss_dump_regs(struct seq_file *s)
{
#define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dss_read_reg(r))
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
DUMPREG(DSS_REVISION);
DUMPREG(DSS_SYSCONFIG);
DUMPREG(DSS_SYSSTATUS);
DUMPREG(DSS_CONTROL);
DUMPREG(DSS_SDI_CONTROL);
DUMPREG(DSS_PLL_CONTROL);
DUMPREG(DSS_SDI_STATUS);
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
#undef DUMPREG
}
static int dpi_display_suspend(struct omap_display *display)
{
if (display->state != OMAP_DSS_DISPLAY_ACTIVE)
return -EINVAL;
DSSDBG("dpi_display_suspend\n");
if (display->panel->suspend)
display->panel->suspend(display);
dispc_enable_lcd_out(0);
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
display->state = OMAP_DSS_DISPLAY_SUSPENDED;
return 0;
}
static int dpi_display_suspend(struct omap_dss_device *dssdev)
{
if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
return -EINVAL;
DSSDBG("dpi_display_suspend\n");
if (dssdev->driver->suspend)
dssdev->driver->suspend(dssdev);
dispc_enable_lcd_out(0);
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED;
return 0;
}
static int sdi_display_suspend(struct omap_dss_device *dssdev)
{
if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
return -EINVAL;
if (dssdev->driver->suspend)
dssdev->driver->suspend(dssdev);
/* TODO: change here if LCD2 support is needed */
dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD, 0);
dss_sdi_disable();
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED;
return 0;
}
static irqreturn_t dss_irq_handler_omap3(int irq, void *arg)
{
u32 irqstatus;
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
irqstatus = dss_read_reg(DSS_IRQSTATUS);
if (irqstatus & (1<<0)) /* DISPC_IRQ */
dispc_irq_handler();
#ifdef CONFIG_OMAP2_DSS_DSI
if (irqstatus & (1<<1)) /* DSI_IRQ */
dsi_irq_handler();
#endif
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
return IRQ_HANDLED;
}
static int dpi_set_mode(struct omap_dss_device *dssdev)
{
struct omap_video_timings *t = &dssdev->panel.timings;
int lck_div, pck_div;
unsigned long fck;
unsigned long pck;
bool is_tft;
int r = 0;
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
dispc_set_pol_freq(dssdev->manager->id, dssdev->panel.config,
dssdev->panel.acbi, dssdev->panel.acb);
is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
r = dpi_set_dsi_clk(dssdev, is_tft, t->pixel_clock * 1000, &fck,
&lck_div, &pck_div);
#else
r = dpi_set_dispc_clk(dssdev, is_tft, t->pixel_clock * 1000, &fck,
&lck_div, &pck_div);
#endif
if (r)
goto err0;
pck = fck / lck_div / pck_div / 1000;
if (pck != t->pixel_clock) {
DSSWARN("Could not find exact pixel clock. "
"Requested %d kHz, got %lu kHz\n",
t->pixel_clock, pck);
t->pixel_clock = pck;
}
dispc_set_lcd_timings(dssdev->manager->id, t);
err0:
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
return r;
}
static int dpi_display_suspend(struct omap_dss_device *dssdev)
{
if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
return -EINVAL;
DSSDBG("dpi_display_suspend\n");
if (dssdev->driver->suspend)
dssdev->driver->suspend(dssdev);
/* TODO: change here if LCD2 support is needed */
dispc_enable_lcd_out(dssdev->channel, 0);
#ifndef CONFIG_ARCH_OMAP4
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
#endif
dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED;
return 0;
}
static int dpi_set_mode(struct omap_display *display)
{
struct omap_panel *panel = display->panel;
int lck_div, pck_div;
unsigned long fck;
unsigned long pck;
bool is_tft;
int r = 0;
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
dispc_set_pol_freq(panel);
is_tft = (display->panel->config & OMAP_DSS_LCD_TFT) != 0;
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
r = dpi_set_dsi_clk(is_tft, panel->timings.pixel_clock * 1000,
&fck, &lck_div, &pck_div);
#else
r = dpi_set_dispc_clk(is_tft, panel->timings.pixel_clock * 1000,
&fck, &lck_div, &pck_div);
#endif
if (r)
goto err0;
pck = fck / lck_div / pck_div / 1000;
if (pck != panel->timings.pixel_clock) {
DSSWARN("Could not find exact pixel clock. "
"Requested %d kHz, got %lu kHz\n",
panel->timings.pixel_clock, pck);
panel->timings.pixel_clock = pck;
}
dispc_set_lcd_timings(&panel->timings);
err0:
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
return r;
}