static int az6007_ci_init(struct dvb_usb_adapter *a)
{
struct dvb_usb_device *d = a->dev;
struct az6007_device_state *state = (struct az6007_device_state *)d->priv;
int ret;
deb_info("%s", __func__);
mutex_init(&state->ca_mutex);
state->ca.owner = THIS_MODULE;
state->ca.read_attribute_mem = az6007_ci_read_attribute_mem;
state->ca.write_attribute_mem = az6007_ci_write_attribute_mem;
state->ca.read_cam_control = az6007_ci_read_cam_control;
state->ca.write_cam_control = az6007_ci_write_cam_control;
state->ca.slot_reset = az6007_ci_slot_reset;
state->ca.slot_shutdown = az6007_ci_slot_shutdown;
state->ca.slot_ts_enable = az6007_ci_slot_ts_enable;
state->ca.poll_slot_status = az6007_ci_poll_slot_status;
state->ca.data = d;
ret = dvb_ca_en50221_init(&a->dvb_adap,
&state->ca,
0, /* flags */
1);/* n_slots */
if (ret != 0) {
err("Cannot initialize CI: Error %d.", ret);
memset(&state->ca, 0, sizeof(state->ca));
return ret;
}
deb_info("CI initialized.");
return 0;
}
int tbs_ci_init(struct tbs_adapter *adap, int nr)
{
struct tbs_ci_state *state;
// struct tbs_pcie_dev *dev = adap->dev;
// int data;
int ret;
/* allocate memory for the internal state */
state = kzalloc(sizeof(struct tbs_ci_state), GFP_KERNEL);
if (state == NULL) {
ret = -ENOMEM;
goto error1;
}
adap->adap_priv = state;
state->nr = nr;
state->status = 0;
mutex_init(&state->ca_mutex);
state->ca.owner = THIS_MODULE;
state->ca.read_attribute_mem = tbs_ci_read_attribute_mem;
state->ca.write_attribute_mem = tbs_ci_write_attribute_mem;
state->ca.read_cam_control = tbs_ci_read_cam_control;
state->ca.write_cam_control = tbs_ci_write_cam_control;
state->ca.slot_reset = tbs_ci_slot_reset;
state->ca.slot_shutdown = tbs_ci_slot_shutdown;
state->ca.slot_ts_enable = tbs_ci_slot_ts_enable;
state->ca.poll_slot_status = tbs_ci_poll_slot_status;
state->ca.data = state;
state->priv = adap;
printk("tbs_pcie_ci: Initializing TBS PCIE CI#%d slot\n", nr);
ret = dvb_ca_en50221_init(&adap->dvb_adapter, &state->ca,
/* flags */ 0, /* n_slots */ 1);
if (ret != 0) goto error2;
#if 0
data = 0x00000005;
TBS_PCIE_WRITE(TBS_CI_BASE(state->nr), 0x10, data);
#endif
printk("tbs_pcie_ci: Adapter %d CI slot initialized\n",
adap->dvb_adapter.num);
return 0;
error2:
//memset (&state->ca, 0, sizeof (state->ca));
kfree(state);
error1:
printk("tbs_pcie_ci: Adapter %d CI slot initialization failed\n",
adap->dvb_adapter.num);
return ret;
}
int mantis_ca_init(struct mantis_pci *mantis)
{
struct dvb_adapter *dvb_adapter = &mantis->dvb_adapter;
struct mantis_ca *ca;
int ca_flags = 0, result;
dprintk(MANTIS_DEBUG, 1, "Initializing Mantis CA");
ca = kzalloc(sizeof(struct mantis_ca), GFP_KERNEL);
if (!ca) {
dprintk(MANTIS_ERROR, 1, "Out of memory!, exiting ..");
result = -ENOMEM;
goto err;
}
ca->ca_priv = mantis;
mantis->mantis_ca = ca;
ca_flags = DVB_CA_EN50221_FLAG_IRQ_CAMCHANGE;
#if 0
DVB_CA_EN50221_FLAG_IRQ_FR |
DVB_CA_EN50221_FLAG_IRQ_DA;
#endif
/* register CA interface */
ca->en50221.owner = THIS_MODULE;
ca->en50221.read_attribute_mem = mantis_ca_read_attr_mem;
ca->en50221.write_attribute_mem = mantis_ca_write_attr_mem;
ca->en50221.read_cam_control = mantis_ca_read_cam_ctl;
ca->en50221.write_cam_control = mantis_ca_write_cam_ctl;
ca->en50221.slot_reset = mantis_ca_slot_reset;
ca->en50221.slot_shutdown = mantis_ca_slot_shutdown;
ca->en50221.slot_ts_enable = mantis_ts_control;
ca->en50221.poll_slot_status = mantis_slot_status;
ca->en50221.data = ca;
mutex_init(&ca->ca_lock);
init_waitqueue_head(&ca->hif_data_wq);
init_waitqueue_head(&ca->hif_opdone_wq);
init_waitqueue_head(&ca->hif_write_wq);
dprintk(MANTIS_ERROR, 1, "Registering EN50221 device");
result = dvb_ca_en50221_init(dvb_adapter, &ca->en50221, ca_flags, 1);
if (result != 0) {
dprintk(MANTIS_ERROR, 1, "EN50221: Initialization failed <%d>", result);
goto err;
}
dprintk(MANTIS_ERROR, 1, "Registered EN50221 device");
mantis_evmgr_init(ca);
return 0;
err:
kfree(ca);
return result;
}
int netup_unidvb_ci_register(struct netup_unidvb_dev *dev,
int num, struct pci_dev *pci_dev)
{
int result;
struct netup_ci_state *state;
if (num < 0 || num > 1) {
dev_err(&pci_dev->dev, "%s(): invalid CI adapter %d\n",
__func__, num);
return -EINVAL;
}
state = &dev->ci[num];
state->nr = num;
state->membase8_config = dev->bmmio1 +
((num == 0) ? CAM0_CONFIG : CAM1_CONFIG);
state->membase8_io = dev->bmmio1 +
((num == 0) ? CAM0_IO : CAM1_IO);
state->dev = dev;
state->ca.owner = THIS_MODULE;
state->ca.read_attribute_mem = netup_unidvb_ci_read_attribute_mem;
state->ca.write_attribute_mem = netup_unidvb_ci_write_attribute_mem;
state->ca.read_cam_control = netup_unidvb_ci_read_cam_ctl;
state->ca.write_cam_control = netup_unidvb_ci_write_cam_ctl;
state->ca.slot_reset = netup_unidvb_ci_slot_reset;
state->ca.slot_shutdown = netup_unidvb_ci_slot_shutdown;
state->ca.slot_ts_enable = netup_unidvb_ci_slot_ts_ctl;
state->ca.poll_slot_status = netup_unidvb_poll_ci_slot_status;
state->ca.data = state;
result = dvb_ca_en50221_init(&dev->frontends[num].adapter,
&state->ca, 0, 1);
if (result < 0) {
dev_err(&pci_dev->dev,
"%s(): dvb_ca_en50221_init result %d\n",
__func__, result);
return result;
}
writew(NETUP_UNIDVB_IRQ_CI, (u16 *)(dev->bmmio0 + REG_IMASK_SET));
dev_info(&pci_dev->dev,
"%s(): CI adapter %d init done\n", __func__, num);
return 0;
}
int init_ci_controller(struct dvb_adapter* dvb_adap)
{
struct ufs9xx_cic_state *state = &ci_state;
struct ufs9xx_cic_core *core = &ci_core;
int result;
dprintk(1,"init_ufs9xx_cic >\n");
core->dvb_adap = dvb_adap;
#if defined(UFS922) || defined(UFC960)
state->i2c = i2c_get_adapter(2);
state->i2c_addr = 0x23;
state->slot_attribute_read[0] = (volatile unsigned long) ioremap_nocache(0x02828000, 0x200);
state->slot_attribute_write[0] = (volatile unsigned long) ioremap_nocache(0x02808000, 0x200);
state->slot_control_read[0] = (volatile unsigned long) ioremap_nocache(0x02820000, 0x200);
state->slot_control_write[0] = (volatile unsigned long) ioremap_nocache(0x02800000, 0x200);
state->slot_attribute_read[1] = (volatile unsigned long) ioremap_nocache(0x02028000, 0x200);
state->slot_attribute_write[1] = (volatile unsigned long) ioremap_nocache(0x02008000, 0x200);
state->slot_control_read[1] = (volatile unsigned long) ioremap_nocache(0x02020000, 0x200);
state->slot_control_write[1] = (volatile unsigned long) ioremap_nocache(0x02000000, 0x200);
#elif defined(UFS913)
state->slot_attribute_read[0] = (volatile unsigned long) ioremap_nocache(0x04828000, 0x200);
state->slot_attribute_write[0] = (volatile unsigned long) ioremap_nocache(0x04808000, 0x200);
state->slot_control_read[0] = (volatile unsigned long) ioremap_nocache(0x04820000, 0x200);
state->slot_control_write[0] = (volatile unsigned long) ioremap_nocache(0x04800000, 0x200);
state->slot_attribute_read[1] = (volatile unsigned long) ioremap_nocache(0x05028000, 0x200);
state->slot_attribute_write[1] = (volatile unsigned long) ioremap_nocache(0x05008000, 0x200);
state->slot_control_read[1] = (volatile unsigned long) ioremap_nocache(0x05020000, 0x200);
state->slot_control_write[1] = (volatile unsigned long) ioremap_nocache(0x05000000, 0x200);
ufs9xx_write_register_u32_map(0xfe000010, 0x0000c0de);
ufs9xx_write_register_u32_map(0xfe000088, 0x00000000);
ufs9xx_write_register_u32_map(0xfe000080, 0x00000019);
ufs9xx_write_register_u32_map(0xfe000084, 0x00003334);
ufs9xx_write_register_u32_map(0xfe00008c, 0x00000000);
ufs9xx_write_register_u32_map(0xfe000088, 0x00000001);
ufs9xx_write_register_u8(state->slot_attribute_write[0] + 0x10c, 0x01);
ufs9xx_write_register_u8(state->slot_attribute_write[0] + 0x1b0, 0x53);
ufs9xx_write_register_u8(state->slot_attribute_write[0] + 0x1b2, 0x54);
ufs9xx_write_register_u8(state->slot_attribute_write[0] + 0x1b4, 0x41);
ufs9xx_write_register_u8(state->slot_attribute_write[0] + 0x1b6, 0x50);
ufs9xx_write_register_u8(state->slot_attribute_write[0] + 0x1b8, 0x49);
ufs9xx_write_register_u8(state->slot_attribute_write[0] + 0x170, 0x53);
ufs9xx_write_register_u8(state->slot_attribute_write[0] + 0x172, 0x44);
ufs9xx_write_register_u8(state->slot_attribute_write[0] + 0x174, 0x4b);
state->i2c = i2c_get_adapter(1);
state->i2c_addr = 0x23;
#elif defined(UFS912)
state->slot_attribute_read[0] = (volatile unsigned long) ioremap_nocache(0x03028000, 0x200);
state->slot_attribute_write[0] = (volatile unsigned long) ioremap_nocache(0x03008000, 0x200);
state->slot_control_read[0] = (volatile unsigned long) ioremap_nocache(0x03020000, 0x200);
state->slot_control_write[0] = (volatile unsigned long) ioremap_nocache(0x03000000, 0x200);
state->slot_attribute_read[1] = (volatile unsigned long) ioremap_nocache(0x04028000, 0x200);
state->slot_attribute_write[1] = (volatile unsigned long) ioremap_nocache(0x04008000, 0x200);
state->slot_control_read[1] = (volatile unsigned long) ioremap_nocache(0x04020000, 0x200);
state->slot_control_write[1] = (volatile unsigned long) ioremap_nocache(0x04000000, 0x200);
#endif
memset(&core->ca, 0, sizeof(struct dvb_ca_en50221));
/* register CI interface */
core->ca.owner = THIS_MODULE;
core->ca.read_attribute_mem = ufs9xx_cic_read_attribute_mem;
core->ca.write_attribute_mem = ufs9xx_cic_write_attribute_mem;
core->ca.read_cam_control = ufs9xx_cic_read_cam_control;
core->ca.write_cam_control = ufs9xx_cic_write_cam_control;
core->ca.slot_shutdown = ufs9xx_cic_slot_shutdown;
core->ca.slot_ts_enable = ufs9xx_cic_slot_ts_enable;
core->ca.slot_reset = ufs9xx_cic_slot_reset;
core->ca.poll_slot_status = ufs9xx_cic_poll_slot_status;
state->core = core;
core->ca.data = state;
cic_init_hw();
dprintk(1, "init_ufs9xx_cic: call dvb_ca_en50221_init\n");
if ((result = dvb_ca_en50221_init(core->dvb_adap,
&core->ca, 0, 2)) != 0) {
printk(KERN_ERR "ca0 initialisation failed.\n");
goto error;
}
dprintk(1, "ufs9xx_cic: ca0 interface initialised.\n");
dprintk(10, "init_ufs9xx_cic <\n");
return 0;
error:
printk("init_ufs9xx_cic < error\n");
return result;
}
int altera_ci_init(struct altera_ci_config *config, int ci_nr)
{
struct altera_ci_state *state;
struct fpga_inode *temp_int = find_inode(config->dev);
struct fpga_internal *inter = NULL;
int ret = 0;
u8 store = 0;
state = kzalloc(sizeof(struct altera_ci_state), GFP_KERNEL);
ci_dbg_print("%s\n", __func__);
if (!state) {
ret = -ENOMEM;
goto err;
}
if (temp_int != NULL) {
inter = temp_int->internal;
(inter->cis_used)++;
ci_dbg_print("%s: Find Internal Structure!\n", __func__);
} else {
inter = kzalloc(sizeof(struct fpga_internal), GFP_KERNEL);
if (!inter) {
ret = -ENOMEM;
goto err;
}
temp_int = append_internal(inter);
inter->cis_used = 1;
inter->dev = config->dev;
inter->fpga_rw = config->fpga_rw;
mutex_init(&inter->fpga_mutex);
inter->strt_wrk = 1;
ci_dbg_print("%s: Create New Internal Structure!\n", __func__);
}
ci_dbg_print("%s: setting state = %p for ci = %d\n", __func__,
state, ci_nr - 1);
inter->state[ci_nr - 1] = state;
state->internal = inter;
state->nr = ci_nr - 1;
state->ca.owner = THIS_MODULE;
state->ca.read_attribute_mem = altera_ci_read_attribute_mem;
state->ca.write_attribute_mem = altera_ci_write_attribute_mem;
state->ca.read_cam_control = altera_ci_read_cam_ctl;
state->ca.write_cam_control = altera_ci_write_cam_ctl;
state->ca.slot_reset = altera_ci_slot_reset;
state->ca.slot_shutdown = altera_ci_slot_shutdown;
state->ca.slot_ts_enable = altera_ci_slot_ts_ctl;
state->ca.poll_slot_status = altera_poll_ci_slot_status;
state->ca.data = state;
ret = dvb_ca_en50221_init(config->adapter,
&state->ca,
/* flags */ 0,
/* n_slots */ 1);
if (0 != ret)
goto err;
altera_hw_filt_init(config, ci_nr);
if (inter->strt_wrk) {
INIT_WORK(&inter->work, netup_read_ci_status);
inter->strt_wrk = 0;
}
ci_dbg_print("%s: CI initialized!\n", __func__);
mutex_lock(&inter->fpga_mutex);
/* Enable div */
netup_fpga_op_rw(inter, NETUP_CI_TSA_DIV, 0x0, 0);
netup_fpga_op_rw(inter, NETUP_CI_TSB_DIV, 0x0, 0);
/* enable TS out */
store = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL2, 0, NETUP_CI_FLG_RD);
store |= (3 << 4);
netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL2, store, 0);
ret = netup_fpga_op_rw(inter, NETUP_CI_REVISION, 0, NETUP_CI_FLG_RD);
/* enable irq */
netup_fpga_op_rw(inter, NETUP_CI_INT_CTRL, 0x44, 0);
mutex_unlock(&inter->fpga_mutex);
ci_dbg_print("%s: NetUP CI Revision = 0x%x\n", __func__, ret);
schedule_work(&inter->work);
return 0;
err:
ci_dbg_print("%s: Cannot initialize CI: Error %d.\n", __func__, ret);
kfree(state);
return ret;
}
