/*
========================================================================
Routine Description:
Arguments:
Return Value:
IRQL =
Note:
========================================================================
*/
NTSTATUS eFuseWriteRegisters(
IN PRTMP_ADAPTER pAd,
IN USHORT Offset,
IN USHORT Length,
IN USHORT* pData)
{
USHORT i;
USHORT eFuseData;
USHORT LogicalAddress, BlkNum = 0xffff;
UCHAR EFSROM_AOUT;
USHORT addr,tmpaddr, InBuf[3], tmpOffset;
USHORT buffer[8];
BOOLEAN bWriteSuccess = TRUE;
DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters Offset=%x, pData=%x\n", Offset, *pData));
//Step 0. find the entry in the mapping table
//The address of EEPROM is 2-bytes alignment.
//The last bit is used for alignment, so it must be 0.
tmpOffset = Offset & 0xfffe;
EFSROM_AOUT = eFuseReadRegisters(pAd, tmpOffset, 2, &eFuseData);
if( EFSROM_AOUT == 0x3f)
{ //find available logical address pointer
//the logical address does not exist, find an empty one
//from the first address of block 45=16*45=0x2d0 to the last address of block 47
//==>48*16-3(reserved)=2FC
for (i=EFUSE_USAGE_MAP_START; i<=EFUSE_USAGE_MAP_END; i+=2)
{
//Retrive the logical block nubmer form each logical address pointer
//It will access two logical address pointer each time.
eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
if( (LogicalAddress & 0xff) == 0)
{//Not used logical address pointer
BlkNum = i-EFUSE_USAGE_MAP_START;
break;
}
else if(( (LogicalAddress >> 8) & 0xff) == 0)
{//Not used logical address pointer
if (i != EFUSE_USAGE_MAP_END)
{
BlkNum = i-EFUSE_USAGE_MAP_START+1;
}
break;
}
}
}
else
{
/*
========================================================================
Routine Description:
Arguments:
Return Value:
Note:
========================================================================
*/
NTSTATUS eFuseRead(
IN PRTMP_ADAPTER pAd,
IN USHORT Offset,
OUT PUSHORT pData,
IN USHORT Length)
{
NTSTATUS Status = STATUS_SUCCESS;
int i;
for(i = 0; i < Length; i+=2)
{
eFuseReadRegisters(pAd, Offset+i, 2, &pData[i/2]);
}
return Status;
}
/*
========================================================================
Routine Description:
Arguments:
Return Value:
IRQL =
Note:
========================================================================
*/
NTSTATUS eFuseRead(
IN PRTMP_ADAPTER pAd,
IN USHORT Offset,
OUT PUCHAR pData,
IN USHORT Length)
{
USHORT* pOutBuf = (USHORT*)pData;
NTSTATUS Status = STATUS_SUCCESS;
UCHAR EFSROM_AOUT;
int i;
for(i=0; i<Length; i+=2)
{
EFSROM_AOUT = eFuseReadRegisters(pAd, Offset+i, 2, &pOutBuf[i/2]);
}
return Status;
}
/*
========================================================================
Routine Description:
Arguments:
Return Value:
Note:
========================================================================
*/
static NTSTATUS eFuseWriteRegisters(
IN PRTMP_ADAPTER pAd,
IN USHORT Offset,
IN USHORT Length,
IN USHORT* pData)
{
USHORT i,Loop=0, StartBlock=0, EndBlock=0;
USHORT eFuseData;
USHORT LogicalAddress, BlkNum = 0xffff;
UCHAR EFSROM_AOUT;
USHORT addr,tmpaddr, InBuf[3], tmpOffset;
USHORT buffer[8];
BOOLEAN bWriteSuccess = TRUE;
DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters Offset=%x, pData=%x\n", Offset, *pData));
/*set start block and end block number, start from tail of mapping table*/
if( (pAd->chipCap.EFUSE_USAGE_MAP_END % 2) != 0)
{
StartBlock = pAd->chipCap.EFUSE_USAGE_MAP_END-1;
}
else
{
StartBlock = pAd->chipCap.EFUSE_USAGE_MAP_END;
}
if( (pAd->chipCap.EFUSE_USAGE_MAP_START % 2) != 0)
{
EndBlock = pAd->chipCap.EFUSE_USAGE_MAP_START-1;
}
else
{
EndBlock = pAd->chipCap.EFUSE_USAGE_MAP_START;
}
/*Step 0. find the entry in the mapping table*/
/*The address of EEPROM is 2-bytes alignment.*/
/*The last bit is used for alignment, so it must be 0.*/
tmpOffset = Offset & 0xfffe;
EFSROM_AOUT = eFuseReadRegisters(pAd, tmpOffset, 2, &eFuseData);
if (EFSROM_AOUT == 0x3f)
{ /*find available logical address pointer */
/*the logical address does not exist, find an empty one*/
/*from the first address of block 45=16*45=0x2d0 to the last address of block 47*/
/*==>48*16-3(reserved)=2FC*/
for (i=StartBlock; i >= EndBlock; i-=2)
{
/*Retrive the logical block nubmer form each logical address pointer*/
/*It will access two logical address pointer each time.*/
EfusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
/*To avoid the odd byte problem, ex. We read the 21|20 bytes and if 21 is the */
/* end byte. Then, the EFUSE_USAGE_MAP_END which is 21 is not equal to*/
/* i which is 20. Therefore, this 21th byte could be used.*/
/*Otherwise, if 20 is the stop byte, i which is 20 is equal EFUSE_USAGE_MAP_END.*/
/* It means the 21th byte could not be used.*/
if(( (LogicalAddress >> 8) & 0xff) == 0)
{/*Not used logical address pointer*/
if (i != pAd->chipCap.EFUSE_USAGE_MAP_END)
{
BlkNum = i-pAd->chipCap.EFUSE_USAGE_MAP_START+1;
break;
}
}
if( (LogicalAddress & 0xff) == 0)
{/*Not used logical address pointer*/
if (i != (pAd->chipCap.EFUSE_USAGE_MAP_START-1))
{
BlkNum = i-pAd->chipCap.EFUSE_USAGE_MAP_START;
break;
}
}
}
}
else
{
