void memories_initialization(void)
{
struct ebi_cs_config cs_config;
struct ebi_sdram_config sdram_config;
memset(&cs_config, 0, sizeof(struct ebi_cs_config));
memset(&sdram_config, 0, sizeof(struct ebi_sdram_config));
/*
* Configure the EBI port with 12 address lines, no address latches or
* low pin count, and set it in SDRAM mode with 3-port EBI port.
*/
ebi_setup_port(12, 0, 0, EBI_PORT_3PORT | EBI_PORT_SDRAM);
/*
* Configure the EBI chip select for an 8 MB SDRAM located at
* \ref BOARD_EBI_SDRAM_BASE.
*/
ebi_cs_set_mode(&cs_config, EBI_CS_MODE_SDRAM_gc);
ebi_cs_set_address_size(&cs_config, EBI_CS_ASPACE_8MB_gc);
ebi_cs_set_base_address(&cs_config, BOARD_EBI_SDRAM_BASE);
/* Configure the EBI chip select to be in SDRAM mode. */
ebi_sdram_set_mode(&cs_config, EBI_CS_SDMODE_NORMAL_gc);
/* Setup the number of SDRAM rows and columns. */
ebi_sdram_set_row_bits(&sdram_config, 12);
ebi_sdram_set_col_bits(&sdram_config, 10);
/* Further, setup the SDRAM timing. */
ebi_sdram_set_cas_latency(&sdram_config, 3);
ebi_sdram_set_mode_delay(&sdram_config, EBI_MRDLY_2CLK_gc);
ebi_sdram_set_row_cycle_delay(&sdram_config, EBI_ROWCYCDLY_7CLK_gc);
ebi_sdram_set_row_to_precharge_delay(&sdram_config, EBI_RPDLY_7CLK_gc);
ebi_sdram_set_write_recovery_delay(&sdram_config, EBI_WRDLY_1CLK_gc);
ebi_sdram_set_self_refresh_to_active_delay(&sdram_config,
EBI_ESRDLY_7CLK_gc);
ebi_sdram_set_row_to_col_delay(&sdram_config, EBI_ROWCOLDLY_7CLK_gc);
ebi_sdram_set_refresh_period(&sdram_config, BOARD_EBI_SDRAM_REFRESH);
ebi_sdram_set_initialization_delay(&sdram_config,
BOARD_EBI_SDRAM_INITDLY);
/* Write SDRAM configuration into the EBI registers. */
ebi_sdram_write_config(&sdram_config);
/* Write the chip select configuration into the EBI registers. */
ebi_cs_write_config(EBI_SDRAM_CS, &cs_config);
ebi_enable_cs(EBI_SDRAM_CS, &cs_config);
do {
/* Wait for SDRAM to initialize. */
} while (!ebi_sdram_is_ready());
}
int main(void)
{
int data;
int index=0;
char buffer[100];
Config32MHzClock();
CLK.PSCTRL = 0x00; // no division on peripheral clock
UsartInit();
UsartWriteString("\r\n\r\nBOOT: Starting...\r\n");
//Analog Mux
PORTF.DIR = 0b11111111; //Output
PORTF.OUTCLR = PIN6_bm;
PORTF.OUTCLR = PIN4_bm | PIN7_bm;
PORTF.OUTSET = PIN5_bm;
PORTF.OUTCLR = PIN0_bm | PIN1_bm | PIN2_bm | PIN3_bm;
//PORTF.OUTSET = PIN1_bm;
PORTF.OUTCLR = PIN6_bm;
PORTF.OUTSET = PIN4_bm;
PORTF.OUTCLR = PIN5_bm;
PORTF.OUTSET = PIN7_bm; //WR
UsartWriteString("BOOT: Analog Mux configured...\r\n");
//ADC
PORTQ.DIR = 0b1111; //Output
PORTQ.OUTCLR = PIN1_bm | PIN3_bm; //PWRDWN pins
PORTQ.OUTSET = PIN0_bm | PIN2_bm; //ENCODE pins
//Reading Values
PORTD.DIR = 0b00000000; //Input
PORTE.DIR = 0b00000000; //Input
UsartWriteString("BOOT: ADC configured...\r\n");
//TFT LCD
TFT_init();
Delay100ms(10);
Delay100ms(10);
Delay100ms(10);
Delay100ms(10);
Delay100ms(10);
TSLCDFillRect(0,TS_SIZE_X-1,0,TS_SIZE_Y-1,TS_COL_BLUE,TS_MODE_NORMAL);
/*
TSLCDFillRect(0,TS_SIZE_X-1,0,70,TS_COL_WHITE,TS_MODE_NORMAL);
TSLCDSetFontColor(TS_COL_BLUE);
TSLCDPrintStr(2,6,"Testing ELT240320TP with AVR",TS_MODE_NORMAL);
TSLCDFillRect(20,80,90,130,TS_COL_BLACK,TS_MODE_NORMAL);
TSLCDFillRect(30,90,100,140,TS_COL_YELLOW,TS_MODE_NORMAL);
TSLCDFillRect(20,80,160,200,TS_COL_BLACK,TS_MODE_NORMAL);
TSLCDFillRect(30,90,170,210,TS_COL_RED,TS_MODE_NORMAL);
TSLCDFillRect(195,205,71,TS_SIZE_Y-1,TS_COL_WHITE,TS_MODE_NORMAL);
TSLCDFillCirc(200,155,60,TS_COL_WHITE,TS_MODE_NORMAL);
TSLCDFillCirc(200,155,50,TS_COL_BLUE,TS_MODE_NORMAL);
TSLCDFillCirc(200,155,40,TS_COL_BLACK,TS_MODE_NORMAL);
TSLCDFillCirc(200,155,30,TS_COL_RED,TS_MODE_NORMAL);
*/
UsartWriteString("BOOT: TFT LCD configured...\r\n");
//Timing Lines
//INT0: breakoutbar6 / A0 / frame
//INT1: slicebin0 / A1 / pixel
PORTA.INTCTRL = (PORTA.INTCTRL & ~PORT_INT0LVL_gm ) | PORT_INT0LVL_LO_gc;
PORTA.INTCTRL = (PORTA.INTCTRL & ~PORT_INT1LVL_gm ) | PORT_INT1LVL_LO_gc;
//Detect rising edge only
PORTA.PIN0CTRL |= 0x01;
PORTA.PIN0CTRL &= ~0x06;
PORTA.PIN1CTRL |= 0x01;
PORTA.PIN1CTRL &= ~0x06;
PORTA.INT0MASK = PIN0_bm;
PORTA.INT1MASK = PIN1_bm;
UsartWriteString("BOOT: Interrupts configured...\r\n");
//EBI/SDRAM
ebi_setup_port(12, 0, 0, EBI_PORT_3PORT | EBI_PORT_SDRAM);
/*
* Configure the EBI chip select for an 8 MB SDRAM located at
* \ref BOARD_EBI_SDRAM_BASE.
*/
ebi_cs_set_mode(&cs_config, EBI_CS_MODE_SDRAM_gc);
ebi_cs_set_address_size(&cs_config, EBI_CS_ASPACE_8MB_gc);
ebi_cs_set_base_address(&cs_config, BOARD_EBI_SDRAM_BASE);
/* Configure the EBI chip select to be in SDRAM mode. */
ebi_sdram_set_mode(&cs_config, EBI_CS_SDMODE_NORMAL_gc);
/* Setup the number of SDRAM rows and columns. */
ebi_sdram_set_row_bits(&sdram_config, 12);
ebi_sdram_set_col_bits(&sdram_config, 10);
/* Further, setup the SDRAM timing. */
ebi_sdram_set_cas_latency(&sdram_config, 3);
ebi_sdram_set_mode_delay(&sdram_config, EBI_MRDLY_2CLK_gc);
ebi_sdram_set_row_cycle_delay(&sdram_config, EBI_ROWCYCDLY_7CLK_gc);
ebi_sdram_set_row_to_precharge_delay(&sdram_config, EBI_RPDLY_7CLK_gc);
ebi_sdram_set_write_recovery_delay(&sdram_config, EBI_WRDLY_1CLK_gc);
ebi_sdram_set_self_refresh_to_active_delay(&sdram_config,
EBI_ESRDLY_7CLK_gc);
ebi_sdram_set_row_to_col_delay(&sdram_config, EBI_ROWCOLDLY_7CLK_gc);
ebi_sdram_set_refresh_period(&sdram_config, BOARD_EBI_SDRAM_REFRESH);
ebi_sdram_set_initialization_delay(&sdram_config,
BOARD_EBI_SDRAM_INITDLY);
/* Write SDRAM configuration into the EBI registers. */
ebi_sdram_write_config(&sdram_config);
/* Write the chip select configuration into the EBI registers. */
ebi_cs_write_config(EBI_SDRAM_CS, &cs_config);
ebi_enable_cs(EBI_SDRAM_CS, &cs_config);
UsartWriteString("BOOT: SDRAM configured...\r\n");
do {
// Wait for SDRAM to initialize.
} while (!ebi_sdram_is_ready());
UsartWriteString("BOOT: SDRAM ready...\r\n");
status_code_t retval = ebi_test_data_bus((hugemem_ptr_t)BOARD_EBI_SDRAM_BASE);
if (retval == STATUS_OK) {
UsartWriteString("BOOT: SDRAM data bus test completed...\r\n");
} else {
UsartWriteString("BOOT: WARNING: SDRAM data bus test failed...\r\n");
}
retval = ebi_test_addr_bus((hugemem_ptr_t)BOARD_EBI_SDRAM_BASE,BOARD_EBI_SDRAM_SIZE);
if (retval == STATUS_OK) {
UsartWriteString("BOOT: SDRAM address bus test completed...\r\n");
} else {
UsartWriteString("BOOT: WARNING: SDRAM address bus test failed...\r\n");
}
//_delay_ms(1);
//SD Card testing
UsartWriteString("BOOT: SD Card testing...\r\n");
//_delay_ms(1);
FRESULT f_err_code;
static FATFS FATFS_Obj;
UsartWriteString("BOOT: SD Card: initializing disk...\r\n");
disk_initialize(0);
UsartWriteString("BOOT: SD Card: mounting disk...\r\n");
f_err_code = f_mount(0, &FATFS_Obj);
if (f_err_code == FR_OK) {
FIL fil_obj;
int test_number = 5;
UsartWriteString("BOOT: SD Card: opening file...\r\n");
f_open(&fil_obj, "asplfc.txt", FA_WRITE);
UsartWriteString("BOOT: SD Card: writing file...\r\n");
int out = f_printf(&fil_obj, "moo %d", test_number);
UsartWriteString("BOOT: SD Card: closing file...\r\n");
f_close(&fil_obj);
} else {
UsartWriteLine("BOOT: WARNING: No SD card found...");
}
//PORTQ.OUTCLR = PIN2_bm | PIN4_bm;
UsartWriteString("\n\rASP LFC firmware -- v0.1\r\n");
UsartWriteString("> ");
while(1)
{
data=UsartReadChar(); // read char
// check for carriage return and try to match/execute command
if((data == '\r')||(index==sizeof(buffer)))
{
//PORTF.OUT ^= (1<<0); // switch LED
buffer[index]=0; // null terminate
index=0; // reset buffer index
UsartWriteString("\n\r"); // echo newline
ParseCommand(buffer); // attempt to parse command
UsartWriteString("> ");
}
else if(data==8) // backspace character
{
if(index>0)
index--; // backup one character
UsartWriteChar(data);
}
else
{
buffer[index++]=data;
UsartWriteChar(data);
};
// UsartWriteChar(data); // write char
// _delay_ms(100);
// PORTF.OUT ^= (1<<0); // toggle LED
};
};
/**
* \brief Main function.
*/
int main(void)
{
status_code_t retval;
/*
* Initialize the device by setting up the board, system clock and
* sleep manager.
*/
board_init();
sysclk_init();
sleepmgr_init();
/*
* Configure the EBI port with 12 address lines, no address latches or
* low pin count, and set it in SDRAM mode with 3-port EBI port.
*/
ebi_setup_port(12, 0, 0, EBI_PORT_3PORT | EBI_PORT_SDRAM);
/*
* Configure the EBI chip select for an 8 MB SDRAM located at
* \ref BOARD_EBI_SDRAM_BASE.
*/
ebi_cs_set_mode(&cs_config, EBI_CS_MODE_SDRAM_gc);
ebi_cs_set_address_size(&cs_config, EBI_CS_ASPACE_8MB_gc);
ebi_cs_set_base_address(&cs_config, BOARD_EBI_SDRAM_BASE);
/* Configure the EBI chip select to be in SDRAM mode. */
ebi_sdram_set_mode(&cs_config, EBI_CS_SDMODE_NORMAL_gc);
/* Setup the number of SDRAM rows and columns. */
ebi_sdram_set_row_bits(&sdram_config, 12);
ebi_sdram_set_col_bits(&sdram_config, 10);
/* Further, setup the SDRAM timing. */
ebi_sdram_set_cas_latency(&sdram_config, 3);
ebi_sdram_set_mode_delay(&sdram_config, EBI_MRDLY_2CLK_gc);
ebi_sdram_set_row_cycle_delay(&sdram_config, EBI_ROWCYCDLY_7CLK_gc);
ebi_sdram_set_row_to_precharge_delay(&sdram_config, EBI_RPDLY_7CLK_gc);
ebi_sdram_set_write_recovery_delay(&sdram_config, EBI_WRDLY_1CLK_gc);
ebi_sdram_set_self_refresh_to_active_delay(&sdram_config,
EBI_ESRDLY_7CLK_gc);
ebi_sdram_set_row_to_col_delay(&sdram_config, EBI_ROWCOLDLY_7CLK_gc);
ebi_sdram_set_refresh_period(&sdram_config, BOARD_EBI_SDRAM_REFRESH);
ebi_sdram_set_initialization_delay(&sdram_config,
BOARD_EBI_SDRAM_INITDLY);
/* Write SDRAM configuration into the EBI registers. */
ebi_sdram_write_config(&sdram_config);
/* Write the chip select configuration into the EBI registers. */
ebi_cs_write_config(EBI_SDRAM_CS, &cs_config);
ebi_enable_cs(EBI_SDRAM_CS, &cs_config);
/* Enable LED0: EBI is configured and enabled. */
gpio_set_pin_low(LED0_GPIO);
do {
// Wait for SDRAM to initialize.
} while (!ebi_sdram_is_ready());
/* Enable LED1: SDRAM is ready. */
gpio_set_pin_low(LED1_GPIO);
retval = ebi_test_data_bus((hugemem_ptr_t)BOARD_EBI_SDRAM_BASE);
if (retval) {
goto out;
}
/* Enable LED2: data bus test completed successfully. */
gpio_set_pin_low(LED2_GPIO);
retval = ebi_test_addr_bus((hugemem_ptr_t)BOARD_EBI_SDRAM_BASE,
BOARD_EBI_SDRAM_SIZE);
if (retval) {
goto out;
}
/* Enable LED3: address bus test completed successfully. */
gpio_set_pin_low(LED3_GPIO);
retval = ebi_test_data_integrity((hugemem_ptr_t)BOARD_EBI_SDRAM_BASE,
BOARD_EBI_SDRAM_SIZE);
if (retval) {
goto out;
}
/* Enable LED4: data integrity test completed successfully. */
gpio_set_pin_low(LED4_GPIO);
out:
/* Enable LED7: example application has completed. */
gpio_set_pin_low(LED7_GPIO);
for (;;) {
sleepmgr_enter_sleep();
}
}
