int SHIFT_ROT()
{
long size;
int reg, count_reg, shift_count, shift_size, shift_result, type, counter, msb;
int direction, temp_bit, temp_bit_2;
if ((inst & 0xc0) == 0xc0) {
int error = eff_addr((long)WORD_MASK, MEM_ALT_ADDR, true);
if (error) // if address error
return error; // return error code
size = WORD_MASK;
shift_count = 1;
source = dest = EV1 & size;
type = (inst & 0x600) >> 9;
inc_cyc (8);
} else {
S32 SHIFT_ROT()
{
S32 size;
S32 reg, count_reg, shift_count, shift_size, type, counter, msb, mem_reg;
S32 direction, temp_bit, temp_bit_2;
if (mem_reg = ((inst & 0xc0) == 0xc0))
{
if (eff_addr ((S32) WORD, MEM_ALT_ADDR, TRUE))
return (BAD_INST); /* bad instruction format */
size = WORD;
shift_count = 1;
source = dest = EV1 & size;
type = (inst & 0x600) >> 9;
}
else
{
if (decode_size(&size))
