static void fiq_enable(struct platform_device *pdev, unsigned int fiq, bool enable)
{
if (enable)
enable_fiq(fiq);
else
disable_fiq(fiq);
}
static void floppy_enable_dma(dmach_t channel, dma_t *dma)
{
void *fiqhandler_start;
unsigned int fiqhandler_length;
struct pt_regs regs;
if (dma->using_sg)
BUG();
if (dma->dma_mode == DMA_MODE_READ) {
extern unsigned char floppy_fiqin_start, floppy_fiqin_end;
fiqhandler_start = &floppy_fiqin_start;
fiqhandler_length = &floppy_fiqin_end - &floppy_fiqin_start;
} else {
extern unsigned char floppy_fiqout_start, floppy_fiqout_end;
fiqhandler_start = &floppy_fiqout_start;
fiqhandler_length = &floppy_fiqout_end - &floppy_fiqout_start;
}
regs.ARM_r9 = dma->buf.length;
regs.ARM_r10 = (unsigned long)dma->buf.__address;
regs.ARM_fp = (unsigned long)FLOPPYDMA_BASE;
if (claim_fiq(&fh)) {
printk("floppydma: couldn't claim FIQ.\n");
return;
}
set_fiq_handler(fiqhandler_start, fiqhandler_length);
set_fiq_regs(®s);
enable_fiq(dma->dma_irq);
}
static void a5k_floppy_enable_dma(dmach_t channel, dma_t *dma)
{
struct pt_regs regs;
void *fiqhandler_start;
unsigned int fiqhandler_length;
extern void floppy_fiqsetup(unsigned long len, unsigned long addr,
unsigned long port);
if (dma->dma_mode == DMA_MODE_READ) {
extern unsigned char floppy_fiqin_start, floppy_fiqin_end;
fiqhandler_start = &floppy_fiqin_start;
fiqhandler_length = &floppy_fiqin_end - &floppy_fiqin_start;
} else {
extern unsigned char floppy_fiqout_start, floppy_fiqout_end;
fiqhandler_start = &floppy_fiqout_start;
fiqhandler_length = &floppy_fiqout_end - &floppy_fiqout_start;
}
if (claim_fiq(&fh)) {
printk("floppydma: couldn't claim FIQ.\n");
return;
}
memcpy((void *)0x1c, fiqhandler_start, fiqhandler_length);
regs.ARM_r9 = dma->buf.length;
regs.ARM_r10 = (unsigned long)dma->buf.address;
regs.ARM_fp = FLOPPYDMA_BASE;
set_fiq_regs(®s);
enable_fiq(dma->dma_irq);
}
static int snd_imx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct imx_pcm_runtime_data *iprtd = runtime->private_data;
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
case SNDRV_PCM_TRIGGER_RESUME:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
imx_ssi_set_next_poll(iprtd);
add_timer(&iprtd->timer);
if (++fiq_enable == 1)
enable_fiq(imx_pcm_fiq);
break;
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_SUSPEND:
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
del_timer(&iprtd->timer);
if (--fiq_enable == 0)
disable_fiq(imx_pcm_fiq);
break;
default:
return -EINVAL;
}
return 0;
}
static void arc_floppy_data_enable_dma(dmach_t channel, dma_t *dma)
{
DPRINTK("arc_floppy_data_enable_dma\n");
if (dma->using_sg)
BUG();
switch (dma->dma_mode) {
case DMA_MODE_READ: { /* read */
unsigned long flags;
DPRINTK("enable_dma fdc1772 data read\n");
local_save_flags_cli(flags);
clf();
memcpy ((void *)0x1c, (void *)&fdc1772_dma_read,
&fdc1772_dma_read_end - &fdc1772_dma_read);
fdc1772_setupdma(dma->buf.length, dma->buf.__address); /* Sets data pointer up */
enable_fiq(FIQ_FLOPPYDATA);
loacl_irq_restore(flags);
}
break;
case DMA_MODE_WRITE: { /* write */
unsigned long flags;
DPRINTK("enable_dma fdc1772 data write\n");
local_save_flags_cli(flags);
clf();
memcpy ((void *)0x1c, (void *)&fdc1772_dma_write,
&fdc1772_dma_write_end - &fdc1772_dma_write);
fdc1772_setupdma(dma->buf.length, dma->buf.__address); /* Sets data pointer up */
enable_fiq(FIQ_FLOPPYDATA);
local_irq_restore(flags);
}
break;
default:
printk ("enable_dma: dma%d not initialised\n", channel);
}
}
BSP_START_TEXT_SECTION void arm_gic_irq_initialize_secondary_cpu(void)
{
volatile gic_cpuif *cpuif = GIC_CPUIF;
volatile gic_dist *dist = ARM_GIC_DIST;
while ((dist->icddcr & GIC_DIST_ICDDCR_ENABLE) == 0) {
/* Wait */
}
#ifdef BSP_ARM_GIC_ENABLE_FIQ_FOR_GROUP_0
dist->icdigr[0] = 0xffffffff;
#endif
cpuif->iccpmr = GIC_CPUIF_ICCPMR_PRIORITY(0xff);
cpuif->iccbpr = GIC_CPUIF_ICCBPR_BINARY_POINT(0x0);
cpuif->iccicr = CPUIF_ICCICR;
enable_fiq();
}
static void arc_floppy_data_enable_dma(dmach_t channel, dma_t *dma)
{
DPRINTK("arc_floppy_data_enable_dma\n");
switch (dma->dma_mode) {
case DMA_MODE_READ: { /* read */
extern unsigned char fdc1772_dma_read, fdc1772_dma_read_end;
extern void fdc1772_setupdma(unsigned int count,unsigned int addr);
unsigned long flags;
DPRINTK("enable_dma fdc1772 data read\n");
save_flags(flags);
clf();
memcpy ((void *)0x1c, (void *)&fdc1772_dma_read,
&fdc1772_dma_read_end - &fdc1772_dma_read);
fdc1772_setupdma(dma->buf.length, dma->buf.address); /* Sets data pointer up */
enable_fiq(FIQ_FLOPPYDATA);
restore_flags(flags);
}
break;
case DMA_MODE_WRITE: { /* write */
extern unsigned char fdc1772_dma_write, fdc1772_dma_write_end;
extern void fdc1772_setupdma(unsigned int count,unsigned int addr);
unsigned long flags;
DPRINTK("enable_dma fdc1772 data write\n");
save_flags(flags);
clf();
memcpy ((void *)0x1c, (void *)&fdc1772_dma_write,
&fdc1772_dma_write_end - &fdc1772_dma_write);
fdc1772_setupdma(dma->buf.length, dma->buf.address); /* Sets data pointer up */
enable_fiq(FIQ_FLOPPYDATA;
restore_flags(flags);
}
break;
default:
printk ("enable_dma: dma%d not initialised\n", channel);
}
}
int enable_system_timer_fiq_interrupt(void)
{
//Set the system timer register
unsigned int start_tick = GET32(SYSTEM_TIMER_CL0_REG_LSB);
PUT32(SYSTEM_TIMER_CMP1,(start_tick + (time_ms*1000)));
//Set the system timer match register
System_timer_control_Reg_t systimctrl;
systimctrl = (System_timer_control_Reg_t) GET32(SYSTEM_TIMER_CS_REG);
systimctrl.mBits.System_timer1_match = 1;
PUT32(SYSTEM_TIMER_CS_REG,systimctrl.mAsU32);
//Set the Interrupt senable register
Interrupt_FIQ_control_Reg_t intrfiqenable;
intrfiqenable = (Interrupt_FIQ_control_Reg_t) GET32(INTERRUPT_FIQ_CONTROL);
intrfiqenable.mBits.FIQ_enable = 1;
intrfiqenable.mBits.FIQ_source = 1;
PUT32(INTERRUPT_FIQ_CONTROL,intrfiqenable.mAsU32);
enable_fiq();
return 0;
}
static void eventq_get(CMD_T* cmd)
{
disable_fiq();
SETREG(SATA_EQ_CTRL, 1); // The next entry from the Event Queue is copied to SATA_EQ_DATA_0 through SATA_EQ_DATA_2.
int count=0;
while ((GETREG(SATA_EQ_DATA_2) & 8) != 0) {
count++;
if (count > 100000) {
uart_print_level_1("Warning in sata_main::eventq_get\r\n");
count=0;
}
}
UINT32 EQReadData0 = GETREG(SATA_EQ_DATA_0);
UINT32 EQReadData1 = GETREG(SATA_EQ_DATA_1);
cmd->lba = EQReadData1 & 0x3FFFFFFF;
cmd->sector_count = EQReadData0 >> 16;
cmd->cmd_type = EQReadData1 >> 31;
if(cmd->sector_count == 0)
cmd->sector_count = 0x10000;
if (g_sata_context.eq_full)
{
g_sata_context.eq_full = FALSE;
if ((GETREG(SATA_PHY_STATUS) & 0xF0F) == 0x103)
{
SETREG(SATA_CTRL_2, g_sata_action_flags);
}
}
enable_fiq();
}
rtems_status_code bsp_interrupt_facility_initialize(void)
{
volatile gic_cpuif *cpuif = GIC_CPUIF;
volatile gic_dist *dist = ARM_GIC_DIST;
uint32_t id_count = get_id_count(dist);
uint32_t id;
arm_cp15_set_exception_handler(
ARM_EXCEPTION_IRQ,
_ARMV4_Exception_interrupt
);
for (id = 0; id < id_count; id += 32) {
#ifdef BSP_ARM_GIC_ENABLE_FIQ_FOR_GROUP_0
dist->icdigr[id / 32] = 0xffffffff;
#endif
dist->icdicer[id / 32] = 0xffffffff;
}
for (id = 0; id < id_count; ++id) {
gic_id_set_priority(dist, id, PRIORITY_DEFAULT);
}
for (id = 32; id < id_count; ++id) {
gic_id_set_targets(dist, id, 0x01);
}
cpuif->iccpmr = GIC_CPUIF_ICCPMR_PRIORITY(0xff);
cpuif->iccbpr = GIC_CPUIF_ICCBPR_BINARY_POINT(0x0);
cpuif->iccicr = CPUIF_ICCICR;
dist->icddcr = GIC_DIST_ICDDCR_ENABLE_GRP_1 | GIC_DIST_ICDDCR_ENABLE;
enable_fiq();
return RTEMS_SUCCESSFUL;
}
static int __init mx1_camera_probe(struct platform_device *pdev)
{
struct mx1_camera_dev *pcdev;
struct resource *res;
struct pt_regs regs;
struct clk *clk;
void __iomem *base;
unsigned int irq;
int err = 0;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
irq = platform_get_irq(pdev, 0);
if (!res || (int)irq <= 0) {
err = -ENODEV;
goto exit;
}
clk = clk_get(&pdev->dev, "csi_clk");
if (IS_ERR(clk)) {
err = PTR_ERR(clk);
goto exit;
}
pcdev = kzalloc(sizeof(*pcdev), GFP_KERNEL);
if (!pcdev) {
dev_err(&pdev->dev, "Could not allocate pcdev\n");
err = -ENOMEM;
goto exit_put_clk;
}
pcdev->res = res;
pcdev->clk = clk;
pcdev->pdata = pdev->dev.platform_data;
if (pcdev->pdata)
pcdev->mclk = pcdev->pdata->mclk_10khz * 10000;
if (!pcdev->mclk) {
dev_warn(&pdev->dev,
"mclk_10khz == 0! Please, fix your platform data. "
"Using default 20MHz\n");
pcdev->mclk = 20000000;
}
INIT_LIST_HEAD(&pcdev->capture);
spin_lock_init(&pcdev->lock);
/*
* Request the regions.
*/
if (!request_mem_region(res->start, resource_size(res), DRIVER_NAME)) {
err = -EBUSY;
goto exit_kfree;
}
base = ioremap(res->start, resource_size(res));
if (!base) {
err = -ENOMEM;
goto exit_release;
}
pcdev->irq = irq;
pcdev->base = base;
/* request dma */
pcdev->dma_chan = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_HIGH);
if (pcdev->dma_chan < 0) {
dev_err(&pdev->dev, "Can't request DMA for MX1 CSI\n");
err = -EBUSY;
goto exit_iounmap;
}
dev_dbg(&pdev->dev, "got DMA channel %d\n", pcdev->dma_chan);
imx_dma_setup_handlers(pcdev->dma_chan, mx1_camera_dma_irq, NULL,
pcdev);
imx_dma_config_channel(pcdev->dma_chan, IMX_DMA_TYPE_FIFO,
IMX_DMA_MEMSIZE_32, MX1_DMA_REQ_CSI_R, 0);
/* burst length : 16 words = 64 bytes */
imx_dma_config_burstlen(pcdev->dma_chan, 0);
/* request irq */
err = claim_fiq(&fh);
if (err) {
dev_err(&pdev->dev, "Camera interrupt register failed\n");
goto exit_free_dma;
}
set_fiq_handler(&mx1_camera_sof_fiq_start, &mx1_camera_sof_fiq_end -
&mx1_camera_sof_fiq_start);
regs.ARM_r8 = (long)MX1_DMA_DIMR;
regs.ARM_r9 = (long)MX1_DMA_CCR(pcdev->dma_chan);
regs.ARM_r10 = (long)pcdev->base + CSICR1;
regs.ARM_fp = (long)pcdev->base + CSISR;
regs.ARM_sp = 1 << pcdev->dma_chan;
set_fiq_regs(®s);
mxc_set_irq_fiq(irq, 1);
enable_fiq(irq);
pcdev->soc_host.drv_name = DRIVER_NAME;
pcdev->soc_host.ops = &mx1_soc_camera_host_ops;
pcdev->soc_host.priv = pcdev;
pcdev->soc_host.v4l2_dev.dev = &pdev->dev;
pcdev->soc_host.nr = pdev->id;
err = soc_camera_host_register(&pcdev->soc_host);
if (err)
goto exit_free_irq;
dev_info(&pdev->dev, "MX1 Camera driver loaded\n");
return 0;
exit_free_irq:
disable_fiq(irq);
mxc_set_irq_fiq(irq, 0);
release_fiq(&fh);
exit_free_dma:
imx_dma_free(pcdev->dma_chan);
exit_iounmap:
iounmap(base);
exit_release:
release_mem_region(res->start, resource_size(res));
exit_kfree:
kfree(pcdev);
exit_put_clk:
clk_put(clk);
exit:
return err;
}
static void init(void)
{
int rc;
bool mounted = false;
#if CONFIG_CHARGING && (CONFIG_CPU == SH7034)
/* if nobody initialized ATA before, I consider this a cold start */
bool coldstart = (PACR2 & 0x4000) != 0; /* starting from Flash */
#endif
system_init();
kernel_init();
#ifdef HAVE_ADJUSTABLE_CPU_FREQ
set_cpu_frequency(CPUFREQ_NORMAL);
#ifdef CPU_COLDFIRE
coldfire_set_pllcr_audio_bits(DEFAULT_PLLCR_AUDIO_BITS);
#endif
cpu_boost(true);
#endif
buffer_init();
settings_reset();
i2c_init();
power_init();
enable_irq();
#ifdef CPU_ARM
enable_fiq();
#endif
/* current_tick should be ticking by now */
CHART("ticking");
lcd_init();
#ifdef HAVE_REMOTE_LCD
lcd_remote_init();
#endif
font_init();
CHART(">show_logo");
show_logo();
CHART("<show_logo");
lang_init(core_language_builtin, language_strings,
LANG_LAST_INDEX_IN_ARRAY);
#ifdef DEBUG
debug_init();
#else
#ifdef HAVE_SERIAL
serial_setup();
#endif
#endif
#if CONFIG_RTC
rtc_init();
#endif
#ifdef HAVE_RTC_RAM
CHART(">settings_load(RTC)");
settings_load(SETTINGS_RTC); /* early load parts of global_settings */
CHART("<settings_load(RTC)");
#endif
adc_init();
usb_init();
#if CONFIG_USBOTG == USBOTG_ISP1362
isp1362_init();
#elif CONFIG_USBOTG == USBOTG_M5636
m5636_init();
#endif
backlight_init();
button_init();
powermgmt_init();
#if CONFIG_TUNER
radio_init();
#endif
/* Keep the order of this 3 (viewportmanager handles statusbars)
* Must be done before any code uses the multi-screen API */
CHART(">gui_syncstatusbar_init");
gui_syncstatusbar_init(&statusbars);
CHART("<gui_syncstatusbar_init");
CHART(">sb_skin_init");
sb_skin_init();
CHART("<sb_skin_init");
CHART(">gui_sync_wps_init");
gui_sync_wps_init();
CHART("<gui_sync_wps_init");
CHART(">viewportmanager_init");
viewportmanager_init();
CHART("<viewportmanager_init");
#if CONFIG_CHARGING && (CONFIG_CPU == SH7034)
/* charger_inserted() can't be used here because power_thread()
hasn't checked power_input_status() yet */
if (coldstart && (power_input_status() & POWER_INPUT_MAIN_CHARGER)
&& !global_settings.car_adapter_mode
#ifdef ATA_POWER_PLAYERSTYLE
&& !ide_powered() /* relies on probing result from bootloader */
#endif
)
{
rc = charging_screen(); /* display a "charging" screen */
if (rc == 1) /* charger removed */
power_off();
/* "On" pressed or USB connected: proceed */
show_logo(); /* again, to provide better visual feedback */
}
#endif
CHART(">storage_init");
rc = storage_init();
CHART("<storage_init");
if(rc)
{
#ifdef HAVE_LCD_BITMAP
lcd_clear_display();
lcd_putsf(0, 1, "ATA error: %d", rc);
lcd_puts(0, 3, "Press ON to debug");
lcd_update();
while(!(button_get(true) & BUTTON_REL)); /*DO NOT CHANGE TO ACTION SYSTEM */
dbg_ports();
#endif
panicf("ata: %d", rc);
}
#ifdef HAVE_EEPROM_SETTINGS
CHART(">eeprom_settings_init");
eeprom_settings_init();
CHART("<eeprom_settings_init");
#endif
#ifndef HAVE_USBSTACK
usb_start_monitoring();
while (usb_detect() == USB_INSERTED)
{
#ifdef HAVE_EEPROM_SETTINGS
firmware_settings.disk_clean = false;
#endif
/* enter USB mode early, before trying to mount */
if (button_get_w_tmo(HZ/10) == SYS_USB_CONNECTED)
#if (CONFIG_STORAGE & STORAGE_MMC)
if (!mmc_touched() ||
(mmc_remove_request() == SYS_HOTSWAP_EXTRACTED))
#endif
{
gui_usb_screen_run();
mounted = true; /* mounting done @ end of USB mode */
}
#ifdef HAVE_USB_POWER
if (usb_powered()) /* avoid deadlock */
break;
#endif
}
#endif
if (!mounted)
{
CHART(">disk_mount_all");
rc = disk_mount_all();
CHART("<disk_mount_all");
if (rc<=0)
{
lcd_clear_display();
lcd_puts(0, 0, "No partition");
lcd_puts(0, 1, "found.");
#ifdef HAVE_LCD_BITMAP
lcd_puts(0, 2, "Insert USB cable");
lcd_puts(0, 3, "and fix it.");
#endif
lcd_update();
while(button_get(true) != SYS_USB_CONNECTED) {};
gui_usb_screen_run();
system_reboot();
}
}
#if defined(SETTINGS_RESET) || (CONFIG_KEYPAD == IPOD_4G_PAD) || \
(CONFIG_KEYPAD == IRIVER_H10_PAD)
#ifdef SETTINGS_RESET
/* Reset settings if holding the reset button. (Rec on Archos,
A on Gigabeat) */
if ((button_status() & SETTINGS_RESET) == SETTINGS_RESET)
#else
/* Reset settings if the hold button is turned on */
if (button_hold())
#endif
{
splash(HZ*2, str(LANG_RESET_DONE_CLEAR));
settings_reset();
}
else
#endif
{
CHART(">settings_load(ALL)");
settings_load(SETTINGS_ALL);
CHART("<settings_load(ALL)");
}
CHART(">init_dircache(true)");
rc = init_dircache(true);
CHART("<init_dircache(true)");
if (rc < 0)
{
#ifdef HAVE_TAGCACHE
remove(TAGCACHE_STATEFILE);
#endif
}
CHART(">settings_apply(true)");
settings_apply(true);
CHART("<settings_apply(true)");
CHART(">init_dircache(false)");
init_dircache(false);
CHART("<init_dircache(false)");
#ifdef HAVE_TAGCACHE
CHART(">init_tagcache");
init_tagcache();
CHART("<init_tagcache");
#endif
#ifdef HAVE_EEPROM_SETTINGS
if (firmware_settings.initialized)
{
/* In case we crash. */
firmware_settings.disk_clean = false;
CHART(">eeprom_settings_store");
eeprom_settings_store();
CHART("<eeprom_settings_store");
}
#endif
playlist_init();
tree_mem_init();
filetype_init();
scrobbler_init();
#if CONFIG_CODEC == SWCODEC
tdspeed_init();
#endif /* CONFIG_CODEC == SWCODEC */
#if CONFIG_CODEC != SWCODEC
/* No buffer allocation (see buffer.c) may take place after the call to
audio_init() since the mpeg thread takes the rest of the buffer space */
mp3_init( global_settings.volume,
global_settings.bass,
global_settings.treble,
global_settings.balance,
global_settings.loudness,
global_settings.avc,
global_settings.channel_config,
global_settings.stereo_width,
global_settings.mdb_strength,
global_settings.mdb_harmonics,
global_settings.mdb_center,
global_settings.mdb_shape,
global_settings.mdb_enable,
global_settings.superbass);
/* audio_init must to know the size of voice buffer so init voice first */
talk_init();
#endif /* CONFIG_CODEC != SWCODEC */
CHART(">audio_init");
audio_init();
CHART("<audio_init");
#if (CONFIG_CODEC == SWCODEC) && defined(HAVE_RECORDING) && !defined(SIMULATOR)
pcm_rec_init();
#endif
/* runtime database has to be initialized after audio_init() */
cpu_boost(false);
#if CONFIG_CHARGING
car_adapter_mode_init();
#endif
#ifdef IPOD_ACCESSORY_PROTOCOL
iap_setup(global_settings.serial_bitrate);
#endif
#ifdef HAVE_ACCESSORY_SUPPLY
accessory_supply_set(global_settings.accessory_supply);
#endif
#ifdef HAVE_LINEOUT_POWEROFF
lineout_set(global_settings.lineout_active);
#endif
#ifdef HAVE_HOTSWAP_STORAGE_AS_MAIN
CHART("<check_bootfile(false)");
check_bootfile(false); /* remember write time and filesize */
CHART(">check_bootfile(false)");
#endif
CHART("<settings_apply_skins");
settings_apply_skins();
CHART(">settings_apply_skins");
}
void rk_fiq_enable(int irq)
{
printk("rk_fiq_enable\n");
rk_fiq_unmask(irq_get_irq_data(irq));
enable_fiq(irq);
}
