static int generalTimeGetEventPriority(epicsTimeStamp *pDest, int eventNumber,
int *pPrio)
{
gtProvider *ptp;
int status = S_time_noProvider;
generalTime_Init();
if ((eventNumber < 0 || eventNumber >= NUM_TIME_EVENTS) &&
(eventNumber != epicsTimeEventBestTime))
return S_time_badEvent;
epicsMutexMustLock(gtPvt.eventListLock);
for (ptp = (gtProvider *)ellFirst(>Pvt.eventProviders);
ptp; ptp = (gtProvider *)ellNext(&ptp->node)) {
status = ptp->get.Event(pDest, eventNumber);
if (status == epicsTimeOK) {
gtPvt.lastEventProvider = ptp;
if (pPrio)
*pPrio = ptp->priority;
if (eventNumber == epicsTimeEventBestTime) {
if (epicsTimeGreaterThanEqual(pDest,
>Pvt.lastProvidedBestTime)) {
gtPvt.lastProvidedBestTime = *pDest;
} else {
int key;
*pDest = gtPvt.lastProvidedBestTime;
key = epicsInterruptLock();
gtPvt.ErrorCounts++;
epicsInterruptUnlock(key);
}
} else {
if (epicsTimeGreaterThanEqual(pDest,
>Pvt.eventTime[eventNumber])) {
gtPvt.eventTime[eventNumber] = *pDest;
} else {
int key;
*pDest = gtPvt.eventTime[eventNumber];
key = epicsInterruptLock();
gtPvt.ErrorCounts++;
epicsInterruptUnlock(key);
}
}
break;
}
}
if (status)
gtPvt.lastEventProvider = NULL;
epicsMutexUnlock(gtPvt.eventListLock);
return status;
}
int generalTimeGetErrorCounts(void)
{
int key = epicsInterruptLock();
int errors = gtPvt.ErrorCounts;
epicsInterruptUnlock(key);
return errors;
}
void
EvrInput::backEvtSet(epicsUInt32 e)
{
if(e>255)
throw std::out_of_range("Event code # out of range. Range: 0 - 255");
int key=epicsInterruptLock();
epicsUInt32 val;
val = READ32(base, InputMapFP(idx) );
val &= ~InputMapFP_back_mask;
val |= e << InputMapFP_back_shft;
WRITE32(base, InputMapFP(idx), val);
epicsInterruptUnlock(key);
}
void scanOnce(struct dbCommon *precord)
{
static int newOverflow = TRUE;
int lockKey;
int pushOK;
lockKey = epicsInterruptLock();
pushOK = epicsRingPointerPush(onceQ, precord);
epicsInterruptUnlock(lockKey);
if (!pushOK) {
if (newOverflow) errlogPrintf("scanOnce: Ring buffer overflow\n");
newOverflow = FALSE;
} else {
newOverflow = TRUE;
}
epicsEventSignal(onceSem);
}
int generalTimeGetExceptPriority(epicsTimeStamp *pDest, int *pPrio, int ignore)
{
gtProvider *ptp;
int status = epicsTimeERROR;
generalTime_Init();
epicsMutexMustLock(gtPvt.timeListLock);
for (ptp = (gtProvider *)ellFirst(>Pvt.timeProviders);
ptp; ptp = (gtProvider *)ellNext(&ptp->node)) {
if (ptp->priority == ignore)
continue;
status = ptp->get.Time(pDest);
if (status == epicsTimeOK) {
/* check time is monotonic */
if (epicsTimeGreaterThanEqual(pDest, >Pvt.lastProvidedTime)) {
gtPvt.lastProvidedTime = *pDest;
if (ignore == 0)
gtPvt.lastTimeProvider = ptp;
if (pPrio)
*pPrio = ptp->priority;
} else {
int key;
*pDest = gtPvt.lastProvidedTime;
if (pPrio)
*pPrio = gtPvt.lastTimeProvider->priority;
key = epicsInterruptLock();
gtPvt.ErrorCounts++;
epicsInterruptUnlock(key);
}
break;
}
}
if (status == epicsTimeERROR &&
ignore == 0)
gtPvt.lastTimeProvider = NULL;
epicsMutexUnlock(gtPvt.timeListLock);
return status;
}
void generalTimeResetErrorCounts(void)
{
int key = epicsInterruptLock();
gtPvt.ErrorCounts = 0;
epicsInterruptUnlock(key);
}
int
sharedDevPCIBarLen(
const epicsPCIDevice* dev,
unsigned int bar,
epicsUInt32 *len
)
{
struct osdPCIDevice *osd=pcidev2osd(dev);
int b=dev->bus, d=dev->device, f=dev->function;
UINT32 start, max, mask;
long iflag;
if(!osd->base[bar])
return S_dev_badSignalNumber;
/* Disable interrupts since we are changing a device's PCI BAR
* register. This is not safe to do on an active device.
* Disabling interrupts avoids some, but not all, of these problems
*/
iflag=epicsInterruptLock();
if(osd->len[bar]) {
*len=osd->len[bar];
epicsInterruptUnlock(iflag);
return 0;
}
/* Note: the following assumes the bar is 32-bit */
if(dev->bar[bar].ioport)
mask=PCI_BASE_ADDRESS_IO_MASK;
else
mask=PCI_BASE_ADDRESS_MEM_MASK;
/*
* The idea here is to find the least significant bit which
* is set by writing 1 to all the address bits.
*
* For example the mask for 32-bit IO Memory is 0xfffffff0
* If a base address is currently set to 0x00043000
* and when the mask is written the address becomes
* 0xffffff80 then the length is 0x80 (128) bytes
*/
pci_read_config_dword(b,d,f,PCI_BASE_ADDRESS(bar), &start);
/* If the BIOS didn't set this BAR then don't mess with it */
if((start&mask)==0) {
epicsInterruptUnlock(iflag);
return S_dev_badRequest;
}
pci_write_config_dword(b,d,f,PCI_BASE_ADDRESS(bar), mask);
pci_read_config_dword(b,d,f,PCI_BASE_ADDRESS(bar), &max);
pci_write_config_dword(b,d,f,PCI_BASE_ADDRESS(bar), start);
/* mask out bits which aren't address bits */
max&=mask;
/* Find lsb */
osd->len[bar] = max & ~(max-1);
*len=osd->len[bar];
epicsInterruptUnlock(iflag);
return 0;
}
static
void isrThread(void* arg)
{
osdISR *isr=arg;
osdPCIDevice *osd=isr->osd;
int interrupted=0, ret;
epicsInt32 event, next=0;
const char* name;
int isrflag;
name=epicsThreadGetNameSelf();
epicsMutexMustLock(osd->devLock);
if (isr->waiter_status!=osdISRStarting) {
isr->waiter_status = osdISRDone;
epicsMutexUnlock(osd->devLock);
return;
}
isr->waiter_status = osdISRRunning;
while (isr->waiter_status==osdISRRunning) {
epicsMutexUnlock(osd->devLock);
/* The interrupted flag lets us check
* the status flag (taking devLock)
* once each iteration
*/
if (interrupted) {
interrupted=0;
isrflag=epicsInterruptLock();
(isr->fptr)(isr->param);
epicsInterruptUnlock(isrflag);
}
ret=read(osd->fd, &event, sizeof(event));
if (ret==-1) {
switch(errno) {
case EINTR: /* interrupted by a signal */
break;
default:
errlogPrintf("isrThread '%s' read error %d\n",
name,errno);
epicsThreadSleep(0.5);
}
} else
interrupted=1;
if (next!=event && next!=0) {
errlogPrintf("isrThread '%s' missed %d events\n",
name, event-next);
}
next=event+1;
epicsMutexMustLock(osd->devLock);
}
isr->waiter_status = osdISRDone;
epicsMutexUnlock(osd->devLock);
epicsEventSignal(isr->done);
}
