/****************************************************************************** * CRTC *****************************************************************************/ static int nvd0_crtc_set_dither(struct nouveau_crtc *nv_crtc, bool on, bool update) { struct drm_device *dev = nv_crtc->base.dev; u32 *push, mode; mode = 0x00000000; if (on) { /* 0x11: 6bpc dynamic 2x2 * 0x13: 8bpc dynamic 2x2 * 0x19: 6bpc static 2x2 * 0x1b: 8bpc static 2x2 * 0x21: 6bpc temporal * 0x23: 8bpc temporal */ mode = 0x00000011; } push = evo_wait(dev, 0, 4); if (push) { evo_mthd(push, 0x0490 + (nv_crtc->index * 0x300), 1); evo_data(push, mode); if (update) { evo_mthd(push, 0x0080, 1); evo_data(push, 0x00000000); } evo_kick(push, dev, 0); } return 0; }
static void pior507d_ctrl(struct nv50_core *core, int or, u32 ctrl, struct nv50_head_atom *asyh) { u32 *push; if ((push = evo_wait(&core->chan, 2))) { if (asyh) { ctrl |= asyh->or.depth << 16; ctrl |= asyh->or.nvsync << 13; ctrl |= asyh->or.nhsync << 12; } evo_mthd(push, 0x0700 + (or * 0x040), 1); evo_data(push, ctrl); evo_kick(push, &core->chan); } }