static int fimc_is_resourcemgr_initmem(struct fimc_is_resourcemgr *resourcemgr)
{
	int ret = 0;
	u32 offset;

	dbg_core("fimc_is_init_mem - ION\n");

	ret = fimc_is_resourcemgr_allocmem(resourcemgr);
	if (ret) {
		err("Couldn't alloc for FIMC-IS firmware\n");
		ret = -ENOMEM;
		goto p_err;
	}

	offset = FW_SHARED_OFFSET;
	resourcemgr->minfo.dvaddr_fshared = resourcemgr->minfo.dvaddr + offset;
	resourcemgr->minfo.kvaddr_fshared = resourcemgr->minfo.kvaddr + offset;

	offset = FIMC_IS_A5_MEM_SIZE - FIMC_IS_REGION_SIZE;
	resourcemgr->minfo.dvaddr_region = resourcemgr->minfo.dvaddr + offset;
	resourcemgr->minfo.kvaddr_region = resourcemgr->minfo.kvaddr + offset;

	offset = FIMC_IS_A5_MEM_SIZE;
#ifdef ENABLE_ODC
	resourcemgr->minfo.dvaddr_odc = resourcemgr->minfo.dvaddr + offset;
	resourcemgr->minfo.kvaddr_odc = resourcemgr->minfo.kvaddr + offset;
	offset += (SIZE_ODC_INTERNAL_BUF * NUM_ODC_INTERNAL_BUF);
#else
	resourcemgr->minfo.dvaddr_odc = 0;
	resourcemgr->minfo.kvaddr_odc = 0;
#endif

#ifdef ENABLE_VDIS
	resourcemgr->minfo.dvaddr_dis = resourcemgr->minfo.dvaddr + offset;
	resourcemgr->minfo.kvaddr_dis = resourcemgr->minfo.kvaddr + offset;
	offset += (SIZE_DIS_INTERNAL_BUF * NUM_DIS_INTERNAL_BUF);
#else
	resourcemgr->minfo.dvaddr_dis = 0;
	resourcemgr->minfo.kvaddr_dis = 0;
#endif

#ifdef ENABLE_DNR
	resourcemgr->minfo.dvaddr_3dnr = resourcemgr->minfo.dvaddr + offset;
	resourcemgr->minfo.kvaddr_3dnr = resourcemgr->minfo.kvaddr + offset;
	offset += (SIZE_DNR_INTERNAL_BUF * NUM_DNR_INTERNAL_BUF);
#else
	resourcemgr->minfo.dvaddr_3dnr = 0;
	resourcemgr->minfo.kvaddr_3dnr = 0;
#endif

	dbg_core("fimc_is_init_mem done\n");

p_err:
	return ret;
}
Exemplo n.º 2
0
static int fimc_is_resourcemgr_initmem(struct fimc_is_resourcemgr *resourcemgr)
{
	int ret = 0;
#ifdef ENABLE_FD_SW
	int num_buf = 0;
#endif
#ifdef ENABLE_FD_DMA_INPUT
	int fd_buf = 0;
#endif
	u32 offset;

	dbg_core("fimc_is_init_mem - ION\n");

	ret = fimc_is_resourcemgr_allocmem(resourcemgr);
	if (ret) {
		err("Couldn't alloc for FIMC-IS firmware\n");
		ret = -ENOMEM;
		goto p_err;
	}

	offset = FW_SHARED_OFFSET;
	resourcemgr->minfo.dvaddr_fshared = resourcemgr->minfo.dvaddr + offset;
	resourcemgr->minfo.kvaddr_fshared = resourcemgr->minfo.kvaddr + offset;

	offset = FIMC_IS_A5_MEM_SIZE - FIMC_IS_REGION_SIZE;
	resourcemgr->minfo.dvaddr_region = resourcemgr->minfo.dvaddr + offset;
	resourcemgr->minfo.kvaddr_region = resourcemgr->minfo.kvaddr + offset;

	offset = FIMC_IS_A5_MEM_SIZE;
#ifdef ENABLE_ODC
	resourcemgr->minfo.dvaddr_odc = resourcemgr->minfo.dvaddr + offset;
	resourcemgr->minfo.kvaddr_odc = resourcemgr->minfo.kvaddr + offset;
	offset += (SIZE_ODC_INTERNAL_BUF * NUM_ODC_INTERNAL_BUF);
#else
	resourcemgr->minfo.dvaddr_odc = 0;
	resourcemgr->minfo.kvaddr_odc = 0;
#endif

#ifdef ENABLE_VDIS
	resourcemgr->minfo.dvaddr_dis = resourcemgr->minfo.dvaddr + offset;
	resourcemgr->minfo.kvaddr_dis = resourcemgr->minfo.kvaddr + offset;
	offset += (SIZE_DIS_INTERNAL_BUF * NUM_DIS_INTERNAL_BUF);
#else
	resourcemgr->minfo.dvaddr_dis = 0;
	resourcemgr->minfo.kvaddr_dis = 0;
#endif

#ifdef ENABLE_DNR
	resourcemgr->minfo.dvaddr_3dnr = resourcemgr->minfo.dvaddr + offset;
	resourcemgr->minfo.kvaddr_3dnr = resourcemgr->minfo.kvaddr + offset;
	offset += (SIZE_DNR_INTERNAL_BUF * NUM_DNR_INTERNAL_BUF);
#else
	resourcemgr->minfo.dvaddr_3dnr = 0;
	resourcemgr->minfo.kvaddr_3dnr = 0;
#endif
#ifdef ENABLE_FD_SW
	for (num_buf = 0; num_buf < NUM_FD_INTERNAL_BUF; num_buf++) {
		resourcemgr->minfo.dvaddr_fd[num_buf] = resourcemgr->minfo.dvaddr + offset;
		resourcemgr->minfo.kvaddr_fd[num_buf] = resourcemgr->minfo.kvaddr + offset;
		offset += (SIZE_FD_INTERNEL_BUF);
	}
#else
	memset(&resourcemgr->minfo.dvaddr_fd, 0, sizeof(resourcemgr->minfo.dvaddr_fd));
	memset(&resourcemgr->minfo.kvaddr_fd, 0, sizeof(resourcemgr->minfo.dvaddr_fd));
#endif
#ifdef ENABLE_FD_DMA_INPUT
	for (fd_buf = 0; fd_buf < MAX_FD_SHOT_BUF; fd_buf++) {
		resourcemgr->minfo.dvaddr_fdshot[fd_buf] = resourcemgr->minfo.dvaddr + offset;
		resourcemgr->minfo.kvaddr_fdshot[fd_buf] = resourcemgr->minfo.kvaddr + offset;
		offset += (SIZE_FD_SHOT_BUF);
	}
#endif
	dbg_core("fimc_is_init_mem done\n");

p_err:
	return ret;
}