uint32_t
TargetNVC0::getSVAddress(DataFile shaderFile, const Symbol *sym) const
{
const int idx = sym->reg.data.sv.index;
const SVSemantic sv = sym->reg.data.sv.sv;
const bool isInput = shaderFile == FILE_SHADER_INPUT;
const bool kepler = getChipset() >= NVISA_GK104_CHIPSET;
switch (sv) {
case SV_POSITION: return 0x070 + idx * 4;
case SV_INSTANCE_ID: return 0x2f8;
case SV_VERTEX_ID: return 0x2fc;
case SV_PRIMITIVE_ID: return isInput ? 0x060 : 0x040;
case SV_LAYER: return 0x064;
case SV_VIEWPORT_INDEX: return 0x068;
case SV_POINT_SIZE: return 0x06c;
case SV_CLIP_DISTANCE: return 0x2c0 + idx * 4;
case SV_POINT_COORD: return 0x2e0 + idx * 4;
case SV_FACE: return 0x3fc;
case SV_TESS_FACTOR: return 0x000 + idx * 4;
case SV_TESS_COORD: return 0x2f0 + idx * 4;
case SV_NTID: return kepler ? (0x00 + idx * 4) : ~0;
case SV_NCTAID: return kepler ? (0x0c + idx * 4) : ~0;
case SV_GRIDID: return kepler ? 0x18 : ~0;
default:
return 0xffffffff;
}
}
bool
TargetNVC0::isAccessSupported(DataFile file, DataType ty) const
{
if (ty == TYPE_NONE)
return false;
if (file == FILE_MEMORY_CONST) {
if (getChipset() >= NVISA_GM107_CHIPSET)
return typeSizeof(ty) <= 4;
else
if (getChipset() >= NVISA_GK104_CHIPSET) // wrong encoding ?
return typeSizeof(ty) <= 8;
}
if (ty == TYPE_B96)
return false;
return true;
}
bool
TargetNVC0::isAccessSupported(DataFile file, DataType ty) const
{
if (ty == TYPE_NONE)
return false;
if (file == FILE_MEMORY_CONST && getChipset() >= 0xe0) // wrong encoding ?
return typeSizeof(ty) <= 8;
if (ty == TYPE_B96)
return (file == FILE_SHADER_INPUT) || (file == FILE_SHADER_OUTPUT);
return true;
}
bool TargetNVC0::canDualIssue(const Instruction *a, const Instruction *b) const
{
const OpClass clA = operationClass[a->op];
const OpClass clB = operationClass[b->op];
if (getChipset() >= 0xe4) {
// not texturing
// not if the 2nd instruction isn't necessarily executed
if (clA == OPCLASS_TEXTURE || clA == OPCLASS_FLOW)
return false;
// Check that a and b don't write to the same sources, nor that b reads
// anything that a writes.
if (!a->canCommuteDefDef(b) || !a->canCommuteDefSrc(b))
return false;
// anything with MOV
if (a->op == OP_MOV || b->op == OP_MOV)
return true;
if (clA == clB) {
switch (clA) {
// there might be more
case OPCLASS_COMPARE:
if ((a->op == OP_MIN || a->op == OP_MAX) &&
(b->op == OP_MIN || b->op == OP_MAX))
break;
return false;
case OPCLASS_ARITH:
break;
default:
return false;
}
// only F32 arith or integer additions
return (a->dType == TYPE_F32 || a->op == OP_ADD ||
b->dType == TYPE_F32 || b->op == OP_ADD);
}
// nothing with TEXBAR
if (a->op == OP_TEXBAR || b->op == OP_TEXBAR)
return false;
// no loads and stores accessing the same space
if ((clA == OPCLASS_LOAD && clB == OPCLASS_STORE) ||
(clB == OPCLASS_LOAD && clA == OPCLASS_STORE))
if (a->src(0).getFile() == b->src(0).getFile())
return false;
// no > 32-bit ops
if (typeSizeof(a->dType) > 4 || typeSizeof(b->dType) > 4 ||
typeSizeof(a->sType) > 4 || typeSizeof(b->sType) > 4)
return false;
return true;
} else {
return false; // info not needed (yet)
}
}
bool TargetNVC0::canDualIssue(const Instruction *a, const Instruction *b) const
{
const OpClass clA = operationClass[a->op];
const OpClass clB = operationClass[b->op];
if (getChipset() >= 0xe4) {
// not texturing
// not if the 2nd instruction isn't necessarily executed
if (clA == OPCLASS_TEXTURE || clA == OPCLASS_FLOW)
return false;
// anything with MOV
if (a->op == OP_MOV || b->op == OP_MOV)
return true;
if (clA == clB) {
// only F32 arith or integer additions
if (clA != OPCLASS_ARITH)
return false;
return (a->dType == TYPE_F32 || a->op == OP_ADD ||
b->dType == TYPE_F32 || b->op == OP_ADD);
}
// nothing with TEXBAR
if (a->op == OP_TEXBAR || b->op == OP_TEXBAR)
return false;
// no loads and stores accessing the the same space
if ((clA == OPCLASS_LOAD && clB == OPCLASS_STORE) ||
(clB == OPCLASS_LOAD && clA == OPCLASS_STORE))
if (a->src(0).getFile() == b->src(0).getFile())
return false;
// no > 32-bit ops
if (typeSizeof(a->dType) > 4 || typeSizeof(b->dType) > 4 ||
typeSizeof(a->sType) > 4 || typeSizeof(b->sType) > 4)
return false;
return true;
} else {
return false; // info not needed (yet)
}
}
vBiosMap * openVbios(chipsetType forcedChipset)
{
uint32_t z;
vBiosMap * map = NEW(vBiosMap);
for(z = 0; z < sizeof(vBiosMap); z++)
((char*)map)[z] = 0;
/*
* Determine chipset
*/
if (forcedChipset == CT_UNKWN)
{
map->chipsetId = getChipsetId();
map->chipset = getChipset(map->chipsetId);
PRINT("Chipset is %s (pci id 0x%x)\n",chipsetTypeNames[map->chipset], map->chipsetId);
}
else if (forcedChipset != CT_UNKWN)
{
map->chipset = forcedChipset;
}
else
{
map->chipset = CT_915GM;
}
/*
* Map the video bios to memory
*/
map->biosPtr=(uint8_t*)VBIOS_START;
/*
* Common initialisation
*/
// map->hasSwitched = false;
/*
* check if we have ATI Radeon and open atombios
*/
atiBiosTables atiTables;
atiTables.base = map->biosPtr;
atiTables.atomRomHeader = (atomRomHeader *) (map->biosPtr + *(uint16_t *) (map->biosPtr + OFFSET_TO_POINTER_TO_ATOM_ROM_HEADER));
if (strcmp ((char *) atiTables.atomRomHeader->firmWareSignature, "ATOM") == 0)
{
map->bios = BT_ATI_1;
PRINT("We have an AtomBios Card\n");
return openAtiVbios(map, atiTables);
}
/*
* check if we have NVidia
*/
if (map->bios != BT_ATI_1)
{
int i = 0;
while (i < 512) // we don't need to look through the whole bios, just the first 512 bytes
{
if ((map->biosPtr[i] == 'N')
&& (map->biosPtr[i+1] == 'V')
&& (map->biosPtr[i+2] == 'I')
&& (map->biosPtr[i+3] == 'D'))
{
map->bios = BT_NVDA;
PRINT("We have an NVIDIA Card\n");
return openNvidiaVbios(map);
break;
}
i++;
}
}
/*
* check if we have Intel
*/
if ((map->bios != BT_ATI_1) && (map->bios != BT_NVDA))
{
int i = 0;
while (i < VBIOS_SIZE)
{
if ((map->biosPtr[i] == 'I')
&& (map->biosPtr[i+1] == 'n')
&& (map->biosPtr[i+2] == 't')
&& (map->biosPtr[i+3] == 'e')
&& (map->biosPtr[i+4] == 'l'))
{
map->bios = BT_1;
PRINT("We have an Intel Card\n");
saveVbios(map);
return openIntelVbios(map);
break;
}
i++;
}
}
/*
* Unidentified Chipset
*/
if ( (map->chipset == CT_UNKWN) || ((map->bios != BT_ATI_1) && (map->bios != BT_NVDA) && (map->bios != BT_1)) )
{
PRINT("Unknown chipset type and unrecognized bios.\n");
PRINT("autoresolution only works with Intel 800/900 series graphic chipsets.\n"); //Azi:autoresolution
PRINT("Chipset Id: %x\n", map->chipsetId);
closeVbios(map);
return 0;
}
/*
* Should never get there
*/
return 0;
}