Exemplo n.º 1
0
int main (void)
{
    vInitPipe();
    gpio_int_init(gpio_handler);
    app_timer_init();

    app_timer_create(m_one_second_timer, APP_TIMER_MODE_SINGLE_SHOT, timeout_handler);

    while(true){
        vDispathTask();
    }

}
void __init ssa_init_irq (void)
{
   writel (0xFFFFFFFF, VA_INTC_MASK);

   /* set all on-chip int sources to active high polarity */
   writel (INTC_BIT_ATU          |
           INTC_BIT_CDB          |
           INTC_BIT_CT0          |
           INTC_BIT_CT1          |
           INTC_BIT_GPIO_IRQ     |
           INTC_BIT_IIC_MASTER   |
           INTC_BIT_IIC_SLAVE    |
           INTC_BIT_WAKEUP       |
           INTC_BIT_GPIO_FIQ     |
           INTC_BIT_UART0,
           VA_INTC_POLARITY);

   writel (0xFFFFFFFF, VA_INTC_CLEAR);

   memset (irq_desc, 0, sizeof(irq_desc[0]) * NR_IRQS);

   irq_desc[INT_CT0].valid    = 1;
   irq_desc[INT_CT0].mask_ack = mask_irq_CT0;
   irq_desc[INT_CT0].mask     = mask_irq_CT0;
   irq_desc[INT_CT0].unmask   = unmask_irq_CT0;

   irq_desc[INT_CT1].valid    = 1;
   irq_desc[INT_CT1].mask_ack = mask_irq_CT1;
   irq_desc[INT_CT1].mask     = mask_irq_CT1;
   irq_desc[INT_CT1].unmask   = unmask_irq_CT1;

   irq_desc[INT_UART0].valid    = 1;
   irq_desc[INT_UART0].mask_ack = mask_irq_UART0;
   irq_desc[INT_UART0].mask     = mask_irq_UART0;
   irq_desc[INT_UART0].unmask   = unmask_irq_UART0;

   irq_desc[INT_ATA].valid    = 1;
   irq_desc[INT_ATA].mask_ack = mask_irq_ATA;
   irq_desc[INT_ATA].mask     = mask_irq_ATA;
   irq_desc[INT_ATA].unmask   = unmask_irq_ATA;

   irq_desc[INT_PCMCIA].valid    = 1;
   irq_desc[INT_PCMCIA].mask_ack = mask_irq_PCMCIA;
   irq_desc[INT_PCMCIA].mask     = mask_irq_PCMCIA;
   irq_desc[INT_PCMCIA].unmask   = unmask_irq_PCMCIA;

   irq_desc[INT_USBH].valid    = 1;
   irq_desc[INT_USBH].mask_ack = mask_irq_USBH;
   irq_desc[INT_USBH].mask     = mask_irq_USBH;
   irq_desc[INT_USBH].unmask   = unmask_irq_USBH;

   irq_desc[INT_ATU].valid    = 1;
   irq_desc[INT_ATU].mask_ack = mask_irq_ATU;
   irq_desc[INT_ATU].mask     = mask_irq_ATU;
   irq_desc[INT_ATU].unmask   = unmask_irq_ATU;

   irq_desc[INT_ETHERNET].valid    = 1;
   irq_desc[INT_ETHERNET].mask_ack = mask_irq_ETHERNET;
   irq_desc[INT_ETHERNET].mask     = mask_irq_ETHERNET;
   irq_desc[INT_ETHERNET].unmask   = unmask_irq_ETHERNET;

   irq_desc[INT_IIC_MASTER].valid    = 1;
   irq_desc[INT_IIC_MASTER].mask_ack = mask_irq_IIC_MASTER;
   irq_desc[INT_IIC_MASTER].mask     = mask_irq_IIC_MASTER;
   irq_desc[INT_IIC_MASTER].unmask   = unmask_irq_IIC_MASTER;

   irq_desc[INT_IIC_SLAVE].valid    = 1;
   irq_desc[INT_IIC_SLAVE].mask_ack = mask_irq_IIC_SLAVE;
   irq_desc[INT_IIC_SLAVE].mask     = mask_irq_IIC_SLAVE;
   irq_desc[INT_IIC_SLAVE].unmask   = unmask_irq_IIC_SLAVE;

   irq_desc[INT_ISP1581].valid    = 1;
   irq_desc[INT_ISP1581].mask_ack = mask_irq_ISP1581;
   irq_desc[INT_ISP1581].mask     = mask_irq_ISP1581;
   irq_desc[INT_ISP1581].unmask   = unmask_irq_ISP1581;

   irq_desc[INT_DPRAM].valid    = 1;
   irq_desc[INT_DPRAM].mask_ack = mask_irq_DPRAM;
   irq_desc[INT_DPRAM].mask     = mask_irq_DPRAM;
   irq_desc[INT_DPRAM].unmask   = unmask_irq_DPRAM;

   irq_desc[INT_KTIMER].valid    = 1;
   irq_desc[INT_KTIMER].mask_ack = mask_irq_KTIMER;
   irq_desc[INT_KTIMER].mask     = mask_irq_KTIMER;
   irq_desc[INT_KTIMER].unmask   = unmask_irq_KTIMER;

   gpio_int_init();

   gpio_int_set_type (GPIO_ETHERNET_INTRQ, GPIO_LEVEL_TIGGERED_ACTIVE_HIGH);
   gpio_int_set_type (GPIO_PCMCIA_INTRQ, GPIO_LEVEL_TIGGERED_ACTIVE_LOW);
   gpio_int_set_type (GPIO_EPLD_INTRQ, GPIO_LEVEL_TIGGERED_ACTIVE_HIGH);

   gpio_int_enable (GPIO_EPLD_INTRQ);

   /* it should be safe to only use the GPIO int controller manage gpio ints from here on... */
   intc_int_enable (INTC_BIT_GPIO_IRQ);

// ssa_dump_irq_regs ();
}