uint8_t hal_nrf_get_rx_data_source(void) { return ((hal_nrf_nop() & (BIT_3|BIT_2|BIT_1)) >> 1); }
__interrupt void HAL_NRF_ISR(void) { u8 status, len, i; if(!IRQ) { /** */ // Read and clear IRQ flags from radio status = hal_nrf_nop(); // if(hal_nrf_ack_flag){ // if((status&0x60) == 0x60){ // hal_nrf_ack_flag = 0; // }else{ // read_flash_buf(slave_cmd, slave_cmd_request, CMD_LENGTH); // hal_nrf_write_ack_payload(0, slave_cmd, CMD_LENGTH); // } // } #ifdef SLAVE_DEBUG hal_nrf_irq_flag = status; #endif if(status & (1<< (uint8_t)HAL_NRF_RX_DR)){ do{ len = hal_nrf_read_rx_payload_width(); if(len > 32){ hal_nrf_write_reg (STATUS, (1<< (uint8_t)HAL_NRF_RX_DR)); hal_nrf_rx_sta = HAL_NRF_RX_STA_COM_ERROR; return; } if((hal_nrf_rx_cnt + len + 1) < HAL_NRF_RX_BUF_LEN){ hal_nrf_rx_buf[hal_nrf_rx_wr_index] = len; hal_nrf_rx_wr_index++; if(hal_nrf_rx_wr_index == HAL_NRF_RX_BUF_LEN){ hal_nrf_rx_wr_index=0; } // hal_nrf_read_payload((u8*)hal_nrf_rx_buf[hal_nrf_rx_wr_index].buf, len); CSN_LOW(); HAL_NRF_HW_SPI_WRITE(R_RX_PAYLOAD); while(HAL_NRF_HW_SPI_BUSY) {} HAL_NRF_HW_SPI_READ(); for(i=0; i<len; i++){ HAL_NRF_HW_SPI_WRITE(0U); while(HAL_NRF_HW_SPI_BUSY){} hal_nrf_rx_buf[hal_nrf_rx_wr_index] = HAL_NRF_HW_SPI_READ(); hal_nrf_rx_wr_index++; if(hal_nrf_rx_wr_index == HAL_NRF_RX_BUF_LEN){ hal_nrf_rx_wr_index=0; } } CSN_HIGH(); hal_nrf_rx_cnt = hal_nrf_rx_cnt+len+1; }else{ hal_nrf_flush_rx(); hal_nrf_rx_sta = HAL_NRF_RX_STA_BUF_OVF; /** clear RX_DR */ hal_nrf_write_reg (STATUS, (1<< (uint8_t)HAL_NRF_RX_DR)); break; } /** clear RX_DR */ hal_nrf_write_reg (STATUS, (1<< (uint8_t)HAL_NRF_RX_DR)); }while(!hal_nrf_rx_fifo_empty()); } if(status & (1 << (uint8_t)HAL_NRF_TX_DS)){ hal_nrf_write_reg (STATUS, (1<< (uint8_t)HAL_NRF_TX_DS)); switch(hal_nrf_sta){ case HAL_NRF_STA_TX: hal_nrf_tx_cmd_flag = 0; if(hal_nrf_tx_cnt){ hal_nrf_tx_busy = 1; len = hal_nrf_tx_buf[hal_nrf_tx_rd_index]; hal_nrf_tx_rd_index++; if(hal_nrf_tx_rd_index == HAL_NRF_TX_BUF_LEN){ hal_nrf_tx_rd_index = 0; } hal_nrf_tx_cnt = hal_nrf_tx_cnt-len-1; // hal_nrf_write_tx_payload(hal_nrf_tx_buf_tmp, len); CSN_LOW(); HAL_NRF_HW_SPI_WRITE(W_TX_PAYLOAD); while(HAL_NRF_HW_SPI_BUSY) {} HAL_NRF_HW_SPI_READ(); for(i=0; i<len; i++){ HAL_NRF_HW_SPI_WRITE(hal_nrf_tx_buf[hal_nrf_tx_rd_index]); hal_nrf_tx_rd_index++; if(hal_nrf_tx_rd_index == HAL_NRF_TX_BUF_LEN){ hal_nrf_tx_rd_index = 0; } while(HAL_NRF_HW_SPI_BUSY) {} /* wait for byte transfer finished */ HAL_NRF_HW_SPI_READ(); } CSN_HIGH(); // CE_HIGH(); // T2_START(); t2_start_delay(); }else{ if(hal_nrf_tx_sta == HAL_NRF_TX_STA_IDLE){ /** send end pkt */ hal_nrf_tx_sta = HAL_NRF_TX_STA_DONE; read_flash_buf(slave_cmd, slave_cmd_end, CMD_LENGTH); hal_nrf_write_tx_payload(slave_cmd, CMD_LENGTH); hal_nrf_tx_cmd_flag = 2; // CE_HIGH(); // T2_START(); t2_start_delay(); }else{ hal_nrf_tx_sta = HAL_NRF_TX_STA_IDLE; hal_nrf_sta = HAL_NRF_STA_RX; CE_LOW(); hal_nrf_flush_tx(); hal_nrf_flush_rx(); /** return to RX mode */ hal_nrf_set_operation_mode(HAL_NRF_PRX); CE_HIGH(); hal_nrf_tx_busy = 0; } } break; case HAL_NRF_STA_RX: /** ack payload send */ break; case HAL_NRF_STA_TX_CMD: hal_nrf_sta = HAL_NRF_STA_RX; CE_LOW(); hal_nrf_flush_tx(); hal_nrf_flush_rx(); /** return to RX mode */ hal_nrf_set_operation_mode(HAL_NRF_PRX); CE_HIGH(); hal_nrf_tx_busy = 0; hal_nrf_tx_cmd_flag = 0; break; } } if(status & (1 << (uint8_t)HAL_NRF_MAX_RT)){ #if 0 // When a MAX_RT interrupt occurs the TX payload will not be removed from the TX FIFO. // If the packet is to be discarded this must be done manually by flushing the TX FIFO. // Alternatively, CE_PULSE() can be called re-starting transmission of the payload. // (Will only be possible after the radio irq flags are cleared) hal_nrf_flush_tx(); hal_nrf_flush_rx(); hal_nrf_set_operation_mode(HAL_NRF_PRX); CE_HIGH(); hal_nrf_sta=HAL_NRF_STA_RX; /** discard all data in buffer */ hal_nrf_tx_busy = 0; hal_nrf_tx_cnt = 0; hal_nrf_tx_rd_index =0; hal_nrf_tx_wr_index = 0; // hal_nrf_flush_rx(); // hal_nrf_rx_cnt = 0; // hal_nrf_rx_rd_index =0; // hal_nrf_rx_wr_index = 0; /** set timeout flag */ hal_nrf_timeout = 1; hal_nrf_write_reg (STATUS, (1<< (uint8_t)HAL_NRF_MAX_RT)); #else hal_nrf_write_reg (STATUS, (1<< (uint8_t)HAL_NRF_MAX_RT)); switch(hal_nrf_sta){ case HAL_NRF_STA_TX: hal_nrf_tx_cmd_flag = 0; if(hal_nrf_tx_cnt){ hal_nrf_tx_busy = 1; len = hal_nrf_tx_buf[hal_nrf_tx_rd_index]; hal_nrf_tx_rd_index++; if(hal_nrf_tx_rd_index == HAL_NRF_TX_BUF_LEN){ hal_nrf_tx_rd_index = 0; } hal_nrf_tx_cnt = hal_nrf_tx_cnt-len-1; // hal_nrf_write_tx_payload(hal_nrf_tx_buf_tmp, len); CSN_LOW(); HAL_NRF_HW_SPI_WRITE(W_TX_PAYLOAD); while(HAL_NRF_HW_SPI_BUSY) {} HAL_NRF_HW_SPI_READ(); for(i=0; i<len; i++){ HAL_NRF_HW_SPI_WRITE(hal_nrf_tx_buf[hal_nrf_tx_rd_index]); hal_nrf_tx_rd_index++; if(hal_nrf_tx_rd_index == HAL_NRF_TX_BUF_LEN){ hal_nrf_tx_rd_index = 0; } while(HAL_NRF_HW_SPI_BUSY) {} /* wait for byte transfer finished */ HAL_NRF_HW_SPI_READ(); } CSN_HIGH(); // CE_HIGH(); // T2_START(); t2_start_delay(); }else{ if(hal_nrf_tx_sta == HAL_NRF_TX_STA_IDLE){ /** send end pkt */ hal_nrf_tx_sta = HAL_NRF_TX_STA_DONE; read_flash_buf(slave_cmd, slave_cmd_end, CMD_LENGTH); hal_nrf_write_tx_payload(slave_cmd, CMD_LENGTH); hal_nrf_tx_cmd_flag = 2; // CE_HIGH(); // T2_START(); t2_start_delay(); }else{ hal_nrf_tx_sta = HAL_NRF_TX_STA_IDLE; hal_nrf_sta = HAL_NRF_STA_RX; CE_LOW(); hal_nrf_flush_tx(); hal_nrf_flush_rx(); /** return to RX mode */ hal_nrf_set_operation_mode(HAL_NRF_PRX); CE_HIGH(); hal_nrf_tx_busy = 0; } } break; case HAL_NRF_STA_RX: /** ack payload send */ break; case HAL_NRF_STA_TX_CMD: hal_nrf_sta = HAL_NRF_STA_RX; CE_LOW(); hal_nrf_flush_tx(); hal_nrf_flush_rx(); /** return to RX mode */ hal_nrf_set_operation_mode(HAL_NRF_PRX); CE_HIGH(); hal_nrf_tx_busy = 0; hal_nrf_tx_cmd_flag = 0; break; } #endif } } }
uint8_t hal_nrf_get_irq_flags(void) { return hal_nrf_nop() & (BIT_6|BIT_5|BIT_4); }