static int hdpvr_transfer(struct i2c_adapter *i2c_adapter, struct i2c_msg *msgs,
int num)
{
struct hdpvr_device *dev = i2c_get_adapdata(i2c_adapter);
int retval = 0, addr;
if (num <= 0)
return 0;
mutex_lock(&dev->i2c_mutex);
addr = msgs[0].addr << 1;
if (num == 1) {
if (msgs[0].flags & I2C_M_RD)
retval = hdpvr_i2c_read(dev, 1, addr, NULL, 0,
msgs[0].buf, msgs[0].len);
else
retval = hdpvr_i2c_write(dev, 1, addr, msgs[0].buf,
msgs[0].len);
} else if (num == 2) {
if (msgs[0].addr != msgs[1].addr) {
v4l2_warn(&dev->v4l2_dev, "refusing 2-phase i2c xfer "
"with conflicting target addresses\n");
retval = -EINVAL;
goto out;
}
if ((msgs[0].flags & I2C_M_RD) || !(msgs[1].flags & I2C_M_RD)) {
v4l2_warn(&dev->v4l2_dev, "refusing complex xfer with "
"r0=%d, r1=%d\n", msgs[0].flags & I2C_M_RD,
msgs[1].flags & I2C_M_RD);
retval = -EINVAL;
goto out;
}
/*
* Write followed by atomic read is the only complex xfer that
* we actually support here.
*/
retval = hdpvr_i2c_read(dev, 1, addr, msgs[0].buf, msgs[0].len,
msgs[1].buf, msgs[1].len);
} else {
v4l2_warn(&dev->v4l2_dev, "refusing %d-phase i2c xfer\n", num);
}
out:
mutex_unlock(&dev->i2c_mutex);
return retval ? retval : num;
}
static int hdpvr_transfer(struct i2c_adapter *i2c_adapter, struct i2c_msg *msgs,
int num)
{
struct hdpvr_device *dev = i2c_get_adapdata(i2c_adapter);
int retval = 0, i, addr;
if (num <= 0)
return 0;
mutex_lock(&dev->i2c_mutex);
for (i = 0; i < num && !retval; i++) {
addr = msgs[i].addr << 1;
if (msgs[i].flags & I2C_M_RD)
retval = hdpvr_i2c_read(dev, 1, addr, msgs[i].buf,
msgs[i].len);
else
retval = hdpvr_i2c_write(dev, 1, addr, msgs[i].buf,
msgs[i].len);
}
mutex_unlock(&dev->i2c_mutex);
return retval ? retval : num;
}
static int hdpvr_activate_ir(struct hdpvr_device *dev)
{
char buffer[2];
mutex_lock(&dev->i2c_mutex);
hdpvr_i2c_read(dev, 0, 0x54, NULL, 0, buffer, 1);
buffer[0] = 0;
buffer[1] = 0x8;
hdpvr_i2c_write(dev, 1, 0x54, buffer, 2);
buffer[1] = 0x18;
hdpvr_i2c_write(dev, 1, 0x54, buffer, 2);
mutex_unlock(&dev->i2c_mutex);
return 0;
}