void mcu_init(void) {
mcu_arch_init();
#ifdef PERIPHERALS_AUTO_INIT
sys_time_init();
#ifdef USE_LED
led_init();
#endif
/* for now this means using spektrum */
#if defined RADIO_CONTROL & defined RADIO_CONTROL_SPEKTRUM_PRIMARY_PORT & defined RADIO_CONTROL_BIND_IMPL_FUNC
RADIO_CONTROL_BIND_IMPL_FUNC();
#endif
#ifdef USE_UART0
uart0_init();
#endif
#ifdef USE_UART1
uart1_init();
#endif
#ifdef USE_UART2
uart2_init();
#endif
#ifdef USE_UART3
uart3_init();
#endif
#ifdef USE_UART4
uart4_init();
#endif
#ifdef USE_UART5
uart5_init();
#endif
#ifdef USE_I2C0
i2c0_init();
#endif
#ifdef USE_I2C1
i2c1_init();
#endif
#ifdef USE_I2C2
i2c2_init();
#endif
#ifdef USE_ADC
adc_init();
#endif
#ifdef USE_USB_SERIAL
VCOM_init();
#endif
#if USE_SPI
#if SPI_MASTER
#if USE_SPI0
spi0_init();
#endif
#if USE_SPI1
spi1_init();
#endif
#if USE_SPI2
spi2_init();
#endif
spi_init_slaves();
#endif // SPI_MASTER
#if SPI_SLAVE
#if USE_SPI0_SLAVE
spi0_slave_init();
#endif
#if USE_SPI1_SLAVE
spi1_slave_init();
#endif
#if USE_SPI2_SLAVE
spi2_slave_init();
#endif
#endif // SPI_SLAVE
#endif // USE_SPI
#ifdef USE_DAC
dac_init();
#endif
#endif /* PERIPHERALS_AUTO_INIT */
}
void init_ap( void ) {
#ifndef SINGLE_MCU /** init done in main_fbw in single MCU */
hw_init();
sys_time_init();
#ifdef LED
led_init();
#endif
#ifdef ADC
adc_init();
#endif
#endif /* SINGLE_MCU */
/************* Sensors initialization ***************/
#ifdef USE_INFRARED
ir_init();
#endif
#ifdef USE_GYRO
gyro_init();
#endif
#ifdef USE_GPS
gps_init();
#endif
#ifdef USE_UART0
Uart0Init();
#endif
#ifdef USE_UART1
Uart1Init();
#endif
#ifdef USE_UART2
Uart2Init();
#endif
#ifdef USE_UART3
Uart3Init();
#endif
#ifdef USE_USB_SERIAL
VCOM_init();
#endif
#ifdef USE_GPIO
GpioInit();
#endif
#ifdef USE_I2C0
i2c0_init();
#endif
#ifdef USE_I2C1
i2c1_init();
#endif
#ifdef USE_I2C2
i2c2_init();
#endif
/************* Links initialization ***************/
#if defined USE_SPI
spi_init();
#endif
#if defined MCU_SPI_LINK
link_mcu_init();
#endif
#ifdef MODEM
modem_init();
#endif
/************ Internal status ***************/
h_ctl_init();
v_ctl_init();
estimator_init();
#ifdef ALT_KALMAN
alt_kalman_init();
#endif
nav_init();
modules_init();
/** - start interrupt task */
int_enable();
/** wait 0.5s (historical :-) */
sys_time_usleep(500000);
#if defined GPS_CONFIGURE
gps_configure_uart();
#endif
#if defined DATALINK
#if DATALINK == XBEE
xbee_init();
#endif
#endif /* DATALINK */
#if defined AEROCOMM_DATA_PIN
IO0DIR |= _BV(AEROCOMM_DATA_PIN);
IO0SET = _BV(AEROCOMM_DATA_PIN);
#endif
power_switch = FALSE;
/************ Multi-uavs status ***************/
#ifdef TRAFFIC_INFO
traffic_info_init();
#endif
}
int main(void)
{
DBG_LED_ENA;
DBG_1_ENA;
DBG_1_OFF;
DBG_2_ENA;
DBG_2_OFF;
DBG_3_ENA;
DBG_3_OFF;
debug_code_init();
CLK_init();
ADC0_init();
SR_EXP_Init();
#ifdef RGB_MATRIX_ENABLE
i2c1_init();
#endif // RGB_MATRIX_ENABLE
matrix_init();
USB2422_init();
DBGC(DC_MAIN_UDC_START_BEGIN);
udc_start();
DBGC(DC_MAIN_UDC_START_COMPLETE);
DBGC(DC_MAIN_CDC_INIT_BEGIN);
CDC_init();
DBGC(DC_MAIN_CDC_INIT_COMPLETE);
while (USB2422_Port_Detect_Init() == 0) {}
DBG_LED_OFF;
#ifdef RGB_MATRIX_ENABLE
while (I2C3733_Init_Control() != 1) {}
while (I2C3733_Init_Drivers() != 1) {}
I2C_DMAC_LED_Init();
i2c_led_q_init();
for (uint8_t drvid = 0; drvid < ISSI3733_DRIVER_COUNT; drvid++)
I2C_LED_Q_ONOFF(drvid); //Queue data
#endif // RGB_MATRIX_ENABLE
keyboard_setup();
keyboard_init();
host_set_driver(&arm_atsam_driver);
#ifdef CONSOLE_ENABLE
uint64_t next_print = 0;
#endif //CONSOLE_ENABLE
v_5v_avg = adc_get(ADC_5V);
debug_code_disable();
while (1)
{
main_subtasks(); //Note these tasks will also be run while waiting for USB keyboard polling intervals
if (g_usb_state == USB_FSMSTATUS_FSMSTATE_SUSPEND_Val || g_usb_state == USB_FSMSTATUS_FSMSTATE_SLEEP_Val)
{
if (suspend_wakeup_condition())
{
udc_remotewakeup(); //Send remote wakeup signal
wait_ms(50);
}
continue;
}
keyboard_task();
#ifdef CONSOLE_ENABLE
if (timer_read64() > next_print)
{
next_print = timer_read64() + 250;
//Add any debug information here that you want to see very often
//dprintf("5v=%u 5vu=%u dlow=%u dhi=%u gca=%u gcd=%u\r\n", v_5v, v_5v_avg, v_5v_avg - V5_LOW, v_5v_avg - V5_HIGH, gcr_actual, gcr_desired);
}
#endif //CONSOLE_ENABLE
}
return 1;
}
/*
Configure PLL1 to min speed (48MHz) => see cpu_clock_pll1_low_speed() .
Configure PLL0USB @480MHz for USB0.
Note: PLL1 clock is used by M4/M0 core, Peripheral, APB1, APB3.
*/
void sys_clock_init(const airspy_sys_clock_t* const pt_airspy_sys_conf)
{
/* After boot the CPU runs at 96 MHz */
/* cpu runs from: IRC (12MHz) >> PLL M = 24, FCCO @ 288 MHz direct mode >> IDIVC = 4 >> 96 MHz */
/*
* 12MHz clock is entering LPC XTAL1/OSC input now.
*/
/* set xtal oscillator to low frequency mode */
CGU_XTAL_OSC_CTRL &= ~CGU_XTAL_OSC_CTRL_HF;
/* power on the oscillator and wait until stable */
CGU_XTAL_OSC_CTRL &= ~CGU_XTAL_OSC_CTRL_ENABLE;
/* Wait at least 250us after Crystal Power ON (Wait for crystal to stabilize)
defined in User Manual 10503.pdf Rev1.8 See Fig 30. BASE_M4_CLK ramp-up procedure
*/
delay(WAIT_CPU_CLOCK_INIT_DELAY);
/* Use CGU_SRC_XTAL as clock source for BASE_M4_CLK (CPU) */
CGU_BASE_M4_CLK = (CGU_BASE_M4_CLK_CLK_SEL(CGU_SRC_XTAL) | CGU_BASE_M4_CLK_AUTOBLOCK);
/* Use CGU_SRC_XTAL as clock source for Peripheral */
CGU_BASE_PERIPH_CLK = CGU_BASE_PERIPH_CLK_AUTOBLOCK
| CGU_BASE_PERIPH_CLK_CLK_SEL(CGU_SRC_XTAL);
/* Use CGU_SRC_XTAL as clock source for APB1 */
CGU_BASE_APB1_CLK = CGU_BASE_APB1_CLK_AUTOBLOCK
| CGU_BASE_APB1_CLK_CLK_SEL(CGU_SRC_XTAL);
/* Use CGU_SRC_XTAL as clock source for APB3 */
CGU_BASE_APB3_CLK = CGU_BASE_APB3_CLK_AUTOBLOCK
| CGU_BASE_APB3_CLK_CLK_SEL(CGU_SRC_XTAL);
/* ********************** */
/* SI5351c configuration */
/* ********************** */
/*
* xxMHz clock is entering LPC GP_CLKIN (from SI5351C) input now.
* AirSpy clocks:
* CLK0 -> R820T xxMHz (XTAL_I)
* CLK1 -> LPC4370 RTC 32KHz
* CLK2 -> SGPIO Clock (not used for future)
* CLK3 -> NC
* CLK4 -> NC
* CLK5 -> NC
* CLK6 -> NC
* CLK7 -> LPC4370 Main Clock xxMHz.
*/
/* Configure I2C0 (for SI5351C) to about 375kHz (12MHz/(2*16)=0.375MHz) when we switch over to APB1 clock = 12MHz */
i2c0_init(16);
si5351c_disable_oeb_pin_control();
/* Programming the Si5351 via I2C http://community.silabs.com/t5/Silicon-Labs-Knowledge-Base/Programming-the-Si5351-via-I2C/ta-p/112251
*/
si5351c_disable_all_outputs();
si5351c_init_fanout();
si5351c_power_down_all_clocks();
si5351c_init_xtal();
si5351c_read[0] = si5351c_read_single(0);
/* Configure and enable SI5351C clocks */
si5351c_read[1] = (si5351c_read_single(0) & SI5351C_REG0_CLKIN_LOS);
/* CLKIN Loss Of Signal (LOS) ? */
if(si5351c_read[1] == SI5351C_REG0_CLKIN_LOS)
si5351c_airspy_config(AIRSPY_SI5351C_CONFIG_XTAL);
else
si5351c_airspy_config(AIRSPY_SI5351C_CONFIG_CLKIN);
si5351c_read[2] = si5351c_read_single(0);
si5351c_init_pll_soft_reset();
si5351c_enable_clock_outputs();
/* Wait at least 300us after SI5351C Clock Enable */
delay(WAIT_CPU_CLOCK_INIT_DELAY);
si5351c_read[3] = si5351c_read_single(0);
/* ********************************************************************* */
/* M4/M0 core, Peripheral, APB1, APB3 Configuration (PLL1 clock source) */
/* ********************************************************************* */
/* Configure PLL1 with CGU_SRC_GP_CLKIN as source clock */
cpu_clock_pll1_low_speed(&pt_airspy_sys_conf->pll1_ls);
/* Configure I2C0 (for SI5351C) to 400kHz when we switch over to APB1 clock = PLL1 */
i2c0_init(AIRSPY_I2C0_PLL1_LS_HS_CONF_VAL);
/* Configure I2C1 (for R820T) to 400kHz when we switch over to APB3 clock = PLL1 */
i2c1_init(AIRSPY_I2C1_PLL1_LS_CONF_VAL);
/* ************************************************** */
/* Connect PLL1 to M4/M0 core, Peripheral, APB1, APB3 */
/* ************************************************** */
/* Use PLL1 as clock source for BASE_M4_CLK (CPU) */
CGU_BASE_M4_CLK = (CGU_BASE_M4_CLK_CLK_SEL(CGU_SRC_PLL1) | CGU_BASE_M4_CLK_AUTOBLOCK);
/* Switch peripheral clock over to use PLL1 */
CGU_BASE_PERIPH_CLK = CGU_BASE_PERIPH_CLK_AUTOBLOCK
| CGU_BASE_PERIPH_CLK_CLK_SEL(CGU_SRC_PLL1);
/* Switch APB1 clock over to use PLL1 */
CGU_BASE_APB1_CLK = CGU_BASE_APB1_CLK_AUTOBLOCK
| CGU_BASE_APB1_CLK_CLK_SEL(CGU_SRC_PLL1);
/* Switch APB3 clock over to use PLL1 */
CGU_BASE_APB3_CLK = CGU_BASE_APB3_CLK_AUTOBLOCK
| CGU_BASE_APB3_CLK_CLK_SEL(CGU_SRC_PLL1);
/* **************************************************** */
/* PLL0USB & USB0 Configuration (GP_CLKIN clock source) */
/* **************************************************** */
/* Use CGU_SRC_GP_CLKIN as clock source for PLL0USB */
CGU_PLL0USB_CTRL = CGU_PLL0USB_CTRL_PD
| CGU_PLL0USB_CTRL_AUTOBLOCK
| CGU_PLL0USB_CTRL_CLK_SEL(CGU_SRC_GP_CLKIN);
while (CGU_PLL0USB_STAT & CGU_PLL0USB_STAT_LOCK);
/* configure PLL0USB to produce 480 MHz clock from CGU_SRC_GP_CLKIN */
CGU_PLL0USB_MDIV = pt_airspy_sys_conf->pll0_usb_mdiv;
CGU_PLL0USB_NP_DIV = pt_airspy_sys_conf->pll0_usb_npdiv;
CGU_PLL0USB_CTRL |= (CGU_PLL0USB_CTRL_PD
| pt_airspy_sys_conf->pll0usb_ctrl_flags
| CGU_PLL0USB_CTRL_CLKEN);
/* Power on PLL0USB and wait until stable */
CGU_PLL0USB_CTRL &= ~CGU_PLL0USB_CTRL_PD;
while (!(CGU_PLL0USB_STAT & CGU_PLL0USB_STAT_LOCK));
/* Use PLL0USB as clock source for USB0 */
CGU_BASE_USB0_CLK = CGU_BASE_USB0_CLK_AUTOBLOCK
| CGU_BASE_USB0_CLK_CLK_SEL(CGU_SRC_PLL0USB);
/* ****************************************** */
/* Disable/PowerDown unused clock/peripherals */
/* ****************************************** */
CREG_CREG6 |= (1<<17); // PowerDown RNG
/* Disable XTAL because GP_CLKIN is used from SI5351C instead */
/* Switch off the oscillator */
CGU_XTAL_OSC_CTRL = CGU_XTAL_OSC_CTRL_ENABLE;
CGU_BASE_SAFE_CLK = CGU_BASE_USB1_CLK_PD;
// CGU_BASE_USB0_CLK is used for USB0 HS
// CGU_BASE_M0_CLK is used
/* Switch off USB1 clock */
CGU_BASE_USB1_CLK = CGU_BASE_USB1_CLK_PD;
// CGU_BASE_M4_CLK is used
CGU_BASE_SPIFI_CLK = CGU_BASE_SPIFI_CLK_PD;
/* Switch off SPI clock */
CGU_BASE_SPI_CLK = CGU_BASE_SPI_CLK_PD;
/* Switch off PHY RX & TX clock */
CGU_BASE_PHY_RX_CLK = CGU_BASE_PHY_RX_CLK_PD;
CGU_BASE_PHY_TX_CLK = CGU_BASE_PHY_TX_CLK_PD;
// CGU_BASE_APB1_CLK is used for I2C0
// CGU_BASE_APB3_CLK is used for I2C1
/* Switch off LCD clock */
CGU_BASE_LCD_CLK = CGU_BASE_LCD_CLK_PD;
// CGU_BASE_ADCHS_CLK is used
/* Switch off SDIO clock */
CGU_BASE_SDIO_CLK = CGU_BASE_SDIO_CLK_PD;
CGU_BASE_SSP0_CLK = CGU_BASE_SSP0_CLK_PD;
#ifdef AIRSPY_NOS
/* Switch off SSP1 clock */
CGU_BASE_SSP1_CLK = CGU_BASE_SSP1_CLK_PD;
#else /* AIRSPY One/Demo */
//CGU_BASE_SSP1_CLK is used for LED
#endif
/* Switch off UART0 to 3 clock */
CGU_BASE_UART0_CLK = CGU_BASE_UART0_CLK_PD;
CGU_BASE_UART1_CLK = CGU_BASE_UART1_CLK_PD;
CGU_BASE_UART2_CLK = CGU_BASE_UART2_CLK_PD;
CGU_BASE_UART3_CLK = CGU_BASE_UART3_CLK_PD;
/* Switch off OUT clocks */
CGU_BASE_OUT_CLK = CGU_BASE_OUT_CLK_PD;
/* Reserved/Undocumented clocks power down */
CGU_OUTCLK_21_CTRL = 1;
CGU_OUTCLK_22_CTRL = 1;
CGU_OUTCLK_23_CTRL = 1;
CGU_OUTCLK_24_CTRL = 1;
/* Switch off AUDIO clock */
CGU_BASE_APLL_CLK = CGU_BASE_APLL_CLK_PD;
CGU_BASE_CGU_OUT0_CLK = CGU_BASE_CGU_OUT0_CLK_PD;
CGU_BASE_CGU_OUT1_CLK = CGU_BASE_CGU_OUT1_CLK_PD;
/* Switch off IDIV C,D,E disabled */
CGU_IDIVC_CTRL = CGU_IDIVC_CTRL_PD;
CGU_IDIVD_CTRL = CGU_IDIVD_CTRL_PD;
CGU_IDIVE_CTRL = CGU_IDIVE_CTRL_PD;
/*
// Power down M4 branches, but not BUS, GPIO, CREG and M0 & M4 CORE clock
*/
//CCU1_CLK_M4_BUS_CFG &= ~(1);
CCU1_CLK_M4_SPIFI_CFG &= ~(1);
//CCU1_CLK_M4_GPIO_CFG &= ~(1);
CCU1_CLK_M4_LCD_CFG &= ~(1);
CCU1_CLK_M4_ETHERNET_CFG &= ~(1);
//CCU1_CLK_M4_USB0_CFG &= ~(1);
CCU1_CLK_M4_EMC_CFG &= ~(1);
CCU1_CLK_M4_SDIO_CFG &= ~(1);
//CCU1_CLK_M4_DMA_CFG &= ~(1);
//CCU1_CLK_M4_M4CORE_CFG &= ~(1);
CCU1_CLK_M4_SCT_CFG &= ~(1);
CCU1_CLK_M4_USB1_CFG &= ~(1);
CCU1_CLK_M4_EMCDIV_CFG &= ~(1);
//CCU1_CLK_M4_M0APP_CFG &= ~(1);
//CCU1_CLK_M4_VADC_CFG &= ~(1);
CCU1_CLK_M4_WWDT_CFG &= ~(1);
CCU1_CLK_M4_USART0_CFG &= ~(1);
CCU1_CLK_M4_UART1_CFG &= ~(1);
CCU1_CLK_M4_SSP0_CFG &= ~(1);
#ifdef AIRSPY_NOS
CCU1_CLK_M4_SSP1_CFG &= ~(1);
#else /* AIRSPY One/Demo */
//CCU1_CLK_M4_SSP1_CFG is used for LED
#endif
CCU1_CLK_M4_TIMER0_CFG &= ~(1);
CCU1_CLK_M4_TIMER1_CFG &= ~(1);
//CCU1_CLK_M4_SCU_CFG &= ~(1);
//CCU1_CLK_M4_CREG_CFG &= ~(1);
CCU1_CLK_M4_RITIMER_CFG &= ~(1);
CCU1_CLK_M4_USART2_CFG &= ~(1);
CCU1_CLK_M4_USART3_CFG &= ~(1);
CCU1_CLK_M4_TIMER2_CFG &= ~(1);
CCU1_CLK_M4_TIMER3_CFG &= ~(1);
CCU1_CLK_M4_QEI_CFG &= ~(1);
CCU1_CLK_PERIPH_SGPIO_CFG &= ~(1);
/* ******************************************** */
/* ADCHS Configuration (GP_CLKIN clock source) */
/* ******************************************** */
sys_clock_samplerate(&airspy_m4_conf[0]);
}
void mcu_init(void) {
mcu_arch_init();
#ifdef PERIPHERALS_AUTO_INIT
sys_time_init();
#ifdef USE_LED
led_init();
#endif
/* for now this means using spektrum */
#if defined RADIO_CONTROL & defined RADIO_CONTROL_SPEKTRUM_PRIMARY_PORT & defined RADIO_CONTROL_BIND_IMPL_FUNC
RADIO_CONTROL_BIND_IMPL_FUNC();
#endif
#if USE_UART0
uart0_init();
#endif
#if USE_UART1
uart1_init();
#endif
#if USE_UART2
uart2_init();
#endif
#if USE_UART3
uart3_init();
#endif
#if USE_UART4
uart4_init();
#endif
#if USE_UART5
uart5_init();
#endif
#if USE_UART6
uart6_init();
#endif
#ifdef USE_I2C0
i2c0_init();
#endif
#ifdef USE_I2C1
i2c1_init();
#endif
#ifdef USE_I2C2
i2c2_init();
#endif
#ifdef USE_I2C3
i2c3_init();
#endif
#if USE_ADC
adc_init();
#endif
#if USE_USB_SERIAL
VCOM_init();
#endif
#if USE_SPI
#if SPI_MASTER
#if USE_SPI0
spi0_init();
#endif
#if USE_SPI1
spi1_init();
#endif
#if USE_SPI2
spi2_init();
#endif
#if USE_SPI3
spi3_init();
#endif
spi_init_slaves();
#endif // SPI_MASTER
#if SPI_SLAVE
#if USE_SPI0_SLAVE
spi0_slave_init();
#endif
#if USE_SPI1_SLAVE
spi1_slave_init();
#endif
#if USE_SPI2_SLAVE
spi2_slave_init();
#endif
#if USE_SPI3_SLAVE
spi3_slave_init();
#endif
#endif // SPI_SLAVE
#if SPI_SLAVE_HS
spi_slave_hs_init();
#endif
#endif // USE_SPI
#ifdef USE_DAC
dac_init();
#endif
#ifdef USE_UDP0
UDP0Init();
#endif
#ifdef USE_UDP1
UDP1Init();
#endif
#ifdef USE_UDP2
UDP2Init();
#endif
#else
INFO("PERIPHERALS_AUTO_INIT not enabled! Peripherals (including sys_time) need explicit initialization.")
#endif /* PERIPHERALS_AUTO_INIT */
}