void i2c_write(uint8_t address, uint8_t* data, uint32_t length)
{
uint32_t dummy;
while(I2C2->SR2 & I2C_SR2_BUSY)
{
if(error_check())
{
i2c_config();
return;
}
}
I2C2->CR1 |= I2C_CR1_START;
while(!(I2C2->SR1 & I2C_SR1_SB))
{
if(error_check())
{
i2c_config();
return;
}
}
dummy = I2C2->SR1;
I2C2->DR = address;
while (!(I2C2->SR1 & I2C_SR1_ADDR))
{
if(error_check())
{
i2c_config();
return;
}
}
dummy = I2C2->SR1;
dummy = I2C2->SR2;
while (length--)
{
while (!(I2C2->SR1 & I2C_SR1_TXE))
{
if(error_check())
{
i2c_config();
return;
}
}
I2C2->DR = *data++;
}
while (!(I2C2->SR1 & I2C_SR1_TXE) || !(I2C2->SR1 & I2C_SR1_BTF))
{
if(error_check())
{
i2c_config();
return;
}
}
I2C2->CR1 |= I2C_CR1_STOP;
}
static void
i2c_init(wm_i2c *i2c)
{
static int clock_inited = 0;
if (!clock_inited) {
CLK_Module_Type clkmod;
switch (i2c->port) {
case 0:
default:
clkmod = CLK_I2C0;
break;
case 1:
clkmod = CLK_I2C1;
break;
case 2:
clkmod = CLK_I2C2;
break;
}
CLK_ModuleClkEnable(clkmod);
CLK_ModuleClkDivider(clkmod, CLK_DIV);
clock_inited = true;
}
i2c_config(i2c);
}
//main function
void main(void)
{
unsigned char st1[]="STARTING";
unsigned char st2[]=".";
//pins for drive LCD
TRISB = 0x80;
//Initialize modules
Init_LCD();
i2c_config();
set_ds1307_time(AM,0,0,6);
set_ds1307_day(8,11,8,13);
lcd_putstr(st1);
for(i=0;i<7;i++)
{
lcd_putstr(st2);
Delay1KTCYx(200);
}
LCD_CMD(LCD_clear);
while(1)
{
lcd_gotoxy(1,1);//hang 1, cot 1.
Display_time(get_ds1307_time());
lcd_gotoxy(1,2);//hang 2, cot 1
Display_day(get_ds1307_day());
Delay10KTCYx(70);
};
}
void sensors_init()
{
i2c_config();
gyro.address = 212;
gyro.scale = 0.070;
acc.address = 48;
acc.scale = 0.00025;
magneto.address = 28;
//accelero conf
i2c_write2(acc.address, 0x20, 151);//ustawienie czestotliwosci
i2c_write2(acc.address, 0x21, 0); //filtrowanie
i2c_write2(acc.address, 0x22, 8); //nie wiemy czemu to samo co bit5
i2c_write2(acc.address, 0x23, 40); //wysoka rozdzielczoϾ +-8G
i2c_write2(acc.address, 0x24, 64); //FIFO
//gyro conf
i2c_write2(gyro.address, 0x20, 0x0F); //wszystko w³¹czone
i2c_write2(gyro.address, 0x21, 0x00); //filtry
i2c_write2(gyro.address, 0x22, 0x00);// póki co pin Ÿle poprowadzony wiêc niepotrzebne, jakiœ dziwny
i2c_write2(gyro.address, 0x23, 0x20); //500 dps
i2c_write2(gyro.address, 0x24, 0x00); //fifo, filtr
//magneto conf
i2c_write2(magneto.address, 0x11, 0x80); //automatic reset
i2c_write2(magneto.address, 0x10, 0x01); //active mode
}
void
xs_i2c_setClock(xsMachine *the)
{
wm_i2c *i2c = xsGetHostData(xsThis);
i2c->scl_high = xsToInteger(xsArg(0));
i2c->scl_low = xsToInteger(xsArg(1));
i2c_config(i2c);
}
static int
mc_i2c_read(wm_i2c *i2c, int reg, uint8_t *data, int nbytes)
{
int i, nwritten = 0;
#if I2C_SUPPORT_CONCURRENCY
if (i2c->slave_addr != i2c_current_slave_addr)
i2c_config(i2c);
#endif
if (reg >= 0) {
if (!i2c_write_bytes(i2c, reg, NULL, 0))
goto bail;
}
#if I2C_READCMD_AHEAD
if (nbytes > 0) {
i2c_read_start(i2c); /* issue the first READ CMD in advance to keep it always in the txFIFO */
nwritten++;
}
#endif
for (i = 0; i < nbytes; i++) {
i2c_timer_start(i2c);
#if I2C_READCMD_AHEAD
if (nwritten < nbytes) {
i2c_read_start(i2c);
nwritten++;
}
#endif
while (!(i2c->reg->STATUS.WORDVAL & 0x08 /* RFNE */)) {
#if !I2C_READCMD_AHEAD
if (nwritten < nbytes) {
if ((i2c->reg->STATUS.WORDVAL & (0x08|0x02)) == 0x02 /* RFNE | TFNF */) {
i2c->reg->DATA_CMD.WORDVAL = 0x100; /* READ CMD */
nwritten++;
}
}
#endif
if (i2c_timeout(i2c, i2c->rxtout)) {
#if I2C_VERBOSE
mc_log_debug("I2C: read: timeout [%d]! STATUS = 0x%x, RISTAT = 0x%x, ABRT = 0x%x\n", i, i2c->reg->STATUS.WORDVAL, i2c->reg->RAW_INTR_STAT.WORDVAL, i2c->reg->TX_ABRT_SOURCE.WORDVAL);
#endif
goto bail;
}
}
data[i] = i2c->reg->DATA_CMD.WORDVAL;
}
return 0;
bail:
return -1;
}
ErrorStatus send_i2c(I2C_TypeDef * I2Cx, uint8_t* TxBuffer, uint8_t slave_address, uint8_t package_size)
{
static uint16_t Timeout;
uint16_t i2c_error = 0;
//static uint16_t TxBuffer_serial[32];
//static uint16_t package_size_serial;
uint8_t TxCounter = 0;
__disable_irq();
Timeout = 0xFFF;
/* While the bus is busy */
while(I2C_GetFlagStatus(I2Cx, I2C_FLAG_BUSY))
{
if (Timeout-- == 0)
{
//package_size_serial = sprintf(TxBuffer_serial, "bus was busy\r\n");
//send_uart(USARTz, TxBuffer_serial, package_size_serial);
i2c_error_code = BUSY;
i2c_error = 1;
break;
}
}
if(i2c_error == 0)
{
/* Send I2Cx START condition */
I2C_GenerateSTART(I2Cx, ENABLE);
Timeout = 0xFFF;
/* Test on I2Cx EV5 and clear it */
while(!I2C_CheckEvent(I2Cx, I2C_EVENT_MASTER_MODE_SELECT))
{
if (Timeout-- == 0)
{
//package_size_serial = sprintf(TxBuffer_serial, "not able to become master\r\n");
//send_uart(USARTz, TxBuffer_serial, package_size_serial);
i2c_error_code = NOT_MASTER;
i2c_error = 1;
break;
}
}
}
if(i2c_error == 0)
{
/* Send slave Address for write */
I2C_Send7bitAddress(I2Cx, slave_address, I2C_Direction_Transmitter);
Timeout = 0xFF;
/* wait for acknowledge bit */
while(!I2C_CheckEvent(I2Cx, I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED))
{
if (Timeout-- == 0)
{
//package_size_serial = sprintf(TxBuffer_serial, "no acknowldgement received\r\n");
//send_uart(USARTz, TxBuffer_serial, package_size_serial);
i2c_error_code = NO_ACKNOWLEDGEMENT;
i2c_error = 1;
return ERROR;
}
}
}
if(i2c_error == 0)
{
while(TxCounter!=package_size)
{
/* Send some data */
I2C_SendData(I2Cx, TxBuffer[TxCounter++]);
Timeout = 0xFF;
while(!I2C_CheckEvent(I2Cx, I2C_EVENT_MASTER_BYTE_TRANSMITTED))
{
if (Timeout-- == 0)
{
//package_size_serial = sprintf(TxBuffer_serial, "couldn't send data\r\n");
//send_uart(USARTz, TxBuffer_serial, package_size_serial);
i2c_error_code = DATA_NOT_SENT;
i2c_error = 1;
break;
}
}
}
}
/* Send I2Cx STOP Condition */
I2C_GenerateSTOP(I2Cx, ENABLE);
Timeout = 0xFF;
while(I2C_GetFlagStatus(I2C1, I2C_FLAG_STOPF))
{
if (Timeout-- == 0)
//package_size_serial = sprintf(TxBuffer_serial, "couldn't send stop\r\n");
//send_uart(USARTz, TxBuffer_serial, package_size_serial);
I2C_GenerateSTOP(I2Cx, ENABLE);
i2c_error_code = STOP_NOT_SENT;
i2c_error = 1;
break;
// really needed?
}
__enable_irq();
if(i2c_error)
{
i2c_config();
return ERROR;
}
else
{
return SUCCESS;
}
}
ErrorStatus receive_i2c(I2C_TypeDef * I2Cx, uint8_t * RxBuffer, uint8_t slave_address, uint8_t package_size)
{
static uint32_t Timeout;
uint8_t TxCounter = 0;
uint16_t i2c_error = 0;
__disable_irq();
/* While the bus is busy */
Timeout = 0xFFF;
/* While the bus is busy */
while(I2C_GetFlagStatus(I2Cx, I2C_FLAG_BUSY))
{
if (Timeout-- == 0)
{
i2c_error_code = BUSY;
i2c_error = 1;
break;
}
}
if(i2c_error == 0)
{
/* Send I2Cx START condition */
I2C_GenerateSTART(I2Cx, ENABLE);
Timeout = 0xFFF;
/* Test on I2Cx EV5 and clear it */
while(!I2C_CheckEvent(I2Cx, I2C_EVENT_MASTER_MODE_SELECT))
{
if (Timeout-- == 0)
{
i2c_error_code = NOT_MASTER;
i2c_error = 1;
break;
}
}
}
if(i2c_error == 0)
{
/* Send slave Address for write */
I2C_Send7bitAddress(I2Cx, slave_address, I2C_Direction_Receiver);
Timeout = 0xFF;
/* wait for acknowledge bit */
while(!I2C_CheckEvent(I2Cx, I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED))
{
if (Timeout-- == 0)
{
i2c_error_code = NO_ACKNOWLEDGEMENT;
i2c_error = 1;
break;
}
}
}
if(i2c_error == 0)
{
while(TxCounter!=package_size-1)
{
Timeout = 0xFFFF;
while(!I2C_CheckEvent(I2Cx, I2C_EVENT_MASTER_BYTE_RECEIVED ))
{
if (Timeout-- == 0)
{
i2c_error_code = DATA_NOT_RECEIVED;
i2c_error = 1;
break;
}
}
/* Receive some data */
RxBuffer[TxCounter++] = I2C_ReceiveData(I2Cx);
}
}
I2C_AcknowledgeConfig(I2Cx, DISABLE);
if(i2c_error == 0)
{
/* Send I2Cx STOP Condition */
I2C_GenerateSTOP(I2Cx, ENABLE);
Timeout = 0xFFFF;
while(!I2C_CheckEvent(I2Cx, I2C_EVENT_MASTER_BYTE_RECEIVED ))
{
if (Timeout-- == 0)
{
i2c_error_code = DATA_NOT_RECEIVED;
i2c_error = 1;
}
}
/* Receive some data */
RxBuffer[TxCounter++] = I2C_ReceiveData(I2Cx);
}
Timeout = 0xFF;
while(I2C_GetFlagStatus(I2C1, I2C_FLAG_STOPF))
{
if (Timeout-- == 0)
I2C_GenerateSTOP(I2Cx, ENABLE);
i2c_error_code = STOP_NOT_SENT;
i2c_error = 1;
break;
// really needed?
}
I2C_AcknowledgeConfig(I2Cx, ENABLE);
__enable_irq();
if(i2c_error)
{
i2c_config();
return ERROR;
}
else
{
return SUCCESS;
}
}
void
xs_i2c_write(xsMachine *the)
{
wm_i2c *i2c = xsGetHostData(xsThis);
int ac = xsToInteger(xsArgc);
int reg;
uint8_t *data;
int datasize;
uint8_t num;
uint8_t *allocated = NULL;
if (ac < 2)
return;
#if I2C_SUPPORT_CONCURRENCY
if (i2c->slave_addr != i2c_current_slave_addr)
i2c_config(i2c);
#endif
switch (xsTypeOf(xsArg(0))) {
case xsNumberType:
case xsIntegerType:
reg = xsToInteger(xsArg(0));
break;
default:
reg = -1;
break;
}
switch (xsTypeOf(xsArg(1))) {
case xsIntegerType:
case xsNumberType:
num = (uint8_t)xsToInteger(xsArg(1));
data = #
datasize = 1;
break;
case xsReferenceType:
if (xsIsInstanceOf(xsArg(1), xsArrayPrototype)) {
int i;
xsVars(1);
xsGet(xsVar(0), xsArg(1), xsID("length"));
datasize = xsToInteger(xsVar(0));
if ((allocated = mc_malloc(datasize)) == NULL)
mc_xs_throw(the, "no mem");
for (i = 0; i < datasize; i++) {
xsGet(xsVar(0), xsArg(1), (xsIndex)i);
allocated[i] = (uint8_t)xsToInteger(xsVar(0));
}
data = allocated;
}
else {
datasize = xsGetArrayBufferLength(xsArg(1));
data = xsToArrayBuffer(xsArg(1));
}
break;
default:
mc_xs_throw(the, "args");
return; /* NOT REACHED */
}
if (ac > 2) {
int n = xsToInteger(xsArg(2));
if (datasize > n)
datasize = n;
}
if (!i2c_wait_for_ack(i2c, i2c->txtout))
mc_log_debug("I2C: write: no ack!\n");
if (!i2c_write_bytes(i2c, reg, data, datasize))
goto bail;
(void)i2c_wait_tx_fifo(i2c); /* send the stop sequence */
if (allocated != NULL)
mc_free(allocated);
xsSetTrue(xsResult);
bail:
return;
}
void i2c_read( uint8_t adres, uint8_t reg_adres, uint8_t * dane, uint8_t len )
{
uint32_t dummy;
while(I2C2->SR2 & I2C_SR2_BUSY)
{
if(error_check())
{
i2c_config();
return;
}
}
I2C2->CR1 |= I2C_CR1_START;
while( !( I2C2->SR1 & I2C_SR1_SB ))
{
if(error_check())
{
i2c_config();
return;
}
}
I2C2->DR = adres;
while( !( I2C2->SR1 & I2C_SR1_ADDR ))
{
if(error_check())
{
i2c_config();
return;
}
}
dummy = I2C2->SR2;
while( !( I2C2->SR1 & I2C_SR1_TXE ))
{
if(error_check())
{
i2c_config();
return;
}
}
I2C2->DR = reg_adres;
while( !( I2C2->SR1 & I2C_SR1_BTF ))
{
if(error_check())
{
i2c_config();
return;
}
}
I2C2->CR1 |= I2C_CR1_START;
while( !( I2C2->SR1 & I2C_SR1_SB ))
{
if(error_check())
{
i2c_config();
return;
}
}
I2C2->DR = adres | 0x01;
while( !( I2C2->SR1 & I2C_SR1_ADDR ))
{
if(error_check())
{
i2c_config();
return;
}
}
dummy = I2C2->SR2;
I2C2->CR1 |= I2C_CR1_ACK;
while( len )
{
if( len == 1 )
I2C2->CR1 &= ~I2C_CR1_ACK;
while( !( I2C2->SR1 & I2C_SR1_RXNE ))
{
if(error_check())
{
i2c_config();
return;
}
}
*( dane++ ) = I2C2->DR;
len--;
}
I2C2->CR1 |= I2C_CR1_STOP;
}
