Exemplo n.º 1
0
static void idpram_resume_retry(struct work_struct *work)
{
	struct idpram_link_pm_data *pm_data =
		container_of(work, struct idpram_link_pm_data, \
		resume_work.work);

	mif_debug("MIF: %s\n", __func__);

	if (!idpram_resume_check(pm_data)) {
		mif_info("MIF: idpram resume ok\n");
		idpram_write_lock(pm_data, 0);
		wake_lock_timeout(&pm_data->hold_wlock, msecs_to_jiffies(20));
		return;
	}
	if (pm_data->resume_retry--) {
		schedule_delayed_work(&pm_data->resume_work, \
			msecs_to_jiffies(200));
		wake_lock_timeout(&pm_data->hold_wlock, msecs_to_jiffies(260));
	} else {
		mif_info("MIF: idpram resume T-I-M-E-O-UT\n");
		idpram_timeout_handler(pm_data);
		/* hold wakelock until uevnet sent to rild */
		wake_lock_timeout(&pm_data->hold_wlock, HZ*7);
		idpram_write_lock(pm_data, 0);
	}
}
static void idpram_resume_retry(struct work_struct *work)
{
	struct idpram_link_pm_data *pm_data =
		container_of(work, struct idpram_link_pm_data, \
		resume_work.work);

	pr_info("MIF: <%s+>\n", __func__);

	if (!idpram_resume_check(pm_data)) {
		pr_info("MIF: idpram resumed\n");
		idpram_write_lock(pm_data, 0);
		wake_unlock(&pm_data->hold_wlock);
		schedule_delayed_work(&pm_data->dpld->ld.tx_delayed_work,
					msecs_to_jiffies(10));
		pr_info("MIF: <%s->\n", __func__);
		return;
	}
	if (pm_data->resume_retry_cnt--) {
		pr_info("MIF: idpram not resumed yet\n");
		schedule_delayed_work(&pm_data->resume_work, \
			msecs_to_jiffies(200));
	} else {
		pr_info("MIF: idpram resume T-I-M-E-O-UT\n");
		idpram_timeout_handler(pm_data);
		wake_unlock(&pm_data->hold_wlock);
		/* hold wakelock until uevnet sent to rild */
		wake_lock_timeout(&pm_data->hold_wlock, HZ*7);
		idpram_write_lock(pm_data, 0);
	}

	pr_info("MIF: <%s->\n", __func__);
}
Exemplo n.º 3
0
static int idpram_pre_suspend(struct idpram_link_pm_data *pm_data)
{
	int timeout_ret = 0;
	int suspend_retry = 2;
	u16 intr_out = INT_CMD(INT_MASK_CMD_PDA_SLEEP);

	pm_data->pm_states = IDPRAM_PM_SUSPEND_PREPARE;
	pm_data->last_pm_mailbox = 0;
	idpram_write_lock(pm_data, 1);

	gpio_set_value(pm_data->mdata->gpio_mbx_intr, 1);

	/* prevent PDA_ACTIVE ststus is low */
	gpio_set_value(pm_data->mdata->gpio_pda_active, 1);

	if (!atomic_read(&pm_data->read_lock)) {
		do {
			init_completion(&pm_data->idpram_down);
			dpram_write_command(pm_data->dpld, intr_out);
			mif_err("MIF: idpram sent PDA_SLEEP Mailbox(0x%X)\n",
				intr_out);
			timeout_ret =
			wait_for_completion_timeout(&pm_data->idpram_down,
				(HZ/5));
			mif_err("MIF: suspend_enter cnt = %d\n",
				suspend_retry);
		} while (!timeout_ret && suspend_retry--);

		switch (pm_data->last_pm_mailbox) {
		case INT_CMD(INT_MASK_CMD_DPRAM_DOWN):
			break;

		/* if nack or other interrup, hold wakelock for DPM resume*/
		case INT_CMD(INT_MASK_CMD_DPRAM_DOWN_NACK):
			mif_err("MIF: idpram dpram down get NACK\n");

		default:
			mif_err("MIF: CP dpram Down not ready! intr=0x%X\n",
				dpram_readh(&pm_data->dpld->dpram->mbx_cp2ap));
			wake_lock_timeout(&pm_data->hold_wlock,
				msecs_to_jiffies(500));
			idpram_write_lock(pm_data, 0);
			return 0;
		}
		/*
		* Because, if dpram was powered down, cp dpram random intr was
		* ocurred. so, fixed by muxing cp dpram intr pin to GPIO output
		* high,..
		*/
		gpio_set_value(pm_data->mdata->gpio_mbx_intr, 1);
		s3c_gpio_cfgpin(pm_data->mdata->gpio_mbx_intr, S3C_GPIO_OUTPUT);
		pm_data->pm_states = IDPRAM_PM_DPRAM_POWER_DOWN;

		return 0;
	} else {
		mif_err("MIF: idpram hold read_lock\n");
		return -EBUSY;
	}
}
Exemplo n.º 4
0
static int idpram_resume_init(struct idpram_link_pm_data *pm_data)
{

	pm_data->pm_states = IDPRAM_PM_RESUME_START;
	pm_data->last_pm_mailbox = 0;

	dpram_clear(pm_data->dpld);
	idpram_magickey_init(pm_data);

	/* Initialize the dpram controller */
	pm_data->mdata->sfr_init();

	/*re-initialize internal dpram gpios */
	s3c_gpio_cfgpin(pm_data->mdata->gpio_mbx_intr, S3C_GPIO_SFN(0x2));

	idpram_write_lock(pm_data, 0);
	return 0;
}
static int idpram_pre_suspend(struct idpram_link_pm_data *pm_data)
{
	int timeout_ret = 0;
	int suspend_retry = 3;
	u16 intr_out = INT_CMD(INT_MASK_CMD_PDA_SLEEP);
	struct io_device *iod = dpram_find_iod_by_format(pm_data->dpld,
		IPC_RAMDUMP);

	pr_info("MIF: <%s+>\n", __func__);

	/*
	1. write magic number=0x554C
	2. send phone reset cmd=0x000F
	3. collect the modem ramdump
	4. modem reset
	5. modem on
	*/
#if defined(ENABLE_FORCED_CP_CRASH)
	dpram_force_cp_crash(&pm_data->dpld->ld);

	fp = mif_open_file("/sdcard/ramdump1.data");
	if (!fp)
		pr_err("MIF: <%s> file pointer is NULL\n", __func__);

	dpram_start_ramdump(&pm_data->dpld->ld, iod);

	for (; iod->ramdump_size;)
		dpram_read_ramdump(&pm_data->dpld->ld, iod);

	dpram_stop_ramdump(&pm_data->dpld->ld, iod);

	mif_close_file(fp);

	iod->mc->ops.modem_reset(iod->mc);
	iod->mc->ops.modem_on(iod->mc);

	pr_info("MIF: <%s->\n", __func__);
	return 0;
#endif

	pm_data->pm_states = IDPRAM_PM_SUSPEND_PREPARE;
	pm_data->last_pm_mailbox = 0;
	idpram_write_lock(pm_data, 1);

	gpio_set_value(pm_data->mdata->gpio_mbx_intr, 1);

	/* prevent PDA_ACTIVE status is low */
	gpio_set_value(pm_data->mdata->gpio_pda_active, 1);

	if (!atomic_read(&pm_data->read_lock)) {
		do {
			init_completion(&pm_data->idpram_down);
			dpram_write_command(pm_data->dpld, intr_out);
			pr_info("MIF: sending cmd = 0x%X\n", intr_out);
			timeout_ret =
			wait_for_completion_timeout(&pm_data->idpram_down,
				PDA_SLEEP_CMD_TIMEOUT);

			if (!timeout_ret)
				pr_err("MIF: timeout!. retry cnt = %d\n", \
					suspend_retry);
		} while (!timeout_ret && --suspend_retry);

		if (!timeout_ret && !suspend_retry)
			pr_err("MIF: no response for PDA_SLEEP cmd\n");

		pr_info("MIF: last responce from cp = 0x%X\n", \
			pm_data->last_pm_mailbox);

		switch (pm_data->last_pm_mailbox) {
		case INT_CMD(INT_MASK_CMD_DPRAM_DOWN):
			pr_info("MIF: INT_MASK_CMD_DPRAM_DOWN\n");
			break;

		/* if nack or other interrup, hold wakelock for DPM resume */
#ifndef CONFIG_CDMA_MODEM_QSC6085
		case INT_CMD(INT_MASK_CMD_DPRAM_DOWN_NACK):
			pr_info("MIF: INT_MASK_CMD_DPRAM_DOWN_NACK\n");
			break;
#endif

		default:
			pr_err("MIF: idpram down or not ready!! intr = 0x%X\n",
				dpram_readh(&pm_data->dpld->dpram->mbx_cp2ap));
			wake_lock_timeout(&pm_data->hold_wlock,
				msecs_to_jiffies(500));
			idpram_write_lock(pm_data, 0);

			/*
			1. Flash a modem which crashes when AP sends
			   cmd=PDA_SLEEP
			2. collect the modem ramdump
			3. modem reset
			4. modem on
			*/
#if defined(CP_CRASHES_ON_PDA_SLEEP_CMD)
			fp = mif_open_file("/sdcard/ramdump2.data");
			if (!fp)
				pr_err("MIF: <%s> fp is NULL\n", __func__);

			dpram_start_ramdump(&pm_data->dpld->ld, iod);

			for (; iod->ramdump_size;)
				dpram_read_ramdump(&pm_data->dpld->ld, iod);

			dpram_stop_ramdump(&pm_data->dpld->ld, iod);

			mif_close_file(fp);

			iod->mc->ops.modem_reset(iod->mc);
			iod->mc->ops.modem_on(iod->mc);
#endif

			pr_info("MIF: <%s->\n", __func__);
			return 0;
		}

		/*
		* Because, if dpram was powered down, cp dpram random intr was
		* ocurred. so, fixed by muxing cp dpram intr pin to GPIO output
		* high,..
		*/
		gpio_set_value(pm_data->mdata->gpio_mbx_intr, 1);
		s3c_gpio_cfgpin(pm_data->mdata->gpio_mbx_intr,
			S3C_GPIO_OUTPUT);
		pm_data->pm_states = IDPRAM_PM_DPRAM_POWER_DOWN;

		pr_info("MIF: <%s->\n", __func__);
		return 0;
	} else {
		pr_err("MIF: hold read_lock failed\n");
		return -EBUSY;
	}
}