void pcie_tx_skbs_ndp(unsigned long data)
{
struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
struct mwl_priv *priv = hw->priv;
struct pcie_priv *pcie_priv = priv->hif.priv;
int num = SYSADPT_TX_WMM_QUEUES;
struct sk_buff *tx_skb;
int rc;
while (num--) {
while (skb_queue_len(&pcie_priv->txq[num]) > 0) {
if (pcie_priv->desc_data_ndp.tx_desc_busy_cnt >=
(MAX_TX_RING_SEND_SIZE - 1)) {
pcie_tx_done_ndp(hw);
break;
}
tx_skb = skb_dequeue(&pcie_priv->txq[num]);
rc = pcie_tx_skb_ndp(priv, tx_skb);
if (rc) {
pcie_tx_done_ndp(hw);
if (rc == -EAGAIN)
skb_queue_head(&pcie_priv->txq[num],
tx_skb);
break;
}
if (++pcie_priv->tx_done_cnt > TXDONE_THRESHOLD) {
pcie_tx_done_ndp(hw);
pcie_priv->tx_done_cnt = 0;
}
}
if (skb_queue_len(&pcie_priv->txq[num]) <
pcie_priv->txq_wake_threshold) {
int queue;
queue = SYSADPT_TX_WMM_QUEUES - num - 1;
if (ieee80211_queue_stopped(hw, queue))
ieee80211_wake_queue(hw, queue);
}
}
pcie_priv->is_tx_schedule = false;
}
static irqreturn_t device_intr(int irq, void *dev_instance)
{
struct vnt_private *pDevice = dev_instance;
int max_count = 0;
unsigned long dwMIBCounter = 0;
unsigned char byOrgPageSel = 0;
int handled = 0;
unsigned long flags;
MACvReadISR(pDevice->PortOffset, &pDevice->dwIsr);
if (pDevice->dwIsr == 0)
return IRQ_RETVAL(handled);
if (pDevice->dwIsr == 0xffffffff) {
pr_debug("dwIsr = 0xffff\n");
return IRQ_RETVAL(handled);
}
handled = 1;
MACvIntDisable(pDevice->PortOffset);
spin_lock_irqsave(&pDevice->lock, flags);
//Make sure current page is 0
VNSvInPortB(pDevice->PortOffset + MAC_REG_PAGE1SEL, &byOrgPageSel);
if (byOrgPageSel == 1)
MACvSelectPage0(pDevice->PortOffset);
else
byOrgPageSel = 0;
MACvReadMIBCounter(pDevice->PortOffset, &dwMIBCounter);
// TBD....
// Must do this after doing rx/tx, cause ISR bit is slow
// than RD/TD write back
// update ISR counter
STAvUpdate802_11Counter(&pDevice->s802_11Counter, &pDevice->scStatistic, dwMIBCounter);
while (pDevice->dwIsr != 0) {
STAvUpdateIsrStatCounter(&pDevice->scStatistic, pDevice->dwIsr);
MACvWriteISR(pDevice->PortOffset, pDevice->dwIsr);
if (pDevice->dwIsr & ISR_FETALERR) {
pr_debug(" ISR_FETALERR\n");
VNSvOutPortB(pDevice->PortOffset + MAC_REG_SOFTPWRCTL, 0);
VNSvOutPortW(pDevice->PortOffset + MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPECTI);
device_error(pDevice, pDevice->dwIsr);
}
if (pDevice->dwIsr & ISR_TBTT) {
if (pDevice->vif &&
pDevice->op_mode != NL80211_IFTYPE_ADHOC)
vnt_check_bb_vga(pDevice);
pDevice->bBeaconSent = false;
if (pDevice->bEnablePSMode)
PSbIsNextTBTTWakeUp((void *)pDevice);
if ((pDevice->op_mode == NL80211_IFTYPE_AP ||
pDevice->op_mode == NL80211_IFTYPE_ADHOC) &&
pDevice->vif->bss_conf.enable_beacon) {
MACvOneShotTimer1MicroSec(pDevice->PortOffset,
(pDevice->vif->bss_conf.beacon_int - MAKE_BEACON_RESERVED) << 10);
}
/* TODO: adhoc PS mode */
}
if (pDevice->dwIsr & ISR_BNTX) {
if (pDevice->op_mode == NL80211_IFTYPE_ADHOC) {
pDevice->bIsBeaconBufReadySet = false;
pDevice->cbBeaconBufReadySetCnt = 0;
}
pDevice->bBeaconSent = true;
}
if (pDevice->dwIsr & ISR_RXDMA0)
max_count += device_rx_srv(pDevice, TYPE_RXDMA0);
if (pDevice->dwIsr & ISR_RXDMA1)
max_count += device_rx_srv(pDevice, TYPE_RXDMA1);
if (pDevice->dwIsr & ISR_TXDMA0)
max_count += device_tx_srv(pDevice, TYPE_TXDMA0);
if (pDevice->dwIsr & ISR_AC0DMA)
max_count += device_tx_srv(pDevice, TYPE_AC0DMA);
if (pDevice->dwIsr & ISR_SOFTTIMER1) {
if (pDevice->vif) {
if (pDevice->vif->bss_conf.enable_beacon)
vnt_beacon_make(pDevice, pDevice->vif);
}
}
/* If both buffers available wake the queue */
if (pDevice->vif) {
if (AVAIL_TD(pDevice, TYPE_TXDMA0) &&
AVAIL_TD(pDevice, TYPE_AC0DMA) &&
ieee80211_queue_stopped(pDevice->hw, 0))
ieee80211_wake_queues(pDevice->hw);
}
MACvReadISR(pDevice->PortOffset, &pDevice->dwIsr);
MACvReceive0(pDevice->PortOffset);
MACvReceive1(pDevice->PortOffset);
if (max_count > pDevice->sOpts.int_works)
break;
}
if (byOrgPageSel == 1)
MACvSelectPage1(pDevice->PortOffset);
spin_unlock_irqrestore(&pDevice->lock, flags);
MACvIntEnable(pDevice->PortOffset, IMR_MASK_VALUE);
return IRQ_RETVAL(handled);
}
static void vnt_interrupt_process(struct vnt_private *priv)
{
struct ieee80211_low_level_stats *low_stats = &priv->low_stats;
int max_count = 0;
u32 mib_counter;
u32 isr;
unsigned long flags;
MACvReadISR(priv->PortOffset, &isr);
if (isr == 0)
return;
if (isr == 0xffffffff) {
pr_debug("isr = 0xffff\n");
return;
}
MACvIntDisable(priv->PortOffset);
spin_lock_irqsave(&priv->lock, flags);
/* Read low level stats */
MACvReadMIBCounter(priv->PortOffset, &mib_counter);
low_stats->dot11RTSSuccessCount += mib_counter & 0xff;
low_stats->dot11RTSFailureCount += (mib_counter >> 8) & 0xff;
low_stats->dot11ACKFailureCount += (mib_counter >> 16) & 0xff;
low_stats->dot11FCSErrorCount += (mib_counter >> 24) & 0xff;
/*
* TBD....
* Must do this after doing rx/tx, cause ISR bit is slow
* than RD/TD write back
* update ISR counter
*/
while (isr && priv->vif) {
MACvWriteISR(priv->PortOffset, isr);
if (isr & ISR_FETALERR) {
pr_debug(" ISR_FETALERR\n");
VNSvOutPortB(priv->PortOffset + MAC_REG_SOFTPWRCTL, 0);
VNSvOutPortW(priv->PortOffset +
MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPECTI);
device_error(priv, isr);
}
if (isr & ISR_TBTT) {
if (priv->op_mode != NL80211_IFTYPE_ADHOC)
vnt_check_bb_vga(priv);
priv->bBeaconSent = false;
if (priv->bEnablePSMode)
PSbIsNextTBTTWakeUp((void *)priv);
if ((priv->op_mode == NL80211_IFTYPE_AP ||
priv->op_mode == NL80211_IFTYPE_ADHOC) &&
priv->vif->bss_conf.enable_beacon) {
MACvOneShotTimer1MicroSec(priv->PortOffset,
(priv->vif->bss_conf.beacon_int - MAKE_BEACON_RESERVED) << 10);
}
/* TODO: adhoc PS mode */
}
if (isr & ISR_BNTX) {
if (priv->op_mode == NL80211_IFTYPE_ADHOC) {
priv->bIsBeaconBufReadySet = false;
priv->cbBeaconBufReadySetCnt = 0;
}
priv->bBeaconSent = true;
}
if (isr & ISR_RXDMA0)
max_count += device_rx_srv(priv, TYPE_RXDMA0);
if (isr & ISR_RXDMA1)
max_count += device_rx_srv(priv, TYPE_RXDMA1);
if (isr & ISR_TXDMA0)
max_count += device_tx_srv(priv, TYPE_TXDMA0);
if (isr & ISR_AC0DMA)
max_count += device_tx_srv(priv, TYPE_AC0DMA);
if (isr & ISR_SOFTTIMER1) {
if (priv->vif->bss_conf.enable_beacon)
vnt_beacon_make(priv, priv->vif);
}
/* If both buffers available wake the queue */
if (AVAIL_TD(priv, TYPE_TXDMA0) &&
AVAIL_TD(priv, TYPE_AC0DMA) &&
ieee80211_queue_stopped(priv->hw, 0))
ieee80211_wake_queues(priv->hw);
MACvReadISR(priv->PortOffset, &isr);
MACvReceive0(priv->PortOffset);
MACvReceive1(priv->PortOffset);
if (max_count > priv->sOpts.int_works)
break;
}
spin_unlock_irqrestore(&priv->lock, flags);
MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE);
}
/**
* rsi_core_xmit() - This function transmits the packets received from mac80211
* @common: Pointer to the driver private structure.
* @skb: Pointer to the socket buffer structure.
*
* Return: None.
*/
void rsi_core_xmit(struct rsi_common *common, struct sk_buff *skb)
{
struct rsi_hw *adapter = common->priv;
struct ieee80211_tx_info *info;
struct skb_info *tx_params;
struct ieee80211_hdr *wh = NULL;
struct ieee80211_vif *vif;
u8 q_num, tid = 0;
struct rsi_sta *rsta = NULL;
if ((!skb) || (!skb->len)) {
rsi_dbg(ERR_ZONE, "%s: Null skb/zero Length packet\n",
__func__);
goto xmit_fail;
}
if (common->fsm_state != FSM_MAC_INIT_DONE) {
rsi_dbg(ERR_ZONE, "%s: FSM state not open\n", __func__);
goto xmit_fail;
}
if (common->wow_flags & RSI_WOW_ENABLED) {
rsi_dbg(ERR_ZONE,
"%s: Blocking Tx_packets when WOWLAN is enabled\n",
__func__);
goto xmit_fail;
}
info = IEEE80211_SKB_CB(skb);
tx_params = (struct skb_info *)info->driver_data;
wh = (struct ieee80211_hdr *)&skb->data[0];
tx_params->sta_id = 0;
vif = rsi_get_vif(adapter, wh->addr2);
if (!vif)
goto xmit_fail;
tx_params->vif = vif;
tx_params->vap_id = ((struct vif_priv *)vif->drv_priv)->vap_id;
if ((ieee80211_is_mgmt(wh->frame_control)) ||
(ieee80211_is_ctl(wh->frame_control)) ||
(ieee80211_is_qos_nullfunc(wh->frame_control))) {
if (ieee80211_is_assoc_req(wh->frame_control) ||
ieee80211_is_reassoc_req(wh->frame_control)) {
struct ieee80211_bss_conf *bss = &vif->bss_conf;
common->eapol4_confirm = false;
rsi_hal_send_sta_notify_frame(common,
RSI_IFTYPE_STATION,
STA_CONNECTED, bss->bssid,
bss->qos, bss->aid, 0,
vif);
}
q_num = MGMT_SOFT_Q;
skb->priority = q_num;
if (rsi_prepare_mgmt_desc(common, skb)) {
rsi_dbg(ERR_ZONE, "Failed to prepare desc\n");
goto xmit_fail;
}
} else {
if (ieee80211_is_data_qos(wh->frame_control)) {
u8 *qos = ieee80211_get_qos_ctl(wh);
tid = *qos & IEEE80211_QOS_CTL_TID_MASK;
skb->priority = TID_TO_WME_AC(tid);
} else {
tid = IEEE80211_NONQOS_TID;
skb->priority = BE_Q;
}
q_num = skb->priority;
tx_params->tid = tid;
if (((vif->type == NL80211_IFTYPE_AP) ||
(vif->type == NL80211_IFTYPE_P2P_GO)) &&
(!is_broadcast_ether_addr(wh->addr1)) &&
(!is_multicast_ether_addr(wh->addr1))) {
rsta = rsi_find_sta(common, wh->addr1);
if (!rsta)
goto xmit_fail;
tx_params->sta_id = rsta->sta_id;
} else {
tx_params->sta_id = 0;
}
if (rsta) {
/* Start aggregation if not done for this tid */
if (!rsta->start_tx_aggr[tid]) {
rsta->start_tx_aggr[tid] = true;
ieee80211_start_tx_ba_session(rsta->sta,
tid, 0);
}
}
if (skb->protocol == cpu_to_be16(ETH_P_PAE)) {
q_num = MGMT_SOFT_Q;
skb->priority = q_num;
}
if (rsi_prepare_data_desc(common, skb)) {
rsi_dbg(ERR_ZONE, "Failed to prepare data desc\n");
goto xmit_fail;
}
}
if ((q_num < MGMT_SOFT_Q) &&
((skb_queue_len(&common->tx_queue[q_num]) + 1) >=
DATA_QUEUE_WATER_MARK)) {
rsi_dbg(ERR_ZONE, "%s: sw queue full\n", __func__);
if (!ieee80211_queue_stopped(adapter->hw, WME_AC(q_num)))
ieee80211_stop_queue(adapter->hw, WME_AC(q_num));
rsi_set_event(&common->tx_thread.event);
goto xmit_fail;
}
rsi_core_queue_pkt(common, skb);
rsi_dbg(DATA_TX_ZONE, "%s: ===> Scheduling TX thread <===\n", __func__);
rsi_set_event(&common->tx_thread.event);
return;
xmit_fail:
rsi_dbg(ERR_ZONE, "%s: Failed to queue packet\n", __func__);
/* Dropping pkt here */
ieee80211_free_txskb(common->priv->hw, skb);
}
/**
* rsi_core_qos_processor() - This function is used to determine the wmm queue
* based on the backoff procedure. Data packets are
* dequeued from the selected hal queue and sent to
* the below layers.
* @common: Pointer to the driver private structure.
*
* Return: None.
*/
void rsi_core_qos_processor(struct rsi_common *common)
{
struct rsi_hw *adapter = common->priv;
struct sk_buff *skb;
unsigned long tstamp_1, tstamp_2;
u8 q_num;
int status;
tstamp_1 = jiffies;
while (1) {
q_num = rsi_core_determine_hal_queue(common);
rsi_dbg(DATA_TX_ZONE,
"%s: Queue number = %d\n", __func__, q_num);
if (q_num == INVALID_QUEUE) {
rsi_dbg(DATA_TX_ZONE, "%s: No More Pkt\n", __func__);
break;
}
if (common->hibernate_resume)
break;
mutex_lock(&common->tx_lock);
status = adapter->check_hw_queue_status(adapter, q_num);
if ((status <= 0)) {
mutex_unlock(&common->tx_lock);
break;
}
if ((q_num < MGMT_SOFT_Q) &&
((skb_queue_len(&common->tx_queue[q_num])) <=
MIN_DATA_QUEUE_WATER_MARK)) {
if (ieee80211_queue_stopped(adapter->hw, WME_AC(q_num)))
ieee80211_wake_queue(adapter->hw,
WME_AC(q_num));
}
skb = rsi_core_dequeue_pkt(common, q_num);
if (skb == NULL) {
rsi_dbg(ERR_ZONE, "skb null\n");
mutex_unlock(&common->tx_lock);
break;
}
if (q_num == MGMT_BEACON_Q) {
status = rsi_send_pkt_to_bus(common, skb);
dev_kfree_skb(skb);
} else {
#ifdef CONFIG_RSI_COEX
if (common->coex_mode > 1) {
status = rsi_coex_send_pkt(common, skb,
RSI_WLAN_Q);
} else {
#endif
if (q_num == MGMT_SOFT_Q)
status = rsi_send_mgmt_pkt(common, skb);
else
status = rsi_send_data_pkt(common, skb);
#ifdef CONFIG_RSI_COEX
}
#endif
}
if (status) {
mutex_unlock(&common->tx_lock);
break;
}
common->tx_stats.total_tx_pkt_send[q_num]++;
tstamp_2 = jiffies;
mutex_unlock(&common->tx_lock);
if (time_after(tstamp_2, tstamp_1 + (300 * HZ) / 1000))
schedule();
}
}
/**
* rsi_core_xmit() - This function transmits the packets received from mac80211
* @common: Pointer to the driver private structure.
* @skb: Pointer to the socket buffer structure.
*
* Return: None.
*/
void rsi_core_xmit(struct rsi_common *common, struct sk_buff *skb)
{
struct rsi_hw *adapter = common->priv;
struct ieee80211_tx_info *info;
struct skb_info *tx_params;
struct ieee80211_hdr *tmp_hdr = NULL;
u8 q_num, tid = 0;
if ((!skb) || (!skb->len)) {
rsi_dbg(ERR_ZONE, "%s: Null skb/zero Length packet\n",
__func__);
goto xmit_fail;
}
info = IEEE80211_SKB_CB(skb);
tx_params = (struct skb_info *)info->driver_data;
tmp_hdr = (struct ieee80211_hdr *)&skb->data[0];
if (common->fsm_state != FSM_MAC_INIT_DONE) {
rsi_dbg(ERR_ZONE, "%s: FSM state not open\n", __func__);
goto xmit_fail;
}
if ((ieee80211_is_mgmt(tmp_hdr->frame_control)) ||
(ieee80211_is_ctl(tmp_hdr->frame_control)) ||
(ieee80211_is_qos_nullfunc(tmp_hdr->frame_control))) {
q_num = MGMT_SOFT_Q;
skb->priority = q_num;
} else {
if (ieee80211_is_data_qos(tmp_hdr->frame_control)) {
tid = (skb->data[24] & IEEE80211_QOS_TID);
skb->priority = TID_TO_WME_AC(tid);
} else {
tid = IEEE80211_NONQOS_TID;
skb->priority = BE_Q;
}
q_num = skb->priority;
tx_params->tid = tid;
tx_params->sta_id = 0;
}
if ((q_num != MGMT_SOFT_Q) &&
((skb_queue_len(&common->tx_queue[q_num]) + 1) >=
DATA_QUEUE_WATER_MARK)) {
rsi_dbg(ERR_ZONE, "%s: sw queue full\n", __func__);
if (!ieee80211_queue_stopped(adapter->hw, WME_AC(q_num)))
ieee80211_stop_queue(adapter->hw, WME_AC(q_num));
rsi_set_event(&common->tx_thread.event);
goto xmit_fail;
}
rsi_core_queue_pkt(common, skb);
rsi_dbg(DATA_TX_ZONE, "%s: ===> Scheduling TX thead <===\n", __func__);
rsi_set_event(&common->tx_thread.event);
return;
xmit_fail:
rsi_dbg(ERR_ZONE, "%s: Failed to queue packet\n", __func__);
/* Dropping pkt here */
ieee80211_free_txskb(common->priv->hw, skb);
}
