static bool test(data_t *data, enum pipe pipe, igt_output_t *output) { igt_plane_t *primary; drmModeModeInfo *mode; struct igt_fb fb[2]; int fd, ret; /* select the pipe we want to use */ igt_output_set_pipe(output, pipe); igt_display_commit(&data->display); if (!output->valid) { igt_output_set_pipe(output, PIPE_ANY); igt_display_commit(&data->display); return false; } primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY); mode = igt_output_get_mode(output); igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_I915_FORMAT_MOD_X_TILED, 0.0, 0.0, 0.0, &fb[0]); igt_plane_set_fb(primary, &fb[0]); igt_display_commit2(&data->display, COMMIT_LEGACY); fd = drm_open_driver(DRIVER_INTEL); ret = drmDropMaster(data->drm_fd); igt_assert_eq(ret, 0); ret = drmSetMaster(fd); igt_assert_eq(ret, 0); igt_create_color_fb(fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_I915_FORMAT_MOD_X_TILED, 0.0, 0.0, 0.0, &fb[1]); ret = drmModePageFlip(fd, output->config.crtc->crtc_id, fb[1].fb_id, DRM_MODE_PAGE_FLIP_EVENT, data); igt_assert_eq(ret, 0); ret = close(fd); igt_assert_eq(ret, 0); ret = drmSetMaster(data->drm_fd); igt_assert_eq(ret, 0); igt_plane_set_fb(primary, NULL); igt_output_set_pipe(output, PIPE_ANY); igt_display_commit(&data->display); igt_remove_fb(data->drm_fd, &fb[0]); return true; }
static bool prepare_crtc(data_t *data, igt_output_t *output, int cursor_w, int cursor_h) { drmModeModeInfo *mode; igt_display_t *display = &data->display; igt_plane_t *primary; /* select the pipe we want to use */ igt_output_set_pipe(output, data->pipe); cursor_disable(data); igt_display_commit(display); if (!output->valid) { igt_output_set_pipe(output, PIPE_ANY); igt_display_commit(display); return false; } /* create and set the primary plane fb */ mode = igt_output_get_mode(output); igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, 0.0, 0.0, 0.0, &data->primary_fb); primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY); igt_plane_set_fb(primary, &data->primary_fb); igt_display_commit(display); /* create the pipe_crc object for this pipe */ if (data->pipe_crc) igt_pipe_crc_free(data->pipe_crc); data->pipe_crc = igt_pipe_crc_new(data->pipe, INTEL_PIPE_CRC_SOURCE_AUTO); /* x/y position where the cursor is still fully visible */ data->left = 0; data->right = mode->hdisplay - cursor_w; data->top = 0; data->bottom = mode->vdisplay - cursor_h; data->screenw = mode->hdisplay; data->screenh = mode->vdisplay; data->curw = cursor_w; data->curh = cursor_h; data->refresh = mode->vrefresh; /* make sure cursor is disabled */ cursor_disable(data); igt_wait_for_vblank(data->drm_fd, data->pipe); /* get reference crc w/o cursor */ igt_pipe_crc_collect_crc(data->pipe_crc, &data->ref_crc); return true; }
static void do_single_test(data_t *data, int x, int y) { igt_display_t *display = &data->display; igt_pipe_crc_t *pipe_crc = data->pipe_crc; igt_crc_t crc, ref_crc; igt_plane_t *cursor; cairo_t *cr = igt_get_cairo_ctx(data->drm_fd, &data->primary_fb); igt_print_activity(); /* Hardware test */ igt_paint_test_pattern(cr, data->screenw, data->screenh); cursor_enable(data); cursor = igt_output_get_plane(data->output, IGT_PLANE_CURSOR); igt_plane_set_position(cursor, x, y); igt_display_commit(display); igt_wait_for_vblank(data->drm_fd, data->pipe); igt_pipe_crc_collect_crc(pipe_crc, &crc); if (data->flags & (TEST_DPMS | TEST_SUSPEND)) { igt_crc_t crc_after; if (data->flags & TEST_DPMS) { igt_debug("dpms off/on cycle\n"); kmstest_set_connector_dpms(data->drm_fd, data->output->config.connector, DRM_MODE_DPMS_OFF); kmstest_set_connector_dpms(data->drm_fd, data->output->config.connector, DRM_MODE_DPMS_ON); } if (data->flags & TEST_SUSPEND) igt_system_suspend_autoresume(); igt_pipe_crc_collect_crc(pipe_crc, &crc_after); igt_assert_crc_equal(&crc, &crc_after); } cursor_disable(data); igt_display_commit(display); /* Now render the same in software and collect crc */ draw_cursor(cr, x, y, data->curw, data->curh); igt_display_commit(display); igt_wait_for_vblank(data->drm_fd, data->pipe); igt_pipe_crc_collect_crc(pipe_crc, &ref_crc); /* Clear screen afterwards */ igt_assert_crc_equal(&crc, &ref_crc); igt_paint_color(cr, 0, 0, data->screenw, data->screenh, 0.0, 0.0, 0.0); }
static void commit_crtc(data_t *data, igt_output_t *output, igt_plane_t *plane) { igt_display_t *display = &data->display; enum igt_commit_style commit = COMMIT_LEGACY; igt_plane_t *primary; /* * With igt_display_commit2 and COMMIT_UNIVERSAL, we call just the * setplane without a modeset. So, to be able to call * igt_display_commit and ultimately setcrtc to do the first modeset, * we create an fb covering the crtc and call commit */ primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY); igt_plane_set_fb(primary, &data->fb_modeset); igt_display_commit(display); igt_plane_set_fb(plane, &data->fb); if (!plane->is_cursor) igt_plane_set_position(plane, data->pos_x, data->pos_y); if (plane->is_primary || plane->is_cursor) { igt_require(data->display.has_universal_planes); commit = COMMIT_UNIVERSAL; } igt_display_commit2(display, commit); }
static void cleanup_crtc(data_t *data, igt_output_t *output, igt_plane_t *plane) { igt_display_t *display = &data->display; igt_pipe_crc_free(data->pipe_crc); data->pipe_crc = NULL; igt_remove_fb(data->gfx_fd, &data->fb); igt_remove_fb(data->gfx_fd, &data->fb_modeset); if (data->fb_flip.fb_id) igt_remove_fb(data->gfx_fd, &data->fb_flip); /* XXX: see the note in prepare_crtc() */ if (!plane->is_primary) { igt_plane_t *primary; primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY); igt_plane_set_fb(primary, NULL); } igt_plane_set_fb(plane, NULL); igt_output_set_pipe(output, PIPE_ANY); igt_display_commit(display); }
static bool prepare_crtc(data_t *data) { igt_display_t *display = &data->display; igt_output_t *output = data->output; drmModeModeInfo *mode; /* select the pipe we want to use */ igt_output_set_pipe(output, data->pipe); igt_display_commit(display); if (!output->valid) { igt_output_set_pipe(output, PIPE_ANY); igt_display_commit(display); return false; } mode = igt_output_get_mode(output); /* create a white reference fb and flip to it */ igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, 1.0, 1.0, 1.0, &data->fb[0]); data->primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY); igt_plane_set_fb(data->primary, &data->fb[0]); igt_display_commit(display); if (data->pipe_crc) igt_pipe_crc_free(data->pipe_crc); data->pipe_crc = igt_pipe_crc_new(data->pipe, INTEL_PIPE_CRC_SOURCE_AUTO); /* get reference crc for the white fb */ igt_pipe_crc_collect_crc(data->pipe_crc, &data->ref_crc); return true; }
static void cleanup_crtc(data_t *data, igt_output_t *output) { igt_display_t *display = &data->display; igt_plane_t *primary; igt_pipe_crc_free(data->pipe_crc); data->pipe_crc = NULL; igt_remove_fb(data->drm_fd, &data->primary_fb); primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY); igt_plane_set_fb(primary, NULL); igt_output_set_pipe(output, PIPE_ANY); igt_display_commit(display); }
static void cleanup_crtc(data_t *data) { igt_display_t *display = &data->display; igt_output_t *output = data->output; igt_pipe_crc_free(data->pipe_crc); data->pipe_crc = NULL; igt_plane_set_fb(data->primary, NULL); igt_output_set_pipe(output, PIPE_ANY); igt_display_commit(display); igt_remove_fb(data->drm_fd, &data->fb[0]); igt_remove_fb(data->drm_fd, &data->fb[1]); }
static void do_fail_test(data_t *data, int x, int y, int expect) { igt_display_t *display = &data->display; igt_plane_t *cursor; cairo_t *cr = igt_get_cairo_ctx(data->drm_fd, &data->primary_fb); int ret; igt_print_activity(); /* Hardware test */ igt_paint_test_pattern(cr, data->screenw, data->screenh); cursor_enable(data); cursor = igt_output_get_plane(data->output, IGT_PLANE_CURSOR); igt_plane_set_position(cursor, x, y); ret = igt_display_try_commit2(display, COMMIT_LEGACY); igt_plane_set_position(cursor, 0, 0); cursor_disable(data); igt_display_commit(display); igt_assert_eq(ret, expect); }
static int test_read_crc_for_output(data_t *data, int pipe, igt_output_t *output, unsigned flags) { igt_display_t *display = &data->display; igt_plane_t *primary; drmModeModeInfo *mode; igt_pipe_crc_t *pipe_crc; igt_crc_t *crcs = NULL; int c, j; for (c = 0; c < ARRAY_SIZE(colors); c++) { char *crc_str; int n_crcs; igt_output_set_pipe(output, pipe); igt_display_commit(display); if (!output->valid) { igt_output_set_pipe(output, PIPE_ANY); return 0; } igt_debug("Clearing the fb with color (%.02lf,%.02lf,%.02lf)\n", colors[c].r, colors[c].g, colors[c].b); mode = igt_output_get_mode(output); igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, colors[c].r, colors[c].g, colors[c].b, &data->fb); primary = igt_output_get_plane(output, 0); igt_plane_set_fb(primary, &data->fb); igt_display_commit(display); if (flags & TEST_NONBLOCK) pipe_crc = igt_pipe_crc_new_nonblock(pipe, INTEL_PIPE_CRC_SOURCE_AUTO); else pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO); igt_pipe_crc_start(pipe_crc); /* wait for N_CRCS vblanks and the corresponding N_CRCS CRCs */ if (flags & TEST_NONBLOCK) { int i; for (i = 0; i < N_CRCS; i++) igt_wait_for_vblank(data->drm_fd, pipe); n_crcs = igt_pipe_crc_get_crcs(pipe_crc, N_CRCS * 3, &crcs); /* allow a one frame difference */ igt_assert_lte(n_crcs, N_CRCS + 1); igt_assert_lte(N_CRCS, n_crcs + 1); } else { n_crcs = igt_pipe_crc_get_crcs(pipe_crc, N_CRCS, &crcs); igt_assert_eq(n_crcs, N_CRCS); } igt_pipe_crc_stop(pipe_crc); /* * save the CRC in colors so it can be compared to the CRC of * other fbs */ colors[c].crc = crcs[0]; crc_str = igt_crc_to_string(&crcs[0]); igt_debug("CRC for this fb: %s\n", crc_str); free(crc_str); /* and ensure that they'are all equal, we haven't changed the fb */ for (j = 0; j < (n_crcs - 1); j++) igt_assert_crc_equal(&crcs[j], &crcs[j + 1]); if (flags & TEST_SEQUENCE) for (j = 0; j < (n_crcs - 1); j++) igt_assert_eq(crcs[j].frame + 1, crcs[j + 1].frame); free(crcs); igt_pipe_crc_free(pipe_crc); igt_remove_fb(data->drm_fd, &data->fb); igt_plane_set_fb(primary, NULL); igt_output_set_pipe(output, PIPE_ANY); } return 1; }
static void test(data_t *data) { igt_display_t *display = &data->display; igt_output_t *output = data->output; struct igt_fb *fb = &data->fb[1]; drmModeModeInfo *mode; cairo_t *cr; char *ptr; uint32_t caching; void *buf; igt_crc_t crc; mode = igt_output_get_mode(output); /* create a non-white fb where we can write later */ igt_create_fb(data->drm_fd, mode->hdisplay, mode->vdisplay, DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, fb); ptr = dmabuf_mmap_framebuffer(data->drm_fd, fb); cr = igt_get_cairo_ctx(data->drm_fd, fb); igt_paint_test_pattern(cr, fb->width, fb->height); cairo_destroy(cr); /* flip to it to make it UC/WC and fully flushed */ igt_plane_set_fb(data->primary, fb); igt_display_commit(display); /* flip back the original white buffer */ igt_plane_set_fb(data->primary, &data->fb[0]); igt_display_commit(display); /* make sure caching mode has become UC/WT */ caching = gem_get_caching(data->drm_fd, fb->gem_handle); igt_assert(caching == I915_CACHING_NONE || caching == I915_CACHING_DISPLAY); /* * firstly demonstrate the need for DMA_BUF_SYNC_START ("begin_cpu_access") */ if (ioctl_sync) prime_sync_start(dma_buf_fd); /* use dmabuf pointer to make the other fb all white too */ buf = malloc(fb->size); igt_assert(buf != NULL); memset(buf, 0xff, fb->size); memcpy(ptr, buf, fb->size); free(buf); /* and flip to it */ igt_plane_set_fb(data->primary, fb); igt_display_commit(display); /* check that the crc is as expected, which requires that caches got flushed */ igt_pipe_crc_collect_crc(data->pipe_crc, &crc); igt_assert_crc_equal(&crc, &data->ref_crc); /* * now demonstrates the need for DMA_BUF_SYNC_END ("end_cpu_access") */ /* start over, writing non-white to the fb again and flip to it to make it * fully flushed */ cr = igt_get_cairo_ctx(data->drm_fd, fb); igt_paint_test_pattern(cr, fb->width, fb->height); cairo_destroy(cr); igt_plane_set_fb(data->primary, fb); igt_display_commit(display); /* sync start, to move to CPU domain */ if (ioctl_sync) prime_sync_start(dma_buf_fd); /* use dmabuf pointer in the same fb to make it all white */ buf = malloc(fb->size); igt_assert(buf != NULL); memset(buf, 0xff, fb->size); memcpy(ptr, buf, fb->size); free(buf); /* if we don't change to the GTT domain again, the whites won't get flushed * and therefore we demonstrates the need for sync end here */ if (ioctl_sync) prime_sync_end(dma_buf_fd); /* check that the crc is as expected, which requires that caches got flushed */ igt_pipe_crc_collect_crc(data->pipe_crc, &crc); igt_assert_crc_equal(&crc, &data->ref_crc); }