static int att7022_spi_write_reg_24(struct device *dev,
u16 reg_address,
u32 value)
{
int ret;
struct spi_message msg;
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct att7022_state *st = iio_dev_get_devdata(indio_dev);
struct spi_transfer xfer = {
.tx_buf = st->tx,
.bits_per_word = 8,
.len = 4,
// .delay_usecs = 0,
};
mutex_lock(&st->buf_lock);
st->tx[0] = ATT7022_WRITE_REG | reg_address;
st->tx[1] = (value >> 16) & 0xFF;
st->tx[2] = (value >> 8) & 0xFF;
st->tx[3] = value & 0xFF;
spi_message_init(&msg);
spi_message_add_tail(&xfer, &msg);
ret = spi_sync(st->spi, &msg);
mutex_unlock(&st->buf_lock);
return ret;
}
static int att7022_spi_read_reg_24(struct device *dev,
u16 reg_address,
u32 *val)
{
struct spi_message msg;
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct att7022_state *st = iio_dev_get_devdata(indio_dev);
int ret;
struct spi_transfer xfers[] = {
{
.tx_buf = st->tx,
.bits_per_word = 8,
.len = 1,
// .delay_usecs = 0,
}, {
.rx_buf = st->rx,
.bits_per_word = 8,
.len = 3,
// .delay_usecs = 0,
}
};
static int adis16130_spi_read(struct device *dev, u8 reg_addr,
u32 *val)
{
int ret;
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct adis16130_state *st = iio_dev_get_devdata(indio_dev);
mutex_lock(&st->buf_lock);
st->buf[0] = ADIS16130_CON_RD | reg_addr;
if (st->mode)
ret = spi_read(st->us, st->buf, 4);
else
ret = spi_read(st->us, st->buf, 3);
if (ret == 0) {
if (st->mode)
*val = (st->buf[1] << 16) |
(st->buf[2] << 8) |
st->buf[3];
else
*val = (st->buf[1] << 8) | st->buf[2];
}
mutex_unlock(&st->buf_lock);
return ret;
}
static int ade7854_set_irq(struct device *dev, bool enable)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct ade7854_state *st = iio_dev_get_devdata(indio_dev);
int ret;
u32 irqen;
ret = st->read_reg_32(dev, ADE7854_MASK0, &irqen);
if (ret)
goto error_ret;
if (enable)
irqen |= 1 << 17; /* 1: interrupt enabled when all periodical
(at 8 kHz rate) DSP computations finish. */
else
irqen &= ~(1 << 17);
ret = st->write_reg_32(dev, ADE7854_MASK0, irqen);
if (ret)
goto error_ret;
error_ret:
return ret;
}
static ssize_t ad5624r_write_dac_powerdown(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t len)
{
long readin;
int ret;
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct ad5624r_state *st = iio_dev_get_devdata(indio_dev);
struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
ret = strict_strtol(buf, 10, &readin);
if (ret)
return ret;
if (readin == 1)
st->pwr_down_mask |= (1 << this_attr->address);
else if (!readin)
st->pwr_down_mask &= ~(1 << this_attr->address);
else
ret = -EINVAL;
ret = ad5624r_spi_write(st->us, AD5624R_CMD_POWERDOWN_DAC, 0,
(st->pwr_down_mode << 4) |
st->pwr_down_mask, 16);
return ret ? ret : len;
}
static irqreturn_t adis16260_trigger_handler(int irq, void *p)
{
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->private_data;
struct adis16260_state *st = iio_dev_get_devdata(indio_dev);
struct iio_ring_buffer *ring = indio_dev->ring;
int i = 0;
s16 *data;
size_t datasize = ring->access->get_bytes_per_datum(ring);
data = kmalloc(datasize , GFP_KERNEL);
if (data == NULL) {
dev_err(&st->us->dev, "memory alloc failed in ring bh");
return -ENOMEM;
}
if (ring->scan_count &&
adis16260_read_ring_data(&st->indio_dev->dev, st->rx) >= 0)
for (; i < ring->scan_count; i++)
data[i] = be16_to_cpup((__be16 *)&(st->rx[i*2]));
/* Guaranteed to be aligned with 8 byte boundary */
if (ring->scan_timestamp)
*((s64 *)(data + ((i + 3)/4)*4)) = pf->timestamp;
ring->access->store_to(ring, (u8 *)data, pf->timestamp);
iio_trigger_notify_done(st->indio_dev->trig);
kfree(data);
return IRQ_HANDLED;
}
static mode_t ad7606_attr_is_visible(struct kobject *kobj,
struct attribute *attr, int n)
{
struct device *dev = container_of(kobj, struct device, kobj);
struct iio_dev *dev_info = dev_get_drvdata(dev);
struct ad7606_state *st = iio_dev_get_devdata(dev_info);
mode_t mode = attr->mode;
if (st->chip_info->num_channels <= 6 &&
(attr == &iio_dev_attr_in7_raw.dev_attr.attr ||
attr == &iio_dev_attr_in6_raw.dev_attr.attr))
mode = 0;
else if (st->chip_info->num_channels <= 4 &&
(attr == &iio_dev_attr_in5_raw.dev_attr.attr ||
attr == &iio_dev_attr_in4_raw.dev_attr.attr))
mode = 0;
else if (!st->have_os &&
(attr == &iio_dev_attr_oversampling_ratio.dev_attr.attr ||
attr ==
&iio_const_attr_oversampling_ratio_available.dev_attr.attr))
mode = 0;
else if (!st->have_range &&
(attr == &iio_dev_attr_range.dev_attr.attr ||
attr == &iio_const_attr_range_available.dev_attr.attr))
mode = 0;
return mode;
}
static ssize_t ad7606_store_oversampling_ratio(struct device *dev,
struct device_attribute *attr, const char *buf, size_t count)
{
struct iio_dev *dev_info = dev_get_drvdata(dev);
struct ad7606_state *st = iio_dev_get_devdata(dev_info);
unsigned long lval;
int ret;
if (strict_strtoul(buf, 10, &lval))
return -EINVAL;
ret = ad7606_oversampling_get_index(lval);
if (ret < 0) {
dev_err(dev, "oversampling %lu is not supported\n", lval);
return ret;
}
mutex_lock(&dev_info->mlock);
gpio_set_value(st->pdata->gpio_os0, (ret >> 0) & 1);
gpio_set_value(st->pdata->gpio_os1, (ret >> 1) & 1);
gpio_set_value(st->pdata->gpio_os1, (ret >> 2) & 1);
st->oversampling = lval;
mutex_unlock(&dev_info->mlock);
return count;
}
/**
* adis16201_read_ring_data() read data registers which will be placed into ring
* @dev: device associated with child of actual device (iio_dev or iio_trig)
* @rx: somewhere to pass back the value read
**/
static int adis16201_read_ring_data(struct iio_dev *indio_dev, u8 *rx)
{
struct spi_message msg;
struct adis16201_state *st = iio_dev_get_devdata(indio_dev);
struct spi_transfer xfers[ADIS16201_OUTPUTS + 1];
int ret;
int i;
mutex_lock(&st->buf_lock);
spi_message_init(&msg);
memset(xfers, 0, sizeof(xfers));
for (i = 0; i <= ADIS16201_OUTPUTS; i++) {
xfers[i].bits_per_word = 8;
xfers[i].cs_change = 1;
xfers[i].len = 2;
xfers[i].delay_usecs = 20;
xfers[i].tx_buf = st->tx + 2 * i;
st->tx[2 * i] = ADIS16201_READ_REG(ADIS16201_SUPPLY_OUT +
2 * i);
st->tx[2 * i + 1] = 0;
if (i >= 1)
xfers[i].rx_buf = rx + 2 * (i - 1);
spi_message_add_tail(&xfers[i], &msg);
}
ret = spi_sync(st->us, &msg);
if (ret)
dev_err(&st->us->dev, "problem when burst reading");
mutex_unlock(&st->buf_lock);
return ret;
}
static ssize_t ad7606_show_oversampling_ratio(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct iio_dev *dev_info = dev_get_drvdata(dev);
struct ad7606_state *st = iio_dev_get_devdata(dev_info);
return sprintf(buf, "%u\n", st->oversampling);
}
static ssize_t ad7606_show_name(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct iio_dev *dev_info = dev_get_drvdata(dev);
struct ad7606_state *st = iio_dev_get_devdata(dev_info);
return sprintf(buf, "%s\n", st->chip_info->name);
}
static ssize_t ad5624r_read_powerdown_mode(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct ad5624r_state *st = iio_dev_get_devdata(indio_dev);
char mode[][15] = {"", "1kohm_to_gnd", "100kohm_to_gnd", "three_state"};
return sprintf(buf, "%s\n", mode[st->pwr_down_mode]);
}
static ssize_t ad5624r_read_dac_powerdown(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct ad5624r_state *st = iio_dev_get_devdata(indio_dev);
struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
return sprintf(buf, "%d\n",
!!(st->pwr_down_mask & (1 << this_attr->address)));
}
static int ade7854_reset(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct ade7854_state *st = iio_dev_get_devdata(indio_dev);
u16 val;
st->read_reg_16(dev, ADE7854_CONFIG, &val);
val |= 1 << 7; /* Software Chip Reset */
return st->write_reg_16(dev, ADE7854_CONFIG, val);
}
static ssize_t ad7606_show_scale(struct device *dev,
struct device_attribute *attr,
char *buf)
{
/* Driver currently only support internal vref */
struct iio_dev *dev_info = dev_get_drvdata(dev);
struct ad7606_state *st = iio_dev_get_devdata(dev_info);
unsigned int scale_uv = (st->range * 1000 * 2) >> st->chip_info->bits;
return sprintf(buf, "%d.%03d\n", scale_uv / 1000, scale_uv % 1000);
}
static ssize_t max517_show_scale(struct device *dev,
struct device_attribute *attr,
char *buf, int channel)
{
struct iio_dev *dev_info = dev_get_drvdata(dev);
struct max517_data *data = iio_dev_get_devdata(dev_info);
/* Corresponds to Vref / 2^(bits) */
unsigned int scale_uv = (data->vref_mv[channel - 1] * 1000) >> 8;
return sprintf(buf, "%d.%03d\n", scale_uv / 1000, scale_uv % 1000);
}
static ssize_t ad5624r_show_scale(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct ad5624r_state *st = iio_dev_get_devdata(indio_dev);
/* Corresponds to Vref / 2^(bits) */
unsigned int scale_uv = (st->vref_mv * 1000) >> st->chip_info->bits;
return sprintf(buf, "%d.%03d\n", scale_uv / 1000, scale_uv % 1000);
}
static ssize_t adis16130_bitsmode_read(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct adis16130_state *st = iio_dev_get_devdata(indio_dev);
if (st->mode == 1)
return sprintf(buf, "s24\n");
else
return sprintf(buf, "s16\n");
}
static ssize_t ad7887_show_scale(struct device *dev,
struct device_attribute *attr,
char *buf)
{
/* Driver currently only support internal vref */
struct iio_dev *dev_info = dev_get_drvdata(dev);
struct ad7887_state *st = iio_dev_get_devdata(dev_info);
/* Corresponds to Vref / 2^(bits) */
unsigned int scale_uv = (st->int_vref_mv * 1000) >> st->chip_info->bits;
return sprintf(buf, "%d.%d\n", scale_uv / 1000, scale_uv % 1000);
}
/**
* adis16400_poll_func_th() top half interrupt handler called by trigger
* @private_data: iio_dev
**/
static void adis16400_poll_func_th(struct iio_dev *indio_dev, s64 time)
{
struct adis16400_state *st = iio_dev_get_devdata(indio_dev);
st->last_timestamp = time;
schedule_work(&st->work_trigger_to_ring);
/* Indicate that this interrupt is being handled */
/* Technically this is trigger related, but without this
* handler running there is currently no way for the interrupt
* to clear.
*/
}
/**
* adis16240_data_rdy_trig_poll() the event handler for the data rdy trig
**/
static int adis16240_data_rdy_trig_poll(struct iio_dev *dev_info,
int index,
s64 timestamp,
int no_test)
{
struct adis16240_state *st = iio_dev_get_devdata(dev_info);
struct iio_trigger *trig = st->trig;
iio_trigger_poll(trig, timestamp);
return IRQ_HANDLED;
}
static void lis3l02dq_poll_func_th(struct iio_dev *indio_dev)
{
struct lis3l02dq_state *st = iio_dev_get_devdata(indio_dev);
st->last_timestamp = indio_dev->trig->timestamp;
schedule_work(&st->work_trigger_to_ring);
/* Indicate that this interrupt is being handled */
/* Technically this is trigger related, but without this
* handler running there is currently now way for the interrupt
* to clear.
*/
st->inter = 1;
}
/**
* lis3l02dq_data_rdy_trig_poll() the event handler for the data rdy trig
**/
static int lis3l02dq_data_rdy_trig_poll(struct iio_dev *indio_dev,
int index,
s64 timestamp,
int no_test)
{
struct iio_sw_ring_helper_state *h
= iio_dev_get_devdata(indio_dev);
struct lis3l02dq_state *st = lis3l02dq_h_to_s(h);
iio_trigger_poll(st->trig, timestamp);
return IRQ_HANDLED;
}
static int lis3l02dq_data_rdy_trig_poll(struct iio_dev *dev_info,
int index,
s64 timestamp,
int no_test)
{
struct lis3l02dq_state *st = iio_dev_get_devdata(dev_info);
struct iio_trigger *trig = st->trig;
trig->timestamp = timestamp;
iio_trigger_poll(trig);
return IRQ_HANDLED;
}
static ssize_t optical_sysfs_scale_avail(struct device *dev,
struct device_attribute *attr, char *buf)
{
int len = 0;
// struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct iio_dev *indio_dev = iio_dev_get_devdata((struct iio_dev*)dev);
printk (KERN_ALERT "[%s]\n", __FUNCTION__);
mutex_lock(&indio_dev->mlock);
len += scnprintf(buf + len, PAGE_SIZE - len, "0.%06u ",1234);//invalid number for test
mutex_unlock(&indio_dev->mlock);
buf[len - 1] = '\n';
return len;
}
static mode_t ad7887_attr_is_visible(struct kobject *kobj,
struct attribute *attr, int n)
{
struct device *dev = container_of(kobj, struct device, kobj);
struct iio_dev *dev_info = dev_get_drvdata(dev);
struct ad7887_state *st = iio_dev_get_devdata(dev_info);
mode_t mode = attr->mode;
if ((attr == &iio_dev_attr_in1_raw.dev_attr.attr) && !st->en_dual)
mode = 0;
return mode;
}
/**
* lis3l02dq_poll_func_th() top half interrupt handler called by trigger
* @private_data: iio_dev
**/
static void lis3l02dq_poll_func_th(struct iio_dev *indio_dev, s64 time)
{
struct iio_sw_ring_helper_state *h
= iio_dev_get_devdata(indio_dev);
struct lis3l02dq_state *st = lis3l02dq_h_to_s(h);
/* in this case we need to slightly extend the helper function */
iio_sw_poll_func_th(indio_dev, time);
/* Indicate that this interrupt is being handled */
/* Technically this is trigger related, but without this
* handler running there is currently now way for the interrupt
* to clear.
*/
st->inter = 1;
}
/**
* adis16400_spi_read_burst() - read all data registers
* @dev: device associated with child of actual device (iio_dev or iio_trig)
* @rx: somewhere to pass back the value read (min size is 24 bytes)
**/
static int adis16400_spi_read_burst(struct device *dev, u8 *rx)
{
struct spi_message msg;
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct adis16400_state *st = iio_dev_get_devdata(indio_dev);
u32 old_speed_hz = st->us->max_speed_hz;
int ret;
struct spi_transfer xfers[] = {
{
.tx_buf = st->tx,
.bits_per_word = 8,
.len = 2,
}, {
.rx_buf = rx,
/**
* adis16260_spi_write_reg_16() - write 2 bytes to a pair of registers
* @indio_dev: iio_dev for the device
* @reg_address: the address of the lower of the two registers. Second register
* is assumed to have address one greater.
* @val: value to be written
**/
static int adis16260_spi_write_reg_16(struct iio_dev *indio_dev,
u8 lower_reg_address,
u16 value)
{
int ret;
struct spi_message msg;
struct adis16260_state *st = iio_dev_get_devdata(indio_dev);
struct spi_transfer xfers[] = {
{
.tx_buf = st->tx,
.bits_per_word = 8,
.len = 2,
.cs_change = 1,
.delay_usecs = 20,
}, {
.tx_buf = st->tx + 2,
/**
* adis16260_spi_write_reg_8() - write single byte to a register
* @indio_dev: iio_dev for the device
* @reg_address: the address of the register to be written
* @val: the value to write
**/
static int adis16260_spi_write_reg_8(struct iio_dev *indio_dev,
u8 reg_address,
u8 val)
{
int ret;
struct adis16260_state *st = iio_dev_get_devdata(indio_dev);
mutex_lock(&st->buf_lock);
st->tx[0] = ADIS16260_WRITE_REG(reg_address);
st->tx[1] = val;
ret = spi_write(st->us, st->tx, 2);
mutex_unlock(&st->buf_lock);
return ret;
}
static ssize_t ade7854_read_32bit(struct device *dev,
struct device_attribute *attr,
char *buf)
{
int ret;
u32 val = 0;
struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct ade7854_state *st = iio_dev_get_devdata(indio_dev);
ret = st->read_reg_32(dev, this_attr->address, &val);
if (ret)
return ret;
return sprintf(buf, "%u\n", val);
}
