void
ilo_blitter_rectlist_resolve_hiz(struct ilo_blitter *blitter,
struct pipe_resource *res,
unsigned level, unsigned slice)
{
struct ilo_texture *tex = ilo_texture(res);
struct pipe_depth_stencil_alpha_state dsa_state;
if (!ilo_image_can_enable_aux(&tex->image, level))
return;
/*
* From the Sandy Bridge PRM, volume 2 part 1, page 315:
*
* "(Hierarchical Depth Buffer Resolve) Depth Test Enable must be
* disabled. Depth Buffer Write Enable must be enabled. Stencil Test
* Enable and Stencil Buffer Write Enable must be disabled."
*/
memset(&dsa_state, 0, sizeof(dsa_state));
dsa_state.depth.writemask = true;
ilo_blitter_set_invariants(blitter);
ilo_blitter_set_op(blitter, ILO_BLITTER_RECTLIST_RESOLVE_HIZ);
ilo_blitter_set_dsa(blitter, &dsa_state);
ilo_blitter_set_fb_from_resource(blitter, res, res->format, level, slice);
ilo_blitter_set_uses(blitter,
ILO_BLITTER_USE_DSA | ILO_BLITTER_USE_FB_DEPTH);
hiz_emit_rectlist(blitter);
}
void
ilo_blitter_rectlist_resolve_z(struct ilo_blitter *blitter,
struct pipe_resource *res,
unsigned level, unsigned slice)
{
struct ilo_texture *tex = ilo_texture(res);
struct pipe_depth_stencil_alpha_state dsa_state;
const struct ilo_texture_slice *s =
ilo_texture_get_slice(tex, level, slice);
if (!ilo_image_can_enable_aux(&tex->image, level))
return;
/*
* From the Sandy Bridge PRM, volume 2 part 1, page 314:
*
* "Depth Test Enable must be enabled with the Depth Test Function set
* to NEVER. Depth Buffer Write Enable must be enabled. Stencil Test
* Enable and Stencil Buffer Write Enable must be disabled."
*/
memset(&dsa_state, 0, sizeof(dsa_state));
dsa_state.depth.writemask = true;
dsa_state.depth.enabled = true;
dsa_state.depth.func = PIPE_FUNC_NEVER;
ilo_blitter_set_invariants(blitter);
ilo_blitter_set_op(blitter, ILO_BLITTER_RECTLIST_RESOLVE_Z);
ilo_blitter_set_dsa(blitter, &dsa_state);
ilo_blitter_set_clear_values(blitter, s->clear_value, 0);
ilo_blitter_set_fb_from_resource(blitter, res, res->format, level, slice);
ilo_blitter_set_uses(blitter,
ILO_BLITTER_USE_DSA | ILO_BLITTER_USE_FB_DEPTH);
hiz_emit_rectlist(blitter);
}
static bool
surface_validate_gen6_image(const struct ilo_dev *dev,
const struct ilo_state_surface_image_info *info)
{
ILO_DEV_ASSERT(dev, 6, 8);
switch (info->access) {
case ILO_STATE_SURFACE_ACCESS_SAMPLER:
case ILO_STATE_SURFACE_ACCESS_DP_RENDER:
break;
case ILO_STATE_SURFACE_ACCESS_DP_TYPED:
assert(ilo_dev_gen(dev) >= ILO_GEN(7));
break;
default:
assert(!"unsupported surface access");
break;
}
assert(info->img && info->vma);
if (info->img->tiling != GEN6_TILING_NONE)
assert(info->vma->vm_alignment % 4096 == 0);
if (info->aux_vma) {
assert(ilo_image_can_enable_aux(info->img, info->level_base));
/* always tiled */
assert(info->aux_vma->vm_alignment % 4096 == 0);
}
/*
* From the Sandy Bridge PRM, volume 4 part 1, page 78:
*
* "For surface types other than SURFTYPE_BUFFER, the Width specified
* by this field must be less than or equal to the surface pitch
* (specified in bytes via the Surface Pitch field)."
*/
assert(info->img->bo_stride && info->img->bo_stride <= 512 * 1024 &&
info->img->width0 <= info->img->bo_stride);
if (info->type != info->img->type) {
assert(info->type == GEN6_SURFTYPE_2D &&
info->img->type == GEN6_SURFTYPE_CUBE);
}
/*
* From the Sandy Bridge PRM, volume 4 part 1, page 78:
*
* "For cube maps, Width must be set equal to the Height."
*/
if (info->type == GEN6_SURFTYPE_CUBE)
assert(info->img->width0 == info->img->height0);
/*
* From the Sandy Bridge PRM, volume 4 part 1, page 72:
*
* "Tile Walk TILEWALK_YMAJOR is UNDEFINED for render target formats
* that have 128 bits-per-element (BPE)."
*
* "If Number of Multisamples is set to a value other than
* MULTISAMPLECOUNT_1, this field cannot be set to the following
* formats:
*
* - any format with greater than 64 bits per element
* - any compressed texture format (BC*)
* - any YCRCB* format"
*
* From the Ivy Bridge PRM, volume 4 part 1, page 63:
*
* If Number of Multisamples is set to a value other than
* MULTISAMPLECOUNT_1, this field cannot be set to the following
* formats: any format with greater than 64 bits per element, if
* Number of Multisamples is MULTISAMPLECOUNT_8, any compressed
* texture format (BC*), and any YCRCB* format.
*
* TODO
*/
if (ilo_dev_gen(dev) < ILO_GEN(8) && info->img->tiling == GEN8_TILING_W) {
ilo_warn("tiling W is not supported\n");
return false;
}
return true;
}
void
ilo_blit_resolve_slices_for_hiz(struct ilo_context *ilo,
struct pipe_resource *res, unsigned level,
unsigned first_slice, unsigned num_slices,
unsigned resolve_flags)
{
struct ilo_texture *tex = ilo_texture(res);
const unsigned any_reader =
ILO_TEXTURE_RENDER_READ |
ILO_TEXTURE_BLT_READ |
ILO_TEXTURE_CPU_READ;
const unsigned other_writers =
ILO_TEXTURE_BLT_WRITE |
ILO_TEXTURE_CPU_WRITE;
unsigned i;
assert(tex->base.target != PIPE_BUFFER &&
ilo_image_can_enable_aux(&tex->image, level));
if (resolve_flags & ILO_TEXTURE_RENDER_WRITE) {
/*
* When ILO_TEXTURE_RENDER_WRITE is set, there can be no reader. We
* need to perform a HiZ Buffer Resolve in case the resource was
* previously written by another writer, unless this is a clear.
*
* When slices have different clear values, we perform a Depth Buffer
* Resolve on all slices not sharing the clear value of the first slice.
* After resolving, those slices do not use 3DSTATE_CLEAR_PARAMS and can
* be made to have the same clear value as the first slice does. This
* way,
*
* - 3DSTATE_CLEAR_PARAMS can be set to the clear value of any slice
* - we will not resolve unnecessarily next time this function is
* called
*
* Since slice clear value is the value the slice is cleared to when
* ILO_TEXTURE_CLEAR is set, the bit needs to be unset.
*/
assert(!(resolve_flags & (other_writers | any_reader)));
if (!(resolve_flags & ILO_TEXTURE_CLEAR)) {
const uint32_t first_clear_value = ilo_texture_get_slice(tex,
level, first_slice)->clear_value;
bool set_clear_value = false;
for (i = 0; i < num_slices; i++) {
const struct ilo_texture_slice *slice =
ilo_texture_get_slice(tex, level, first_slice + i);
if (slice->flags & other_writers) {
ilo_blitter_rectlist_resolve_hiz(ilo->blitter,
res, level, first_slice + i);
} else if (slice->clear_value != first_clear_value &&
(slice->flags & ILO_TEXTURE_RENDER_WRITE)) {
ilo_blitter_rectlist_resolve_z(ilo->blitter,
res, level, first_slice + i);
set_clear_value = true;
}
}
if (set_clear_value) {
/* ILO_TEXTURE_CLEAR will be cleared later */
ilo_texture_set_slice_clear_value(tex, level,
first_slice, num_slices, first_clear_value);
}
}
}
else if ((resolve_flags & any_reader) ||
((resolve_flags & other_writers) &&
!(resolve_flags & ILO_TEXTURE_CLEAR))) {
/*
* When there is at least a reader or writer, we need to perform a
* Depth Buffer Resolve in case the resource was previously written
* by ILO_TEXTURE_RENDER_WRITE.
*/
for (i = 0; i < num_slices; i++) {
const struct ilo_texture_slice *slice =
ilo_texture_get_slice(tex, level, first_slice + i);
if (slice->flags & ILO_TEXTURE_RENDER_WRITE) {
ilo_blitter_rectlist_resolve_z(ilo->blitter,
&tex->base, level, first_slice + i);
}
}
}
}
bool
ilo_blitter_rectlist_clear_zs(struct ilo_blitter *blitter,
struct pipe_surface *zs,
unsigned clear_flags,
double depth, unsigned stencil)
{
struct ilo_texture *tex = ilo_texture(zs->texture);
struct pipe_depth_stencil_alpha_state dsa_state;
uint32_t uses, clear_value;
if (!ilo_image_can_enable_aux(&tex->image, zs->u.tex.level))
return false;
if (!hiz_can_clear_zs(blitter, tex))
return false;
if (ilo_dev_gen(blitter->ilo->dev) >= ILO_GEN(8))
clear_value = fui(depth);
else
clear_value = util_pack_z(tex->image.format, depth);
ilo_blit_resolve_surface(blitter->ilo, zs,
ILO_TEXTURE_RENDER_WRITE | ILO_TEXTURE_CLEAR);
ilo_texture_set_slice_clear_value(tex, zs->u.tex.level,
zs->u.tex.first_layer,
zs->u.tex.last_layer - zs->u.tex.first_layer + 1,
clear_value);
/*
* From the Sandy Bridge PRM, volume 2 part 1, page 313-314:
*
* "- Depth Test Enable must be disabled and Depth Buffer Write Enable
* must be enabled (if depth is being cleared).
*
* - Stencil buffer clear can be performed at the same time by
* enabling Stencil Buffer Write Enable. Stencil Test Enable must
* be enabled and Stencil Pass Depth Pass Op set to REPLACE, and the
* clear value that is placed in the stencil buffer is the Stencil
* Reference Value from COLOR_CALC_STATE.
*
* - Note also that stencil buffer clear can be performed without
* depth buffer clear. For stencil only clear, Depth Test Enable and
* Depth Buffer Write Enable must be disabled.
*
* - [DevSNB] errata: For stencil buffer only clear, the previous
* depth clear value must be delivered during the clear."
*/
memset(&dsa_state, 0, sizeof(dsa_state));
if (clear_flags & PIPE_CLEAR_DEPTH)
dsa_state.depth.writemask = true;
if (clear_flags & PIPE_CLEAR_STENCIL) {
dsa_state.stencil[0].enabled = true;
dsa_state.stencil[0].func = PIPE_FUNC_ALWAYS;
dsa_state.stencil[0].fail_op = PIPE_STENCIL_OP_KEEP;
dsa_state.stencil[0].zpass_op = PIPE_STENCIL_OP_REPLACE;
dsa_state.stencil[0].zfail_op = PIPE_STENCIL_OP_KEEP;
/*
* From the Ivy Bridge PRM, volume 2 part 1, page 277:
*
* "Additionally the following must be set to the correct values.
*
* - DEPTH_STENCIL_STATE::Stencil Write Mask must be 0xFF
* - DEPTH_STENCIL_STATE::Stencil Test Mask must be 0xFF
* - DEPTH_STENCIL_STATE::Back Face Stencil Write Mask must be 0xFF
* - DEPTH_STENCIL_STATE::Back Face Stencil Test Mask must be 0xFF"
*/
dsa_state.stencil[0].valuemask = 0xff;
dsa_state.stencil[0].writemask = 0xff;
dsa_state.stencil[1].valuemask = 0xff;
dsa_state.stencil[1].writemask = 0xff;
}
ilo_blitter_set_invariants(blitter);
ilo_blitter_set_op(blitter, ILO_BLITTER_RECTLIST_CLEAR_ZS);
ilo_blitter_set_dsa(blitter, &dsa_state);
ilo_blitter_set_clear_values(blitter, clear_value, (ubyte) stencil);
ilo_blitter_set_fb_from_surface(blitter, zs);
uses = ILO_BLITTER_USE_DSA;
if (clear_flags & PIPE_CLEAR_DEPTH)
uses |= ILO_BLITTER_USE_VIEWPORT | ILO_BLITTER_USE_FB_DEPTH;
if (clear_flags & PIPE_CLEAR_STENCIL)
uses |= ILO_BLITTER_USE_CC | ILO_BLITTER_USE_FB_STENCIL;
ilo_blitter_set_uses(blitter, uses);
hiz_emit_rectlist(blitter);
return true;
}
