static __init void wand_init_pm(void) {
enable_wait_mode = false;
imx6q_add_anatop_thermal_imx(1, &wand_thermal);
imx6_add_armpmu();
imx6q_add_pm_imx(0, &wand_pm_data);
imx6q_add_dvfs_core(&wand_dvfscore_data);
imx6q_add_busfreq();
imx6q_add_imx2_wdt(0, NULL);
}
/*!
* Board specific initialization.
*/
static void __init mx6_sabresd_board_init(void)
{
int i;
struct clk *clko, *clko2;
struct clk *new_parent;
int rate;
if (cpu_is_mx6q())
mxc_iomux_v3_setup_multiple_pads(mx6q_sabresd_pads,
ARRAY_SIZE(mx6q_sabresd_pads));
else if (cpu_is_mx6dl()) {
mxc_iomux_v3_setup_multiple_pads(mx6dl_sabresd_pads,
ARRAY_SIZE(mx6dl_sabresd_pads));
}
dsa2lb_init();
#ifdef CONFIG_FEC_1588
/* Set GPIO_16 input for IEEE-1588 ts_clk and RMII reference clock
* For MX6 GPR1 bit21 meaning:
* Bit21: 0 - GPIO_16 pad output
* 1 - GPIO_16 pad input
*/
mxc_iomux_set_gpr_register(1, 21, 1, 1);
#endif
gp_reg_id = sabresd_dvfscore_data.reg_id;
soc_reg_id = sabresd_dvfscore_data.soc_id;
mx6q_sabresd_init_uart();
imx6x_add_ram_console();
/*
* MX6DL/Solo only supports single IPU
* The following codes are used to change ipu id
* and display id information for MX6DL/Solo. Then
* register 1 IPU device and up to 2 displays for
* MX6DL/Solo
*/
if (cpu_is_mx6dl()) {
/* [Walker Chen], 2014/01/08 - modified for dual display mode
mx6dl only have one ipu
ipu0:disp0 for HDMI
ipu0:disp1 for LVDS
*/
ldb_data.ipu_id = 0;
ldb_data.disp_id = 1;
hdmi_core_data.ipu_id = 0;
hdmi_core_data.disp_id = 0;
//mipi_dsi_pdata.ipu_id = 0;
//mipi_dsi_pdata.disp_id = 1;
ldb_data.sec_ipu_id = 0;
ldb_data.sec_disp_id = 0;
}
imx6q_add_mxc_hdmi_core(&hdmi_core_data);
imx6q_add_ipuv3(0, &ipu_data[0]);
if (cpu_is_mx6q()) {
imx6q_add_ipuv3(1, &ipu_data[1]);
for (i = 0; i < 4 && i < ARRAY_SIZE(sabresd_fb_data); i++)
imx6q_add_ipuv3fb(i, &sabresd_fb_data[i]);
} else
for (i = 0; i < 2 && i < ARRAY_SIZE(sabresd_fb_data); i++)
imx6q_add_ipuv3fb(i, &sabresd_fb_data[i]);
imx6q_add_vdoa();
//imx6q_add_mipi_dsi(&mipi_dsi_pdata);
imx6q_add_lcdif(&lcdif_data);
imx6q_add_ldb(&ldb_data);
imx6q_add_v4l2_output(0);
//imx6q_add_v4l2_capture(0, &capture_data[0]);
//imx6q_add_v4l2_capture(1, &capture_data[1]);
//imx6q_add_imx_snvs_rtc();
if (1 == caam_enabled)
imx6q_add_imx_caam();
strcpy(mxc_i2c0_board_info[0].type, "wm8962");
mxc_i2c0_board_info[0].platform_data = &wm8962_config_data;
imx6q_add_device_gpio_leds();
imx6q_add_imx_i2c(0, &mx6q_sabresd_i2c_data);
imx6q_add_imx_i2c(1, &mx6q_sabresd_i2c_data);
imx6q_add_imx_i2c(2, &mx6q_sabresd_i2c_data);
i2c_register_board_info(0, mxc_i2c0_board_info,
ARRAY_SIZE(mxc_i2c0_board_info));
i2c_register_board_info(1, mxc_i2c1_board_info,
ARRAY_SIZE(mxc_i2c1_board_info));
//i2c_register_board_info(2, mxc_i2c2_board_info,
// ARRAY_SIZE(mxc_i2c2_board_info));
mx6q_dsa2lb_init_wm8326();
/* spdif */
mxc_spdif_data.spdif_core_clk = clk_get_sys("mxc_spdif.0", NULL);
clk_put(mxc_spdif_data.spdif_core_clk);
imx6q_add_spdif(&mxc_spdif_data);
imx6q_add_spdif_dai();
imx6q_add_spdif_audio_device();
/* SPI */
imx6q_add_ecspi(0, &mx6q_sabresd_spi_data);
spi_device_init();
imx6q_add_mxc_hdmi(&hdmi_data);
imx6q_add_anatop_thermal_imx(1, &mx6q_sabresd_anatop_thermal_data);
imx6_init_fec(fec_data);
#ifdef CONFIG_MX6_ENET_IRQ_TO_GPIO
/* Make sure the IOMUX_OBSRV_MUX1 is set to ENET_IRQ. */
mxc_iomux_set_specialbits_register(IOMUX_OBSRV_MUX1_OFFSET,
OBSRV_MUX1_ENET_IRQ, OBSRV_MUX1_MASK);
#endif
imx6q_add_pm_imx(0, &mx6q_sabresd_pm_data);
/* Move sd4 to first because sd4 connect to emmc.
Mfgtools want emmc is mmcblk0 and other sd card is mmcblk1.
*/
//imx6q_add_sdhci_usdhc_imx(3, &mx6q_sabresd_sd4_data);
//imx6q_add_sdhci_usdhc_imx(2, &mx6q_sabresd_sd3_data);
imx6q_add_sdhci_usdhc_imx(1, &mx6q_sabresd_sd2_data);
imx_add_viv_gpu(&imx6_gpu_data, &imx6q_gpu_pdata);
imx6q_sabresd_init_usb();
/* SATA is not supported by MX6DL/Solo */
if (cpu_is_mx6q()) {
#ifdef CONFIG_SATA_AHCI_PLATFORM
imx6q_add_ahci(0, &mx6q_sabresd_sata_data);
#else
mx6q_sabresd_sata_init(NULL,
(void __iomem *)ioremap(MX6Q_SATA_BASE_ADDR, SZ_4K));
#endif
}
imx6q_add_vpu();
imx6q_init_audio();
platform_device_register(&sabresd_vmmc_reg_devices);
imx_asrc_data.asrc_core_clk = clk_get(NULL, "asrc_clk");
imx_asrc_data.asrc_audio_clk = clk_get(NULL, "asrc_serial_clk");
imx6q_add_asrc(&imx_asrc_data);
/*
* Disable HannStar touch panel CABC function,
* this function turns the panel's backlight automatically
* according to the content shown on the panel which
* may cause annoying unstable backlight issue.
*/
//gpio_request(SABRESD_CABC_EN0, "cabc-en0");
//gpio_direction_output(SABRESD_CABC_EN0, 0);
//gpio_request(SABRESD_CABC_EN1, "cabc-en1");
//gpio_direction_output(SABRESD_CABC_EN1, 0);
imx6q_add_mxc_pwm(0);
imx6q_add_mxc_pwm(1);
imx6q_add_mxc_pwm(2);
imx6q_add_mxc_pwm(3);
imx6q_add_mxc_pwm_backlight(0, &mx6_sabresd_pwm_backlight_data);
imx6q_add_otp();
imx6q_add_viim();
imx6q_add_imx2_wdt(0, NULL);
imx6q_add_dma();
imx6q_add_dvfs_core(&sabresd_dvfscore_data);
if (imx_ion_data.heaps[0].size)
imx6q_add_ion(0, &imx_ion_data,
sizeof(imx_ion_data) + sizeof(struct ion_platform_heap));
imx6q_add_device_buttons();
///* enable sensor 3v3 and 1v8 */
//gpio_request(SABRESD_SENSOR_EN, "sensor-en");
//gpio_direction_output(SABRESD_SENSOR_EN, 1);
/* enable ecompass intr */
//gpio_request(SABRESD_eCOMPASS_INT, "ecompass-int");
//gpio_direction_input(SABRESD_eCOMPASS_INT);
/* enable light sensor intr */
//gpio_request(SABRESD_ALS_INT, "als-int");
//gpio_direction_input(SABRESD_ALS_INT);
imx6q_add_hdmi_soc();
imx6q_add_hdmi_soc_dai();
if (cpu_is_mx6dl()) {
imx6dl_add_imx_pxp();
imx6dl_add_imx_pxp_client();
}
clko2 = clk_get(NULL, "clko2_clk");
if (IS_ERR(clko2))
pr_err("can't get CLKO2 clock.\n");
new_parent = clk_get(NULL, "osc_clk");
if (!IS_ERR(new_parent)) {
clk_set_parent(clko2, new_parent);
clk_put(new_parent);
}
rate = clk_round_rate(clko2, 24000000);
clk_set_rate(clko2, rate);
clk_enable(clko2);
/* Camera and audio use osc clock */
clko = clk_get(NULL, "clko_clk");
if (!IS_ERR(clko))
clk_set_parent(clko, clko2);
/* Enable Aux_5V */
//gpio_request(SABRESD_AUX_5V_EN, "aux_5v_en");
//gpio_direction_output(SABRESD_AUX_5V_EN, 1);
//gpio_set_value(SABRESD_AUX_5V_EN, 1);
//gps_power_on(true);
/* Register charger chips */
platform_device_register(&sabresd_max8903_charger_1);
//pm_power_off = mx6_snvs_poweroff;
pm_power_off = arch_poweroff;
imx6q_add_busfreq();
/* Add PCIe RC interface support
* uart5 has pin mux with pcie. or you will use uart5 or use pcie
*/
if (cpu_is_mx6dl()) {
mxc_iomux_v3_setup_multiple_pads(mx6dl_arm2_elan_pads,
ARRAY_SIZE(mx6dl_arm2_elan_pads));
}
imx6_add_armpmu();
imx6q_add_perfmon(0);
imx6q_add_perfmon(1);
imx6q_add_perfmon(2);
}
