Exemplo n.º 1
0
int imx7_init(void)
{
	const char *cputypestr;
	void __iomem *src = IOMEM(MX7_SRC_BASE_ADDR);

	imx7_init_lowlevel();

	imx7_init_csu();

	imx7_boot_save_loc();

	psci_set_ops(&imx7_psci_ops);

	switch (imx7_cpu_type()) {
	case IMX7_CPUTYPE_IMX7D:
		cputypestr = "i.MX7d";
		break;
	case IMX7_CPUTYPE_IMX7S:
		cputypestr = "i.MX7s";
		break;
	default:
		cputypestr = "unknown i.MX7";
		break;
	}

	imx_set_silicon_revision(cputypestr, imx7_cpu_revision());
	imx_set_reset_reason(src + IMX7_SRC_SRSR, imx7_reset_reasons);

	return 0;
}
Exemplo n.º 2
0
int imx50_init(void)
{
	void __iomem *src = IOMEM(MX50_SRC_BASE_ADDR);

	imx50_silicon_revision();
	imx_set_reset_reason(src + IMX_SRC_SRSR, imx_reset_reasons);
	imx53_boot_save_loc();

	return 0;
}
Exemplo n.º 3
0
int imx8mq_init(void)
{
	void __iomem *anatop = IOMEM(MX8MQ_ANATOP_BASE_ADDR);
	void __iomem *src = IOMEM(MX8MQ_SRC_BASE_ADDR);
	uint32_t type = FIELD_GET(DIGPROG_MAJOR,
				  readl(anatop + MX8MQ_ANATOP_DIGPROG));
	struct arm_smccc_res res;
	const char *cputypestr;

	imx8_boot_save_loc();

	switch (type) {
	case IMX8M_CPUTYPE_IMX8MQ:
		cputypestr = "i.MX8MQ";
		break;
	default:
		cputypestr = "unknown i.MX8M";
		break;
	};

	imx_set_silicon_revision(cputypestr, imx8mq_cpu_revision());
	/*
	 * Reset reasons seem to be identical to that of i.MX7
	 */
	imx_set_reset_reason(src + IMX7_SRC_SRSR, imx7_reset_reasons);

	if (IS_ENABLED(CONFIG_ARM_SMCCC) &&
	    IS_ENABLED(CONFIG_FIRMWARE_IMX8MQ_ATF)) {
		arm_smccc_smc(FSL_SIP_BUILDINFO,
			      FSL_SIP_BUILDINFO_GET_COMMITHASH,
			      0, 0, 0, 0, 0, 0, &res);
		pr_info("i.MX ARM Trusted Firmware: %s\n", (char *)&res.a0);
	}

	return 0;
}