// ADC初始化
void
adc_init(void)
{
SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC); //使能ADC模块
SysCtlADCSpeedSet(SYSCTL_ADCSPEED_500KSPS); //设置ADC采样速率
ADCSequenceDisable(ADC_BASE, 0); // 配置前先禁止采样序列
ADCSequenceConfigure(ADC_BASE, 0, ADC_TRIGGER_PROCESSOR, 0);
//配置ADC采样序列的触发事件和优先级：ADC基址，采样序列编号，触发事件，采样优先级
ADCSequenceStepConfigure(ADC_BASE, 0, 0,
ADC_CTL_END | ADC_CTL_CH0 | ADC_CTL_IE);
//配置ADC采样序列发生器的步进 ：ADC基址，采样序列编号，步值，通道设置
intConnect(INT_ADC0, ADC_Sequence_0_ISR, 0u);
ADCIntEnable(ADC_BASE, 0); //使能ADC采样序列的中断
// IntEnable(INT_ADC0); // 使能ADC采样序列中断
intEnable(INT_ADC0);
IntMasterEnable(); // 使能处理器中断
ADCSequenceEnable(ADC_BASE, 0); // 使能一个ADC采样序列
the_lock = semBCreate(0);
// printf("%x\n", the_lock);
}
void sysSerialHwInit2(void)
{
for (uint32_t i = 0; i < ARRAY_SIZE(stm32f1xxUartChan); i++){
intConnect(uartParas[i].intid, stm32f1xxUartInt, (uint32_t)&stm32f1xxUartChan[i]);
intEnable(uartParas[i].intid);
}
}
void sysSerialHwInit2(void)
{
uint32_t i;
// 串口
for (i = 0; i < ARRAY_SIZE(lm811UartChan); i++){
intConnect(uartParas[i].intid, lm811UartInt, (uint32_t)&lm811UartChan[i]);
intEnable(uartParas[i].intid);
}
}
void sysSerialHwInit2 (void)
{
int i;
for (i = 0; i < AMBA_UART_CHANNELS_NUM; i++)
{
(void)intConnect (INUM_TO_IVEC(dev_paras[i].vector),
balongv7r2_uart_irq_handler, (int) &amba_chan[i] );
(void)intEnable ((int)dev_paras[i].int_level);
}
}
void
ae531x_txbuf_free(ae531xTxBuf_t *txBuf)
{
unsigned long oldIntrState;
intDisable(oldIntrState);
if (txBuf) {
txBuf->next = ae531xTxFreeList;
ae531xTxFreeList = txBuf;
}
intEnable(oldIntrState);
}
static void ag7100_rxbuf_free(ag7100_priv_data_t *ag7100_priv, void *buf)
{
unsigned long oldIntrState;
ag7100RxBuf_t *rxBuf = (ag7100RxBuf_t *)buf;
intDisable(oldIntrState);
if (rxBuf) {
rxBuf->next = ag7100_priv->rxFreeList;
ag7100_priv->rxFreeList = rxBuf;
}
intEnable(oldIntrState);
}
void
ae531x_rxbuf_free(ae531xRxBuf_t *rxBuf)
{
unsigned long oldIntrState;
intDisable(oldIntrState);
if (rxBuf) {
rxBuf->next = ae531xRxFreeList;
ae531xRxFreeList = rxBuf;
}
intEnable(oldIntrState);
}
void *
ag7100_rxbuf_alloc(ag7100_priv_data_t *ag7100_priv, unsigned char **rxBptr)
{
ag7100RxBuf_t *rxbuf;
unsigned long oldIntrState;
intDisable(oldIntrState);
if (ag7100_priv->rxFreeList) {
rxbuf = ag7100_priv->rxFreeList;
ag7100_priv->rxFreeList = ag7100_priv->rxFreeList->next;
intEnable(oldIntrState);
*rxBptr = rxbuf->data;
return (void *)rxbuf;
}
intEnable(oldIntrState);
*rxBptr = NULL;
return (void *)NULL;
}
void Tmr_TickInit (void)
{
pLgeTimer0->clear = 1; /* Enable Timer #0 for uC/OS-II Tick Interrupts */
pLgeTimer0->load = SYS_TIMER_CLK / OS_TICKS_PER_SEC;
pLgeTimer0->control = TMRCTRL_ENABLE | TMRCTRL_MODE_PERIODIC | TMRCTRL_PRESCALE16 | TMRCTRL_COUNTER32;
#if 1
intConnect(INT_LVL_TIMER_0, (PFNCT)Tmr_TickISR, 0, "tick");
#else
fastintConnect(INT_LVL_TIMER_0, (PFNCT)Tmr_TickISR, 0, "tick");
#endif
intEnable(INT_LVL_TIMER_0);
}
static void
ae531x_txbuf_alloc(ae531x_MAC_t *MACInfo, ae531xTxBuf_t **txBptr)
{
ae531xTxBuf_t *txbuf;
unsigned long oldIntrState;
intDisable(oldIntrState);
if (ae531xTxFreeList) {
txbuf = ae531xTxFreeList;
ae531xTxFreeList = ae531xTxFreeList->next;
intEnable(oldIntrState);
*txBptr = txbuf;
return;
}
intEnable(oldIntrState);
DEBUG_PRINTF("ae531x_txbuf_alloc failed!\n");
*txBptr = NULL;
return;
}
static int ag7100_recv(struct eth_device *dev) //struct eth_drv_sc *sc, struct eth_drv_sg *sg_list, int sg_len)
{
ag7100_priv_data_t *ag7100_priv = (ag7100_priv_data_t *)dev->priv;
ag7100RxBuf_t *rxBuf;
unsigned long oldIntrState;
unsigned char *RxBufData;
struct eth_drv_sg *sg_item;
int i;
ARRIVE();
intDisable(oldIntrState);
rxBuf = ag7100_priv->rxRecvdListHead;
ag7100_priv->rxRecvdListHead = ag7100_priv->rxRecvdListHead->next;
intEnable(oldIntrState);
#if 0 //by Zhangyu
if ((char *)sg_list->buf != NULL) {
/* Copy out from driver Rx buffer to sg_list */
RxBufData = rxBuf->data;
sg_item = sg_list;
for (i=0; i<sg_len; sg_item++, i++) {
char *segment_addr;
int segment_len;
segment_addr = (char *)sg_item->buf;
segment_len = sg_item->len;
#if defined(CONFIG_ATHRS26_PHY) && defined(HEADER_EN)
/* remove header */
if ((ag7100_priv->enetUnit == 0) && (i == 0)) {
RxBufData += 2;
segment_len -= 2;
}
#endif
memcpy(segment_addr, RxBufData, segment_len);
RxBufData += segment_len;
}
} else {
/* Handle according to convention: bit bucket the packet */
}
#endif
RxBufData = rxBuf->data;
NetReceive(RxBufData, AG7100_RX_BUF_SIZE);
/* Free driver Rx buffer */
ag7100_rxbuf_free(ag7100_priv, rxBuf);
LEAVE();
}
/******************************************************************************
** Function: CFE_PSP_Init1HzTone()
**
** Purpose:
** Initializes the 1Hz Tone interrupt
**
** Arguments:
**
** Return:
**
*/
void CFE_PSP_Init1HzTone()
{
uint32 val;
uint32 tone1HzPin = (1 << 7); /* GPIO0_7 */
val = am335xInLong (AM335X_GPIO0_BASE + AM335X_GPIO_IRQSTATUS_SET1);
am335xOutLong (AM335X_GPIO0_BASE + AM335X_GPIO_IRQSTATUS_SET1, val | tone1HzPin);
val = am335xInLong (AM335X_GPIO0_BASE + AM335X_GPIO_RISINGDETECT);
am335xOutLong (AM335X_GPIO0_BASE + AM335X_GPIO_RISINGDETECT, val | tone1HzPin);
intConnect((VOIDFUNCPTR *)INUM_TO_IVEC (AM335X_GPIOINT0B), CFE_PSP_ToneISR, 0);
intEnable(AM335X_GPIOINT0B);
}
void *
ae531x_rxbuf_alloc(ae531x_MAC_t *MACInfo, char **rxBptr, int *rxBSize)
{
ae531xRxBuf_t *rxbuf;
unsigned long oldIntrState;
intDisable(oldIntrState);
if (ae531xRxFreeList) {
rxbuf = ae531xRxFreeList;
//DEBUG_PRINTF("ae531xRxFreeList=%p\n",rxbuf);
ae531xRxFreeList = ae531xRxFreeList->next;
intEnable(oldIntrState);
*rxBptr = (char *)rxbuf->data;
*rxBSize = sizeof(rxbuf->data);
return (void *)rxbuf;
}
intEnable(oldIntrState);
DEBUG_PRINTF("ae531x_rxbuf_alloc failed!\n");
*rxBptr = NULL;
return (void *)NULL;
}
/*
Wrap the VxWorks intEnable routine
*/
LOCAL int MEI_MyIntEnable_Wrap(int IRQNum)
{
int ret;
printf("INT Wrap - intEnable\r\n");
/*
pre: do own stuff here
*/
ret = intEnable(IRQNum);
/*
post: do own stuff here
*/
return ret;
}
void init(void)
{
int tacheSynchID;
mailBox = msgQCreate( 2, 4, MSG_Q_FIFO);
if (mailBox!=NULL)
printf("Boite aux lettres créée\n");
else
printf("ERREUR\n");
*GPT_IR = 0x1;
*GPT_CR = 0x1c3;
*GPT_PR = 0x0;
*GPT_OCR1 = 24000000;
// Initialisation des GPIO pour la broche GPIO9
*IOMUXC1_GPIO9=0x05;
*IOMUXC2_GPIO9=0x1B0B0;
erreur = intConnect(87, (VOIDFUNCPTR)ITserver, 0);
if (erreur !=OK)
{
printf("ERREUR intConnect\n");
taskDelete(0);
}
erreur = intEnable(87);
if (erreur != OK)
{
printf("Erreur intEnable\n");
taskDelete(0);
}
tacheSynchID = taskSpawn(tacheSynch, 100, 0, 5000, (FUNCPTR)tacheSynch, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
taskDelete(0);
}
void GPIO_Init(void)
{
SetGpioConfig(0, 0x8D, GPIO_WRITE);
SetGpioConfig(0, 0x72, GPIO_READ);
SetGpioConfig(0, 0x02, GPIO_READ | GPIO_INT_EN | GPIO_INT_F_EDGE );
SetGpioConfig(1, 0xC3, GPIO_WRITE);
SetGpioIsr(0, 1, IR_handler);
intConnect (INT_VEC_GPIO0, (PFNCT)GPIO_ISR, 0, "GPIO0");
intEnable (INT_VEC_GPIO0);
GPIO_PowerLEDR(0);
GPIO_PowerLEDG(1);
GPIO_VcrMute(TRUE);
GPIO_MainAudioMute(TRUE);
GPIO_DelayedAGCOn(FALSE); //default : Self AGC
return;
}
PUBLIC IX_STATUS
ixOsalIrqBind (UINT32 irqLevel, IxOsalVoidFnVoidPtr routine, void *parameter)
{
#if CPU==SIMSPARCSOLARIS
/*
* No Irq support in simulation env
*/
return IX_FAIL;
#else
if (intConnect
((IxOsalVoidFnVoidPtr *)
irqLevel, (IxOsalVoidFnVoidPtr) routine, (int) parameter) != OK)
{
return IX_FAIL;
}
intEnable (irqLevel);
return IX_SUCCESS;
#endif
}
void sysSerialHwInit2 (void)
{
int i;
AT91DBGUDevInit2( &at91DBGUChan );
for (i = 0; i < N_SIO_CHANNELS; i++)
{
/*
* Connect and enable the interrupt.
* We would like to check the return value from this and log a message
* if it failed. However, logLib has not been initialised yet, so we
* cannot log a message, so there's little point in checking it.
* URAT still in quiet state
*/
(void) intConnect ( INUM_TO_IVEC(devParas[i].vector),
AT91UartInt, (UINT32) &at91UartChan[i] );
intEnable (devParas[i].intLevel);
AT91UartDevInit2( &at91UartChan[i] );
}
}
void GPIO_Init(void)
{
SetGpioConfig(0, 0x8D, GPIO_WRITE);
SetGpioConfig(0, 0x72, GPIO_READ);
SetGpioConfig(0, 0x02, GPIO_READ | GPIO_INT_EN | GPIO_INT_F_EDGE );
SetGpioConfig(1, 0x43, GPIO_WRITE);
SetGpioConfig(1, 0x20, GPIO_WRITE);
#if (USE_IR>0)
SetGpioIsr(0, 1, IR_handler);
#endif /* USE_IR > 0 */
intConnect (INT_VEC_GPIO0, (PFNCT)GPIO_ISR, 0, "GPIO0");
intEnable (INT_VEC_GPIO0);
GPIO_PowerLEDR(0);
GPIO_PowerLEDG(1);
GPIO_VcrMute(FALSE);
GPIO_MainAudioMute(FALSE);
return;
}
PUBLIC void
ixOsalIrqEnable (UINT32 irqLevel)
{
intEnable (irqLevel);
}
/*****************************************************************************
* 函 数 名 : cshell_direction
*
* 功能描述 : 改变cshell的方向
*
* 输入参数 : cshell_mode_tpye mode :
* CSHELL_MODE_UART : 切换到UART
* CSHELL_MODE_USB : 切换到USB
* 输出参数 : 无
*
* 返 回 值 : 无
*
* 修改记录 :
*****************************************************************************/
int cshell_direction(cshell_mode_tpye mode)
{
int key = 0;
int fd = 0;
SHELL_ID ShellID;
char ttyFg[16] = {0x00};
char ttyBg[16] = {0x00};
SHELL_IO_CHAN *ptr_shell = &shell_io_channel;
SRAM_SMALL_SECTIONS * sram = (SRAM_SMALL_SECTIONS * )SRAM_SMALL_SECTIONS_ADDR;
if ((cshell_mode_tpye)(ptr_shell->shell_mode) == mode)
{
cshell_print_error("C:no need to redirect cshell!\n");
return OK;
}
if (CSHELL_MODE_UART == mode)
{
/* coverity[secure_coding] */
sprintf(ttyFg, "/tyCo/0");
/* coverity[secure_coding] */
sprintf(ttyBg, "/tyCo/3");
}
else if (CSHELL_MODE_USB == mode)
{
/* coverity[secure_coding] */
sprintf(ttyFg, "/tyCo/3");
/* coverity[secure_coding] */
sprintf(ttyBg, "/tyCo/0");
}
else
{
cshell_print_error("C:redirect parm error[%d]!\n", mode);
return ERROR;
}
if (CSHELL_MODE_UART == mode)
intEnable((int)sram->UART_INFORMATION[1].interrupt_num);
else
{
/* 禁止串口中断,M核心采用UART */
intDisable((int)sram->UART_INFORMATION[1].interrupt_num);
}
key = intLock();
//taskLock();
/* 关闭Shell当前使用的串口 */
fd = ioGlobalStdGet(STD_IN);
(void)ioctl (fd, FIOSETOPTIONS, OPT_RAW);
close(fd);
ShellID = shellFromTaskGet(shellConsoleTaskId);
shellTerminate(ShellID);/* [false alarm]:误报 */
if (0 != (fd = open(ttyFg, O_RDWR, 0)))/* [false alarm]:误报 */
{
/* 切换成功 */
ptr_shell->shell_mode = mode;
}
else
{
/* 切换失败 */
fd = open(ttyBg, O_RDWR, 0);
if (0 == fd)
{
//taskUnlock();
intUnlock(key);
return ERROR;
}
}
/* coverity[noescape] */
(void)ioctl (fd, FIOSETOPTIONS, OPT_TERMINAL);
/* coverity[noescape] */
ioGlobalStdSet (STD_OUT, fd);
/* coverity[noescape] */
ioGlobalStdSet (STD_IN, fd);
/* coverity[noescape] */
ioGlobalStdSet (STD_ERR, fd);
//taskUnlock();
intUnlock(key);
usrShell();
return OK;
}
static int ae531x_poll(struct eth_device *dev)
{
ae531xRxBuf_t *rxBuf, *newRxBuf;
char *rxBufData;
int unused_length;
VIRT_ADDR rxDesc;
int length;
ae531x_MAC_t *MACInfo;
unsigned int cmdsts;
ae531x_priv_data_t *ae531x_priv;
ae531x_priv = (ae531x_priv_data_t *)dev->priv;
MACInfo = (ae531x_MAC_t *)&ae531x_priv->MACInfo;
do {
for(;;) {
rxDesc = MACInfo->rxQueue.curDescAddr;
cmdsts = AE531X_DESC_STATUS_GET(KSEG1ADDR(rxDesc));
if (cmdsts & DescOwnByDma) {
/* There's nothing left to process in the RX ring */
goto rx_all_done;
}
AE531X_PRINT(AE531X_DEBUG_RX,
("consume rxDesc %p with cmdsts=0x%x\n",
(void *)rxDesc, cmdsts));
AE531X_CONSUME_DESC((&MACInfo->rxQueue));
A_DATA_CACHE_INVAL(rxDesc, AE531X_DESC_SIZE);
/* Process a packet */
length = AE531X_DESC_STATUS_RX_SIZE(cmdsts) - ETH_CRC_LEN;
if ( (cmdsts & (DescRxFirst |DescRxLast | DescRxErrors)) ==
(DescRxFirst | DescRxLast) ) {
/* Descriptor status indicates "NO errors" */
rxBuf = AE531X_DESC_SWPTR_GET(rxDesc);
/*
* Allocate a replacement buffer
* We want to get another buffer ready for Rx ASAP.
*/
newRxBuf = ae531x_rxbuf_alloc(MACInfo, &rxBufData, &unused_length);
if(newRxBuf == NULL ) {
/*
* Give this descriptor back to the DMA engine,
* and drop the received packet.
*/
AE531X_PRINT(AE531X_DEBUG_ERROR,
("Can't allocate new rx buf\n"));
} else {
//diag_printf("rxBufData=%p\n",rxBufData);
AE531X_DESC_BUFPTR_SET(rxDesc, virt_to_bus(rxBufData));
AE531X_DESC_SWPTR_SET(rxDesc, newRxBuf);
}
AE531X_DESC_STATUS_SET(rxDesc, DescOwnByDma);
rxDesc = NULL; /* sanity -- cannot use rxDesc now */
sysWbFlush();
if (newRxBuf == NULL) {
goto no_rx_bufs;
} else {
/* Sync data cache w.r.t. DMA */
A_DATA_CACHE_INVAL(rxBuf->data, length);
/* Send the data up the stack */
AE531X_PRINT(AE531X_DEBUG_RX,
("Send data up stack: rxBuf=%p data=%p length=%d\n",
(void *)rxBuf, (void *)rxBuf->data, length));
{
unsigned long oldIntrState;
rxBuf->next = NULL;
intDisable(oldIntrState);
if (ae531xRxRecvdListHead) {
ae531xRxRecvdListTail->next = rxBuf;
ae531xRxRecvdListTail = rxBuf;
} else {
ae531xRxRecvdListHead = rxBuf;
ae531xRxRecvdListTail = rxBuf;
}
intEnable(oldIntrState);
}
NetReceive(rxBuf->data, length);
/* Free driver Rx buffer */
ae531x_rxbuf_free(rxBuf);
}
} else {
AE531X_PRINT(AE531X_DEBUG_ERROR,
("Bad receive. rxDesc=%p cmdsts=0x%8.8x\n",
(void *)rxDesc, cmdsts));
}
}
} while (ae531x_ReadDmaReg(MACInfo, DmaStatus) & DmaIntRxCompleted);
rx_all_done:
ae531x_SetDmaReg(MACInfo, DmaIntrEnb,
DmaIeRxCompleted | DmaIeRxNoBuffer);
ae531x_WriteDmaReg(MACInfo, DmaRxPollDemand, 0);
no_rx_bufs:
return;
}
/******************************************************************************
*
* ae531x_DmaReset - Reset DMA and TLI controllers
*
* RETURNS: N/A
*/
void
ae531x_DmaReset(ae531x_MAC_t *MACInfo)
{
int i;
UINT32 descAddr;
unsigned long oldIntrState;
ARRIVE();
/* Disable device interrupts prior to any errors during stop */
intDisable(oldIntrState);
/* Disable MAC rx and tx */
ae531x_ClearMacReg(MACInfo, MacControl, (MacRxEnable | MacTxEnable));
/* Reset dma controller */
ae531x_WriteDmaReg(MACInfo, DmaBusMode, DmaResetOn);
/* Delay 2 usec */
sysUDelay(2);
/* Flush the rx queue */
descAddr = (UINT32)MACInfo->rxQueue.firstDescAddr;
MACInfo->rxQueue.curDescAddr = MACInfo->rxQueue.firstDescAddr;
for (i=0;
i<(MACInfo->rxDescCount);
i++, descAddr += AE531X_QUEUE_ELE_SIZE) {
AE531X_DESC_STATUS_SET(descAddr, DescOwnByDma);
}
/* Flush the tx queue */
descAddr = (UINT32)MACInfo->txQueue.firstDescAddr;
MACInfo->txQueue.curDescAddr = MACInfo->txQueue.firstDescAddr;
MACInfo->txQueue.reapDescAddr = MACInfo->txQueue.lastDescAddr;
for (i=0;
i<(MACInfo->txDescCount);
i++, descAddr += AE531X_QUEUE_ELE_SIZE) {
AE531X_DESC_STATUS_SET (descAddr, 0);
}
/* Set init register values */
ae531x_WriteDmaReg(MACInfo, DmaBusMode, DmaBusModeInit);
/* Install the first Tx and Rx queues on the device */
ae531x_WriteDmaReg(MACInfo, DmaRxBaseAddr,
(UINT32)MACInfo->rxQueue.firstDescAddr);
ae531x_WriteDmaReg(MACInfo, DmaTxBaseAddr,
(UINT32)MACInfo->txQueue.firstDescAddr);
ae531x_WriteDmaReg(MACInfo, DmaControl, DmaStoreAndForward);
ae531x_WriteDmaReg(MACInfo, DmaIntrEnb, DmaIntDisable);
AE531X_PRINT(AE531X_DEBUG_RESET,
("eth%d: DMA RESET!\n", MACInfo->unit));
/* Turn on device interrupts -- enable most errors */
ae531x_DmaIntClear(MACInfo); /* clear interrupt requests */
ae531x_DmaIntEnable(MACInfo); /* enable interrupts */
ae531x_EndResetMode(MACInfo);
intEnable(oldIntrState);
LEAVE();
}
static int ag7100_poll(struct eth_device *dev)
{
int length;
ag7100RxBuf_t *rxBuf, *newRxBuf;
ag7100_desc_t *f;
ag7100_mac_t *mac;
ag7100_priv_data_t *ag7100_priv;
unsigned char *rxBufData;
ag7100_priv = (ag7100_priv_data_t *)dev->priv;
mac = (ag7100_mac_t *)&ag7100_priv->MACInfo;
if(--ag7100_priv->linkChkCntr == 0) {
ag7100_priv->linkChkCntr = AG7100_LINK_CHK_INTVL;
if(ag7100_check_link(mac) == 0) {
//debug("Link is down\n");
return;
}
}
for(;;){
f = mac->fifo_rx[mac->next_rx];
A_DATA_CACHE_INVAL(f, sizeof(*f));
if(ag7100_rx_owned_by_dma(f))
goto rx_done;
length = f->pkt_size;
rxBuf = f->sw_buf;
/*
* Allocate a replacement buffer
* We want to get another buffer ready for Rx ASAP.
*/
newRxBuf = (ag7100RxBuf_t *)ag7100_rxbuf_alloc(ag7100_priv, &rxBufData);
if(newRxBuf == NULL ) {
/*
* Give this descriptor back to the DMA engine,
* and drop the received packet.
*/
AG7100_PRINT(AG7100_DEBUG_ERROR,
("Can't allocate new rx buf\n"));
} else {
//diag_printf("rxBufData=%p\n",rxBufData);
f->pkt_start_addr = virt_to_bus((uint32_t)rxBufData);
f->sw_buf = newRxBuf;
}
ag7100_rx_give_to_dma(f);
A_WR_FLUSH();
if(newRxBuf == NULL) {
goto no_rx_bufs;
} else {
unsigned long oldIntrState;
/* Sync data cache w.r.t. DMA */
A_DATA_CACHE_INVAL(rxBuf->data, length);
/* Send the data up the stack */
//debug("Send data up stack: rxBuf=%p data=%p length=%d\n", (void *)rxBuf, (void *)rxBuf->data, length);
rxBuf->next = NULL;
intDisable(oldIntrState);
if (ag7100_priv->rxRecvdListHead) {
ag7100_priv->rxRecvdListTail->next = rxBuf;
ag7100_priv->rxRecvdListTail = rxBuf;
} else {
ag7100_priv->rxRecvdListHead = rxBuf;
ag7100_priv->rxRecvdListTail = rxBuf;
}
intEnable(oldIntrState);
NetReceive(rxBuf->data, length);
/* Free driver Rx buffer */
ag7100_rxbuf_free(ag7100_priv, rxBuf);
}
if(++mac->next_rx >= AG7100_RX_DESC_CNT) mac->next_rx = 0;
}
rx_done:
if (!(ag7100_reg_rd(mac, AG7100_DMA_RX_CTRL))) {
ag7100_reg_wr(mac, AG7100_DMA_RX_DESC, virt_to_bus((uint32_t)f));
ag7100_reg_wr(mac, AG7100_DMA_RX_CTRL, AG7100_RXE);
}
no_rx_bufs:
return;
}
int pci_int_connect(int intLine,
pci_isr_t isr,
void *isr_data)
{
#if !defined(NEGEV)
extern int sysVectorIRQ0;
#endif
#if defined(NSX) || defined(GTO) || defined(METROCORE)
int i;
#endif
debugk(DK_PCI,
"pci_int_connect: intLine=%d, isr=%p, isr_data=%p\n",
intLine, (void *)isr, (void *)isr_data);
#if defined(NSX) || defined(METROCORE)
/* all int lines */
for (i = 0; i < 4; i++) {
/* printk("pciIntConnect int line = %d\n", intLine + i); */
if (pciIntConnect ((VOIDFUNCPTR *)
INUM_TO_IVEC(sysVectorIRQ0 + intLine + i),
(VOIDFUNCPTR) isr,
PTR_TO_INT(isr_data)) != OK) {
return -1;
}
}
return 0;
#endif
#if defined(GTO)
for (i = 0; i < 4; i++) {
/* PCI interrupts are connected at external interrupt
* 0, 1, 2, and 3.
*/
if (pciIntConnect ((VOIDFUNCPTR *)
INUM_TO_IVEC(sysVectorIRQ0 + i),
(VOIDFUNCPTR) isr,
PTR_TO_INT(isr_data)) != OK) {
return -1;
}
if (intEnable(sysVectorIRQ0 + i) == ERROR) {
return -1;
}
}
return 0;
#endif
#if !defined (NEGEV)
if (pciIntConnect ((VOIDFUNCPTR *)
INUM_TO_IVEC(sysVectorIRQ0 + intLine),
(VOIDFUNCPTR) isr,
PTR_TO_INT(isr_data)) != OK) {
return -1;
}
#endif
#if (CPU_FAMILY != PPC) && !defined(IDTRP334) && \
!defined(MBZ) && !defined(IDT438) && !defined(NSX) && !defined(ROBO_4704) \
&& !defined(ROBO_4702) && !defined(RAPTOR) && !defined(METROCORE) \
&& !defined(KEYSTONE)
if (sysIntEnablePIC(intLine) == ERROR) {
return -1;
}
#endif
#if (CPU_FAMILY == PPC)
if (intEnable(intLine) != OK) {
return -1;
}
#endif /* (CPU_FAMILY == PPC) */
return 0;
}
