static void
get_resolve_rect(struct brw_context *brw,
struct intel_mipmap_tree *mt, struct rect *rect)
{
unsigned x_align, y_align;
unsigned x_scaledown, y_scaledown;
/* From the Ivy Bridge PRM, Vol2 Part1 11.9 "Render Target Resolve":
*
* A rectangle primitive must be scaled down by the following factors
* with respect to render target being resolved.
*
* The scaledown factors in the table that follows are related to the
* alignment size returned by intel_get_non_msrt_mcs_alignment() by a
* multiplier. For IVB and HSW, we divide by two, for BDW we multiply
* by 8 and 16 and 8 and 8 for SKL.
*/
intel_get_non_msrt_mcs_alignment(brw, mt, &x_align, &y_align);
if (brw->gen >= 9) {
x_scaledown = x_align * 8;
y_scaledown = y_align * 8;
} else if (brw->gen >= 8) {
x_scaledown = x_align * 8;
y_scaledown = y_align * 16;
} else {
x_scaledown = x_align / 2;
y_scaledown = y_align / 2;
}
rect->x0 = rect->y0 = 0;
rect->x1 = ALIGN(mt->logical_width0, x_scaledown) / x_scaledown;
rect->y1 = ALIGN(mt->logical_height0, y_scaledown) / y_scaledown;
}
brw_blorp_rt_resolve_params::brw_blorp_rt_resolve_params(
struct brw_context *brw,
struct intel_mipmap_tree *mt)
{
dst.set(brw, mt, 0 /* level */, 0 /* layer */, true);
/* From the Ivy Bridge PRM, Vol2 Part1 11.9 "Render Target Resolve":
*
* A rectangle primitive must be scaled down by the following factors
* with respect to render target being resolved.
*
* The scaledown factors in the table that follows are related to the
* alignment size returned by intel_get_non_msrt_mcs_alignment(), but with
* X and Y alignment each divided by 2.
*/
unsigned x_align, y_align;
intel_get_non_msrt_mcs_alignment(brw, mt, &x_align, &y_align);
unsigned x_scaledown = x_align / 2;
unsigned y_scaledown = y_align / 2;
x0 = y0 = 0;
x1 = ALIGN(mt->logical_width0, x_scaledown) / x_scaledown;
y1 = ALIGN(mt->logical_height0, y_scaledown) / y_scaledown;
fast_clear_op = GEN7_FAST_CLEAR_OP_RESOLVE;
/* Note: there is no need to initialize push constants because it doesn't
* matter what data gets dispatched to the render target. However, we must
* ensure that the fragment shader delivers the data using the "replicated
* color" message.
*/
use_wm_prog = true;
memset(&wm_prog_key, 0, sizeof(wm_prog_key));
wm_prog_key.use_simd16_replicated_data = true;
}
static void
get_resolve_rect(struct brw_context *brw,
struct intel_mipmap_tree *mt, struct rect *rect)
{
unsigned x_align, y_align;
unsigned x_scaledown, y_scaledown;
/* From the Ivy Bridge PRM, Vol2 Part1 11.9 "Render Target Resolve":
*
* A rectangle primitive must be scaled down by the following factors
* with respect to render target being resolved.
*
* The scaledown factors in the table that follows are related to the
* alignment size returned by intel_get_non_msrt_mcs_alignment(), but with
* X and Y alignment each divided by 2.
*/
intel_get_non_msrt_mcs_alignment(brw, mt, &x_align, &y_align);
x_scaledown = x_align / 2;
y_scaledown = y_align / 2;
rect->x0 = rect->y0 = 0;
rect->x1 = ALIGN(mt->logical_width0, x_scaledown) / x_scaledown;
rect->y1 = ALIGN(mt->logical_height0, y_scaledown) / y_scaledown;
}
static void
get_fast_clear_rect(struct brw_context *brw, struct gl_framebuffer *fb,
struct intel_renderbuffer *irb, struct rect *rect)
{
unsigned int x_align, y_align;
unsigned int x_scaledown, y_scaledown;
if (irb->mt->msaa_layout == INTEL_MSAA_LAYOUT_NONE) {
/* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render
* Target(s)", beneath the "Fast Color Clear" bullet (p327):
*
* Clear pass must have a clear rectangle that must follow
* alignment rules in terms of pixels and lines as shown in the
* table below. Further, the clear-rectangle height and width
* must be multiple of the following dimensions. If the height
* and width of the render target being cleared do not meet these
* requirements, an MCS buffer can be created such that it
* follows the requirement and covers the RT.
*
* The alignment size in the table that follows is related to the
* alignment size returned by intel_get_non_msrt_mcs_alignment(), but
* with X alignment multiplied by 16 and Y alignment multiplied by 32.
*/
intel_get_non_msrt_mcs_alignment(brw, irb->mt, &x_align, &y_align);
x_align *= 16;
y_align *= 32;
/* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render
* Target(s)", beneath the "Fast Color Clear" bullet (p327):
*
* In order to optimize the performance MCS buffer (when bound to
* 1X RT) clear similarly to MCS buffer clear for MSRT case,
* clear rect is required to be scaled by the following factors
* in the horizontal and vertical directions:
*
* The X and Y scale down factors in the table that follows are each
* equal to half the alignment value computed above.
*/
x_scaledown = x_align / 2;
y_scaledown = y_align / 2;
/* From BSpec: 3D-Media-GPGPU Engine > 3D Pipeline > Pixel > Pixel
* Backend > MCS Buffer for Render Target(s) [DevIVB+] > Table "Color
* Clear of Non-MultiSampled Render Target Restrictions":
*
* Clear rectangle must be aligned to two times the number of
* pixels in the table shown below due to 16x16 hashing across the
* slice.
*/
x_align *= 2;
y_align *= 2;
} else {
/* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render
* Target(s)", beneath the "MSAA Compression" bullet (p326):
*
* Clear pass for this case requires that scaled down primitive
* is sent down with upper left co-ordinate to coincide with
* actual rectangle being cleared. For MSAA, clear rectangle’s
* height and width need to as show in the following table in
* terms of (width,height) of the RT.
*
* MSAA Width of Clear Rect Height of Clear Rect
* 4X Ceil(1/8*width) Ceil(1/2*height)
* 8X Ceil(1/2*width) Ceil(1/2*height)
*
* The text "with upper left co-ordinate to coincide with actual
* rectangle being cleared" is a little confusing--it seems to imply
* that to clear a rectangle from (x,y) to (x+w,y+h), one needs to
* feed the pipeline using the rectangle (x,y) to
* (x+Ceil(w/N),y+Ceil(h/2)), where N is either 2 or 8 depending on
* the number of samples. Experiments indicate that this is not
* quite correct; actually, what the hardware appears to do is to
* align whatever rectangle is sent down the pipeline to the nearest
* multiple of 2x2 blocks, and then scale it up by a factor of N
* horizontally and 2 vertically. So the resulting alignment is 4
* vertically and either 4 or 16 horizontally, and the scaledown
* factor is 2 vertically and either 2 or 8 horizontally.
*/
switch (irb->mt->num_samples) {
case 2:
case 4:
x_scaledown = 8;
break;
case 8:
x_scaledown = 2;
break;
default:
unreachable("Unexpected sample count for fast clear");
}
y_scaledown = 2;
x_align = x_scaledown * 2;
y_align = y_scaledown * 2;
}
rect->x0 = fb->_Xmin;
rect->x1 = fb->_Xmax;
if (fb->Name != 0) {
rect->y0 = fb->_Ymin;
rect->y1 = fb->_Ymax;
} else {
rect->y0 = fb->Height - fb->_Ymax;
rect->y1 = fb->Height - fb->_Ymin;
}
rect->x0 = ROUND_DOWN_TO(rect->x0, x_align) / x_scaledown;
rect->y0 = ROUND_DOWN_TO(rect->y0, y_align) / y_scaledown;
rect->x1 = ALIGN(rect->x1, x_align) / x_scaledown;
rect->y1 = ALIGN(rect->y1, y_align) / y_scaledown;
}
brw_blorp_clear_params::brw_blorp_clear_params(struct brw_context *brw,
struct gl_framebuffer *fb,
struct gl_renderbuffer *rb,
GLubyte *color_mask,
bool partial_clear,
unsigned layer)
{
struct gl_context *ctx = &brw->ctx;
struct intel_renderbuffer *irb = intel_renderbuffer(rb);
dst.set(brw, irb->mt, irb->mt_level, layer, true);
/* Override the surface format according to the context's sRGB rules. */
mesa_format format = _mesa_get_render_format(ctx, irb->mt->format);
dst.brw_surfaceformat = brw->render_target_format[format];
x0 = fb->_Xmin;
x1 = fb->_Xmax;
if (rb->Name != 0) {
y0 = fb->_Ymin;
y1 = fb->_Ymax;
} else {
y0 = rb->Height - fb->_Ymax;
y1 = rb->Height - fb->_Ymin;
}
float *push_consts = (float *)&wm_push_consts;
push_consts[0] = ctx->Color.ClearColor.f[0];
push_consts[1] = ctx->Color.ClearColor.f[1];
push_consts[2] = ctx->Color.ClearColor.f[2];
push_consts[3] = ctx->Color.ClearColor.f[3];
use_wm_prog = true;
memset(&wm_prog_key, 0, sizeof(wm_prog_key));
wm_prog_key.use_simd16_replicated_data = true;
/* From the SNB PRM (Vol4_Part1):
*
* "Replicated data (Message Type = 111) is only supported when
* accessing tiled memory. Using this Message Type to access linear
* (untiled) memory is UNDEFINED."
*/
if (irb->mt->tiling == I915_TILING_NONE)
wm_prog_key.use_simd16_replicated_data = false;
/* Constant color writes ignore everyting in blend and color calculator
* state. This is not documented.
*/
for (int i = 0; i < 4; i++) {
if (_mesa_format_has_color_component(irb->mt->format, i) &&
!color_mask[i]) {
color_write_disable[i] = true;
wm_prog_key.use_simd16_replicated_data = false;
}
}
/* If we can do this as a fast color clear, do so.
*
* Note that the condition "!partial_clear" means we only try to do full
* buffer clears using fast color clear logic. This is necessary because
* the fast color clear alignment requirements mean that we typically have
* to clear a larger rectangle than (x0, y0) to (x1, y1). Restricting fast
* color clears to the full-buffer condition guarantees that the extra
* memory locations that get written to are outside the image boundary (and
* hence irrelevant). Note that the rectangle alignment requirements are
* never larger than the size of a tile, so there is no danger of
* overflowing beyond the memory belonging to the region.
*/
if (irb->mt->fast_clear_state != INTEL_FAST_CLEAR_STATE_NO_MCS &&
!partial_clear && wm_prog_key.use_simd16_replicated_data &&
is_color_fast_clear_compatible(brw, format, &ctx->Color.ClearColor)) {
memset(push_consts, 0xff, 4*sizeof(float));
fast_clear_op = GEN7_FAST_CLEAR_OP_FAST_CLEAR;
/* Figure out what the clear rectangle needs to be aligned to, and how
* much it needs to be scaled down.
*/
unsigned x_align, y_align, x_scaledown, y_scaledown;
if (irb->mt->msaa_layout == INTEL_MSAA_LAYOUT_NONE) {
/* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render
* Target(s)", beneath the "Fast Color Clear" bullet (p327):
*
* Clear pass must have a clear rectangle that must follow
* alignment rules in terms of pixels and lines as shown in the
* table below. Further, the clear-rectangle height and width
* must be multiple of the following dimensions. If the height
* and width of the render target being cleared do not meet these
* requirements, an MCS buffer can be created such that it
* follows the requirement and covers the RT.
*
* The alignment size in the table that follows is related to the
* alignment size returned by intel_get_non_msrt_mcs_alignment(), but
* with X alignment multiplied by 16 and Y alignment multiplied by 32.
*/
intel_get_non_msrt_mcs_alignment(brw, irb->mt, &x_align, &y_align);
x_align *= 16;
y_align *= 32;
/* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render
* Target(s)", beneath the "Fast Color Clear" bullet (p327):
*
* In order to optimize the performance MCS buffer (when bound to
* 1X RT) clear similarly to MCS buffer clear for MSRT case,
* clear rect is required to be scaled by the following factors
* in the horizontal and vertical directions:
*
* The X and Y scale down factors in the table that follows are each
* equal to half the alignment value computed above.
*/
x_scaledown = x_align / 2;
y_scaledown = y_align / 2;
/* From BSpec: 3D-Media-GPGPU Engine > 3D Pipeline > Pixel > Pixel
* Backend > MCS Buffer for Render Target(s) [DevIVB+] > Table "Color
* Clear of Non-MultiSampled Render Target Restrictions":
*
* Clear rectangle must be aligned to two times the number of
* pixels in the table shown below due to 16x16 hashing across the
* slice.
*/
x_align *= 2;
y_align *= 2;
} else {
/* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render
* Target(s)", beneath the "MSAA Compression" bullet (p326):
*
* Clear pass for this case requires that scaled down primitive
* is sent down with upper left co-ordinate to coincide with
* actual rectangle being cleared. For MSAA, clear rectangle’s
* height and width need to as show in the following table in
* terms of (width,height) of the RT.
*
* MSAA Width of Clear Rect Height of Clear Rect
* 4X Ceil(1/8*width) Ceil(1/2*height)
* 8X Ceil(1/2*width) Ceil(1/2*height)
*
* The text "with upper left co-ordinate to coincide with actual
* rectangle being cleared" is a little confusing--it seems to imply
* that to clear a rectangle from (x,y) to (x+w,y+h), one needs to
* feed the pipeline using the rectangle (x,y) to
* (x+Ceil(w/N),y+Ceil(h/2)), where N is either 2 or 8 depending on
* the number of samples. Experiments indicate that this is not
* quite correct; actually, what the hardware appears to do is to
* align whatever rectangle is sent down the pipeline to the nearest
* multiple of 2x2 blocks, and then scale it up by a factor of N
* horizontally and 2 vertically. So the resulting alignment is 4
* vertically and either 4 or 16 horizontally, and the scaledown
* factor is 2 vertically and either 2 or 8 horizontally.
*/
switch (irb->mt->num_samples) {
case 4:
x_scaledown = 8;
break;
case 8:
x_scaledown = 2;
break;
default:
assert(!"Unexpected sample count for fast clear");
break;
}
y_scaledown = 2;
x_align = x_scaledown * 2;
y_align = y_scaledown * 2;
}
/* Do the alignment and scaledown. */
x0 = ROUND_DOWN_TO(x0, x_align) / x_scaledown;
y0 = ROUND_DOWN_TO(y0, y_align) / y_scaledown;
x1 = ALIGN(x1, x_align) / x_scaledown;
y1 = ALIGN(y1, y_align) / y_scaledown;
}
}
brw_blorp_clear_params::brw_blorp_clear_params(struct brw_context *brw,
struct gl_framebuffer *fb,
struct gl_renderbuffer *rb,
GLubyte *color_mask,
bool partial_clear)
{
struct gl_context *ctx = &brw->ctx;
struct intel_renderbuffer *irb = intel_renderbuffer(rb);
dst.set(brw, irb->mt, irb->mt_level, irb->mt_layer);
/* Override the surface format according to the context's sRGB rules. */
gl_format format = _mesa_get_render_format(ctx, irb->mt->format);
dst.brw_surfaceformat = brw->render_target_format[format];
x0 = fb->_Xmin;
x1 = fb->_Xmax;
if (rb->Name != 0) {
y0 = fb->_Ymin;
y1 = fb->_Ymax;
} else {
y0 = rb->Height - fb->_Ymax;
y1 = rb->Height - fb->_Ymin;
}
float *push_consts = (float *)&wm_push_consts;
push_consts[0] = ctx->Color.ClearColor.f[0];
push_consts[1] = ctx->Color.ClearColor.f[1];
push_consts[2] = ctx->Color.ClearColor.f[2];
push_consts[3] = ctx->Color.ClearColor.f[3];
use_wm_prog = true;
memset(&wm_prog_key, 0, sizeof(wm_prog_key));
wm_prog_key.use_simd16_replicated_data = true;
/* From the SNB PRM (Vol4_Part1):
*
* "Replicated data (Message Type = 111) is only supported when
* accessing tiled memory. Using this Message Type to access linear
* (untiled) memory is UNDEFINED."
*/
if (irb->mt->region->tiling == I915_TILING_NONE)
wm_prog_key.use_simd16_replicated_data = false;
/* Constant color writes ignore everyting in blend and color calculator
* state. This is not documented.
*/
for (int i = 0; i < 4; i++) {
if (!color_mask[i]) {
color_write_disable[i] = true;
wm_prog_key.use_simd16_replicated_data = false;
}
}
/* If we can do this as a fast color clear, do so. */
if (irb->mt->mcs_state != INTEL_MCS_STATE_NONE && !partial_clear &&
wm_prog_key.use_simd16_replicated_data &&
is_color_fast_clear_compatible(brw, format, &ctx->Color.ClearColor)) {
memset(push_consts, 0xff, 4*sizeof(float));
fast_clear_op = GEN7_FAST_CLEAR_OP_FAST_CLEAR;
/* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render
* Target(s)", beneath the "Fast Color Clear" bullet (p327):
*
* Clear pass must have a clear rectangle that must follow alignment
* rules in terms of pixels and lines as shown in the table
* below. Further, the clear-rectangle height and width must be
* multiple of the following dimensions. If the height and width of
* the render target being cleared do not meet these requirements,
* an MCS buffer can be created such that it follows the requirement
* and covers the RT.
*
* The alignment size in the table that follows is related to the
* alignment size returned by intel_get_non_msrt_mcs_alignment(), but
* with X alignment multiplied by 16 and Y alignment multiplied by 32.
*/
unsigned x_align, y_align;
intel_get_non_msrt_mcs_alignment(brw, irb->mt, &x_align, &y_align);
x_align *= 16;
y_align *= 32;
/* From BSpec: 3D-Media-GPGPU Engine > 3D Pipeline > Pixel > Pixel
* Backend > MCS Buffer for Render Target(s) [DevIVB+] > Table "Color
* Clear of Non-MultiSampled Render Target Restrictions":
*
* Clear rectangle must be aligned to two times the number of pixels in
* the table shown below due to 16x16 hashing across the slice.
*/
x0 = ROUND_DOWN_TO(x0, 2 * x_align);
y0 = ROUND_DOWN_TO(y0, 2 * y_align);
x1 = ALIGN(x1, 2 * x_align);
y1 = ALIGN(y1, 2 * y_align);
/* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render
* Target(s)", beneath the "Fast Color Clear" bullet (p327):
*
* In order to optimize the performance MCS buffer (when bound to 1X
* RT) clear similarly to MCS buffer clear for MSRT case, clear rect
* is required to be scaled by the following factors in the
* horizontal and vertical directions:
*
* The X and Y scale down factors in the table that follows are each
* equal to half the alignment value computed above.
*/
unsigned x_scaledown = x_align / 2;
unsigned y_scaledown = y_align / 2;
x0 /= x_scaledown;
y0 /= y_scaledown;
x1 /= x_scaledown;
y1 /= y_scaledown;
}
}
