static unsigned int sing_ioread32be(void __iomem *addr)
{
unsigned int u1 = ioread16be(addr);
unsigned int u2 = ioread16be(addr + sizeof(short));
/* the first register is assumed to be the most significant */
return (u1<<16) | u2;
}
static inline unsigned long read_tcnt32(struct tpu_priv *p)
{
unsigned long tcnt;
tcnt = ioread16be(p->mapbase1 + TCNT) << 16;
tcnt |= ioread16be(p->mapbase2 + TCNT);
return tcnt;
}
static void print_health_info(struct mlx5_core_dev *dev)
{
struct mlx5_core_health *health = &dev->priv.health;
struct health_buffer __iomem *h = health->health;
char fw_str[18];
u32 fw;
int i;
/* If the syndrome is 0, the device is OK and no need to print buffer */
if (!ioread8(&h->synd))
return;
for (i = 0; i < ARRAY_SIZE(h->assert_var); i++)
dev_err(&dev->pdev->dev, "assert_var[%d] 0x%08x\n", i, ioread32be(h->assert_var + i));
dev_err(&dev->pdev->dev, "assert_exit_ptr 0x%08x\n", ioread32be(&h->assert_exit_ptr));
dev_err(&dev->pdev->dev, "assert_callra 0x%08x\n", ioread32be(&h->assert_callra));
sprintf(fw_str, "%d.%d.%d", fw_rev_maj(dev), fw_rev_min(dev), fw_rev_sub(dev));
dev_err(&dev->pdev->dev, "fw_ver %s\n", fw_str);
dev_err(&dev->pdev->dev, "hw_id 0x%08x\n", ioread32be(&h->hw_id));
dev_err(&dev->pdev->dev, "irisc_index %d\n", ioread8(&h->irisc_index));
dev_err(&dev->pdev->dev, "synd 0x%x: %s\n", ioread8(&h->synd), hsynd_str(ioread8(&h->synd)));
dev_err(&dev->pdev->dev, "ext_synd 0x%04x\n", ioread16be(&h->ext_synd));
fw = ioread32be(&h->fw_ver);
dev_err(&dev->pdev->dev, "raw fw_ver 0x%08x\n", fw);
}
static u16 edma_readw(struct fsl_edma_engine *edma, void __iomem *addr)
{
if (edma->big_endian)
return ioread16be(addr);
else
return ioread16(addr);
}
static int do_conversion(struct file *filp,
struct vmod12e16_conversion *conversion)
{
struct vmod12e16_dev *dev = filp->private_data;
struct vmod12e16_registers __iomem *regs =
(struct vmod12e16_registers __iomem *)dev->config->address;
int channel = conversion->channel;
int ampli = conversion->amplification;
int us_elapsed;
if (down_interruptible(&dev->sem))
return -ERESTARTSYS;
/* explicitly disable interrupt mode for safely polling */
iowrite16be(VMOD_12E16_ADC_INTERRUPT_MASK, ®s->interrupt);
/* specify channel and amplification */
if ((ampli & ~((1<<2)-1)) || channel & ~((1<<4)-1)) {
up(&dev->sem);
return -EINVAL;
}
iowrite16be((ampli<<4) | channel, ®s->control);
/* wait at most the manufacturer-supplied max time */
us_elapsed = 0;
while (us_elapsed < VMOD_12E16_MAX_CONVERSION_TIME) {
udelay(VMOD_12E16_CONVERSION_TIME);
if ((ioread16be(®s->ready) & VMOD_12E16_RDY_BIT) == 0) {
conversion->data = ioread16be(®s->data) & VMOD_12E16_ADC_DATA_MASK;
udelay(VMOD_12E16_CONVERSION_TIME);
up(&dev->sem);
return 0;
}
us_elapsed += VMOD_12E16_CONVERSION_TIME;
}
/* timeout */
up(&dev->sem);
return -ETIME;
}
static unsigned long timer16_get_counter(struct timer16_priv *p)
{
unsigned short v1, v2, v3;
unsigned char o1, o2;
o1 = ioread8(p->mapcommon + TISRC) & p->ovf;
/* Make sure the timer value is stable. Stolen from acpi_pm.c */
do {
o2 = o1;
v1 = ioread16be(p->mapbase + TCNT);
v2 = ioread16be(p->mapbase + TCNT);
v3 = ioread16be(p->mapbase + TCNT);
o1 = ioread8(p->mapcommon + TISRC) & p->ovf;
} while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
|| (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));
if (likely(!o1))
return v2;
else
return v2 + 0x10000;
}
static int b53_mmap_read16(struct b53_device *dev, u8 page, u8 reg, u16 *val)
{
u8 __iomem *regs = dev->priv;
if (WARN_ON(reg % 2))
return -EINVAL;
if (dev->pdata && dev->pdata->big_endian)
*val = ioread16be(regs + (page << 8) + reg);
else
*val = readw(regs + (page << 8) + reg);
return 0;
}
static int b53_mmap_read48(struct b53_device *dev, u8 page, u8 reg, u64 *val)
{
u8 __iomem *regs = dev->priv;
if (WARN_ON(reg % 2))
return -EINVAL;
if (reg % 4) {
u16 lo;
u32 hi;
if (dev->pdata && dev->pdata->big_endian) {
lo = ioread16be(regs + (page << 8) + reg);
hi = ioread32be(regs + (page << 8) + reg + 2);
} else {
lo = readw(regs + (page << 8) + reg);
hi = readl(regs + (page << 8) + reg + 2);
}
*val = ((u64)hi << 16) | lo;
} else {
u32 lo;
u16 hi;
if (dev->pdata && dev->pdata->big_endian) {
lo = ioread32be(regs + (page << 8) + reg);
hi = ioread16be(regs + (page << 8) + reg + 4);
} else {
lo = readl(regs + (page << 8) + reg);
hi = readw(regs + (page << 8) + reg + 4);
}
*val = ((u64)hi << 32) | lo;
}
return 0;
}
static irqreturn_t vmeio_irq(void *arg)
{
struct vmeio_device *dev = arg;
long data;
if (dev->isr_source_address) {
unsigned long data_width = dev->maps[0].data_width;
if (data_width == 4)
data = ioread32be(dev->isr_source_address);
else if (data_width == 2)
data = ioread16be(dev->isr_source_address);
else
data = ioread8(dev->isr_source_address);
dev->isr_source_mask = data;
}
dev->icnt++;
wake_up(&dev->queue);
return IRQ_HANDLED;
}
static int raw_read(struct vmeio_device *dev, struct vmeio_riob *riob)
{
struct vme_mapping *mapx = &dev->maps[riob->mapnum-1];
int dwidth = riob->data_width ? riob->data_width : mapx->data_width;
int byte_dwidth = dwidth/8;
int bsize = riob->wsize * byte_dwidth;
int i, j, cc;
char *map, *iob;
if (bsize > vmeioMAX_BUF)
return -E2BIG;
iob = kmalloc(bsize, GFP_KERNEL);
if (!iob)
return -ENOMEM;
if ((map = mapx->kernel_va) == NULL) {
kfree(iob);
return -ENODEV;
}
if (dev->debug > 1) {
printk("RAW:READ:win:%d map:0x%p offs:0x%X amd:0x%2x dwd:%d words:%d\n",
riob->mapnum, mapx->kernel_va, riob->offset,
mapx->am, dwidth, riob->wsize);
}
for (i = 0, j = riob->offset; i < bsize; i += byte_dwidth, j += byte_dwidth) {
union vmeio_word *dst = (void *)&iob[i];
if (dwidth == VME_D32)
dst->width4 = ioread32be(&map[j]);
else if (dwidth == VME_D16)
dst->width2 = ioread16be(&map[j]);
else if (dwidth == VME_D8)
dst->width1 = ioread8(&map[j]);
else
printk(KERN_ERR PFX "invalid data width %d\n", dwidth);
}
cc = copy_to_user(riob->buffer, iob, bsize);
kfree(iob);
if (cc)
return -EACCES;
return 0;
}
static unsigned long bgpio_read16be(void __iomem *reg)
{
return ioread16be(reg);
}
static inline u8 oc_getreg_16be(struct ocores_i2c *i2c, int reg)
{
return ioread16be(i2c->base + (reg << i2c->reg_shift));
}
static unsigned int regmap_mmio_read16be(struct regmap_mmio_context *ctx,
unsigned int reg)
{
return ioread16be(ctx->regs + reg);
}
static int ipack_device_read_id(struct ipack_device *dev)
{
u8 __iomem *idmem;
int i;
int ret = 0;
idmem = ioremap(dev->region[IPACK_ID_SPACE].start,
dev->region[IPACK_ID_SPACE].size);
if (!idmem) {
dev_err(&dev->dev, "error mapping memory\n");
return -ENOMEM;
}
/* Determine ID PROM Data Format. If we find the ids "IPAC" or "IPAH"
* we are dealing with a IndustryPack format 1 device. If we detect
* "VITA4 " (16 bit big endian formatted) we are dealing with a
* IndustryPack format 2 device */
if ((ioread8(idmem + 1) == 'I') &&
(ioread8(idmem + 3) == 'P') &&
(ioread8(idmem + 5) == 'A') &&
((ioread8(idmem + 7) == 'C') ||
(ioread8(idmem + 7) == 'H'))) {
dev->id_format = IPACK_ID_VERSION_1;
dev->id_avail = ioread8(idmem + 0x15);
if ((dev->id_avail < 0x0c) || (dev->id_avail > 0x40)) {
dev_warn(&dev->dev, "invalid id size");
dev->id_avail = 0x0c;
}
} else if ((ioread8(idmem + 0) == 'I') &&
(ioread8(idmem + 1) == 'V') &&
(ioread8(idmem + 2) == 'A') &&
(ioread8(idmem + 3) == 'T') &&
(ioread8(idmem + 4) == ' ') &&
(ioread8(idmem + 5) == '4')) {
dev->id_format = IPACK_ID_VERSION_2;
dev->id_avail = ioread16be(idmem + 0x16);
if ((dev->id_avail < 0x1a) || (dev->id_avail > 0x40)) {
dev_warn(&dev->dev, "invalid id size");
dev->id_avail = 0x1a;
}
} else {
dev->id_format = IPACK_ID_VERSION_INVALID;
dev->id_avail = 0;
}
if (!dev->id_avail) {
ret = -ENODEV;
goto out;
}
/* Obtain the amount of memory required to store a copy of the complete
* ID ROM contents */
dev->id = kmalloc(dev->id_avail, GFP_KERNEL);
if (!dev->id) {
dev_err(&dev->dev, "dev->id alloc failed.\n");
ret = -ENOMEM;
goto out;
}
for (i = 0; i < dev->id_avail; i++) {
if (dev->id_format == IPACK_ID_VERSION_1)
dev->id[i] = ioread8(idmem + (i << 1) + 1);
else
dev->id[i] = ioread8(idmem + i);
}
/* now we can finally work with the copy */
switch (dev->id_format) {
case IPACK_ID_VERSION_1:
ipack_parse_id1(dev);
break;
case IPACK_ID_VERSION_2:
ipack_parse_id2(dev);
break;
}
out:
iounmap(idmem);
return ret;
}
static inline u8 fpgai2c_reg_get_16be(struct fpgalogic_i2c *i2c, int reg)
{
return ioread16be(i2c->base + (reg << i2c->reg_shift));
}
static inline unsigned short mbus_read16(unsigned long offset)
{
return ioread16be((void *)(zion_dev.regs_base + offset));
}
