/* We first remap the interrupt controllers, and then we install
* the appropriate ISRs to the correct entries in the IDT. This
* is just like installing the exception handlers */
void irq::init()
{
debug_bochs_printf( "irq_install... " );
irq_remap();
int sel = 0x08;
idt::set_gate(32, (unsigned)irq0, sel, 0x8E);
idt::set_gate(33, (unsigned)irq1, sel, 0x8E);
idt::set_gate(34, (unsigned)irq2, sel, 0x8E);
idt::set_gate(35, (unsigned)irq3, sel, 0x8E);
idt::set_gate(36, (unsigned)irq4, sel, 0x8E);
idt::set_gate(37, (unsigned)irq5, sel, 0x8E);
idt::set_gate(38, (unsigned)irq6, sel, 0x8E);
idt::set_gate(39, (unsigned)irq7, sel, 0x8E);
idt::set_gate(40, (unsigned)irq8, sel, 0x8E);
idt::set_gate(41, (unsigned)irq9, sel, 0x8E);
idt::set_gate(42, (unsigned)irq10, sel, 0x8E);
idt::set_gate(43, (unsigned)irq11, sel, 0x8E);
idt::set_gate(44, (unsigned)irq12, sel, 0x8E);
idt::set_gate(45, (unsigned)irq13, sel, 0x8E);
idt::set_gate(46, (unsigned)irq14, sel, 0x8E);
idt::set_gate(47, (unsigned)irq15, sel, 0x8E);
debug_bochs_printf( "done\n" );
}
struct vesa_vbe_mode_info* vesa_get_vbe_mode_info(unsigned short mode)
{
unsigned int handle_irq = irq_lock();
irq_unmap();
struct vesa_vbe_mode_info* result = (struct vesa_vbe_mode_info*)real_call(real_get_vbe_mode_info_id, mode);
irq_remap();
irq_unlock(handle_irq);
return result;
}
int vesa_set_vbe_mode(unsigned short mode)
{
unsigned int handle_irq = irq_lock();
irq_unmap();
int result = real_call(real_set_vbe_mode_id, mode);
irq_remap();
irq_unlock(handle_irq);
return result;
}
void intrs_setup(void) {
// remap interrupts
irq_remap(I8259A_BASE, I8259A_BASE + 8);
// prepare handler table
int i;
for (i = 0; i < 8; ++i) {
irq_mask(i, false);
irq[i] = irq_stub;
}
for (i = 8; i < 16; ++i) {
irq_mask(i, false);
irq[i] = irq_slave;
}
}
/* Installs the IDT */
void idt_install()
{
/* Sets the special IDT pointer up, just like in 'gdt.c' */
idtp.limit = (sizeof (struct idt_entry) * 256) - 1;
idtp.base = (unsigned int)&idt;
memset((unsigned char *)&idt,0,sizeof(struct idt_entry)*256);
/* Add any new ISRs to the IDT here using idt_set_gate */
irq_remap();
isrs_install();
irq_install();
idt_load();
/* Points the processor's internal register to the new IDT */
print_k("%s\n",IDT_MESSAGE);
}
/* Installs the IDT */
void idt_install()
{
memset(&idt, 0, sizeof(struct idt_entry) * 256);
idtp.limit = (sizeof (struct idt_entry) * 256) - 1;
idtp.base = (uint64_t)&idt;
_x86_64_asm_igdt(&idtp);
idt_set_gate(0, (uint64_t)&x86_64_isr_vector0, 0x08, 0x8e);
idt_set_gate(13, (uint64_t)&x86_64_isr_vector13, 0x08, 0x8e); //gpf handler
idt_set_gate(14, (uint64_t)&x86_64_isr_vector14, 0x08, 0x8e); //pf handleR
idt_set_gate(32, (uint64_t)&x86_64_isr_vector1, 0x08, 0x8e); //timer
idt_set_gate(33, (uint64_t)&x86_64_isr_vector2, 0x08, 0x8e); //key board
idt_set_gate(128, (uint64_t)&x86_64_isr_vector3, 0x08, 0x8e); /*putchar, exit, malloc, getpid, getppid etc syscall */
idt_set_gate(129, (uint64_t)&x86_64_isr_vector4, 0x08, 0x8e);
//_x86_64_asm_igdt(&idtp);
irq_remap();
}
void irq_install(void){
irq_remap();
idt_set_gate(32, (unsigned) irq0, 0x08, 0x8E);
idt_set_gate(33, (unsigned) irq1, 0x08, 0x8E);
idt_set_gate(34, (unsigned) irq2, 0x08, 0x8E);
idt_set_gate(35, (unsigned) irq3, 0x08, 0x8E);
idt_set_gate(36, (unsigned) irq4, 0x08, 0x8E);
idt_set_gate(37, (unsigned) irq5, 0x08, 0x8E);
idt_set_gate(38, (unsigned) irq6, 0x08, 0x8E);
idt_set_gate(39, (unsigned) irq7, 0x08, 0x8E);
idt_set_gate(40, (unsigned) irq8, 0x08, 0x8E);
idt_set_gate(41, (unsigned) irq9, 0x08, 0x8E);
idt_set_gate(42, (unsigned) irq10, 0x08, 0x8E);
idt_set_gate(43, (unsigned) irq11, 0x08, 0x8E);
idt_set_gate(44, (unsigned) irq12, 0x08, 0x8E);
idt_set_gate(45, (unsigned) irq13, 0x08, 0x8E);
idt_set_gate(46, (unsigned) irq14, 0x08, 0x8E);
idt_set_gate(47, (unsigned) irq15, 0x08, 0x8E);
}
/* We first remap the interrupt controllers, and then we install
* the appropriate ISRs to the correct entries in the IDT. This
* is just like installing the exception handlers */
void irq_init(){
irq_remap();
idt_install(ISR_IRQ0 + 0, (uint32_t)irq0, SEL_KCODE << 3, GATE_INT, IDT_PR|IDT_DPL_KERN);
idt_install(ISR_IRQ0 + 1, (uint32_t)irq1, SEL_KCODE << 3, GATE_INT, IDT_PR|IDT_DPL_KERN);
idt_install(ISR_IRQ0 + 2, (uint32_t)irq2, SEL_KCODE << 3, GATE_INT, IDT_PR|IDT_DPL_KERN);
idt_install(ISR_IRQ0 + 3, (uint32_t)irq3, SEL_KCODE << 3, GATE_INT, IDT_PR|IDT_DPL_KERN);
idt_install(ISR_IRQ0 + 4, (uint32_t)irq4, SEL_KCODE << 3, GATE_INT, IDT_PR|IDT_DPL_KERN);
idt_install(ISR_IRQ0 + 5, (uint32_t)irq5, SEL_KCODE << 3, GATE_INT, IDT_PR|IDT_DPL_KERN);
idt_install(ISR_IRQ0 + 6, (uint32_t)irq6, SEL_KCODE << 3, GATE_INT, IDT_PR|IDT_DPL_KERN);
idt_install(ISR_IRQ0 + 7, (uint32_t)irq7, SEL_KCODE << 3, GATE_INT, IDT_PR|IDT_DPL_KERN);
idt_install(ISR_IRQ0 + 8, (uint32_t)irq8, SEL_KCODE << 3, GATE_INT, IDT_PR|IDT_DPL_KERN);
idt_install(ISR_IRQ0 + 9, (uint32_t)irq9, SEL_KCODE << 3, GATE_INT, IDT_PR|IDT_DPL_KERN);
idt_install(ISR_IRQ0 + 10, (uint32_t)irq10, SEL_KCODE << 3, GATE_INT, IDT_PR|IDT_DPL_KERN);
idt_install(ISR_IRQ0 + 11, (uint32_t)irq11, SEL_KCODE << 3, GATE_INT, IDT_PR|IDT_DPL_KERN);
idt_install(ISR_IRQ0 + 12, (uint32_t)irq12, SEL_KCODE << 3, GATE_INT, IDT_PR|IDT_DPL_KERN);
idt_install(ISR_IRQ0 + 13, (uint32_t)irq13, SEL_KCODE << 3, GATE_INT, IDT_PR|IDT_DPL_KERN);
idt_install(ISR_IRQ0 + 14, (uint32_t)irq14, SEL_KCODE << 3, GATE_INT, IDT_PR|IDT_DPL_KERN);
idt_install(ISR_IRQ0 + 15, (uint32_t)irq15, SEL_KCODE << 3, GATE_INT, IDT_PR|IDT_DPL_KERN);
}
void irq_install() {
irq_remap();
kernel_log("os", "Installing IRQs\n");
idt_set_gate(32, (unsigned)_irq0, 0x08, 0x8E);
idt_set_gate(33, (unsigned)_irq1, 0x08, 0x8E);
idt_set_gate(34, (unsigned)_irq2, 0x08, 0x8E);
idt_set_gate(35, (unsigned)_irq3, 0x08, 0x8E);
idt_set_gate(36, (unsigned)_irq4, 0x08, 0x8E);
idt_set_gate(37, (unsigned)_irq5, 0x08, 0x8E);
idt_set_gate(38, (unsigned)_irq6, 0x08, 0x8E);
idt_set_gate(39, (unsigned)_irq7, 0x08, 0x8E);
idt_set_gate(40, (unsigned)_irq8, 0x08, 0x8E);
idt_set_gate(41, (unsigned)_irq9, 0x08, 0x8E);
idt_set_gate(42, (unsigned)_irq10, 0x08, 0x8E);
idt_set_gate(43, (unsigned)_irq11, 0x08, 0x8E);
idt_set_gate(44, (unsigned)_irq12, 0x08, 0x8E);
idt_set_gate(45, (unsigned)_irq13, 0x08, 0x8E);
idt_set_gate(46, (unsigned)_irq14, 0x08, 0x8E);
idt_set_gate(47, (unsigned)_irq15, 0x08, 0x8E);
}
/***********************************************************
* Name:
* irq_setup
* Description:
* Sets up the interrupts 32-47
* Parameter:
* ReturnValue:
* EXIT_SUCCESS
*
**********************************************************/
void irq_setup(){
irq_remap();
idt_segment(IRQ_32, (unsigned)irq32, 0x08, 0x8E);
idt_segment(IRQ_KEYBOARD, (unsigned)irq33, 0x08, 0x8E);
idt_segment(IRQ_34, (unsigned)irq34, 0x08, 0x8E);
idt_segment(IRQ_35, (unsigned)irq35, 0x08, 0x8E);
idt_segment(IRQ_36, (unsigned)irq36, 0x08, 0x8E);
idt_segment(IRQ_37, (unsigned)irq37, 0x08, 0x8E);
idt_segment(IRQ_38, (unsigned)irq38, 0x08, 0x8E);
idt_segment(IRQ_39, (unsigned)irq39, 0x08, 0x8E);
idt_segment(IRQ_40, (unsigned)irq40, 0x08, 0x8E);
idt_segment(IRQ_41, (unsigned)irq41, 0x08, 0x8E);
idt_segment(IRQ_42, (unsigned)irq42, 0x08, 0x8E);
idt_segment(IRQ_43, (unsigned)irq43, 0x08, 0x8E);
idt_segment(IRQ_44, (unsigned)irq44, 0x08, 0x8E);
idt_segment(IRQ_45, (unsigned)irq46, 0x08, 0x8E);
idt_segment(IRQ_46, (unsigned)irq46, 0x08, 0x8E);
idt_segment(IRQ_47, (unsigned)irq47, 0x08, 0x8E);
}
void irq_install() // Installs IRQ entries in the IDT
{
irq_remap(); // Remaps IRQ entries before installing them
idt_set_gate(32, (unsigned)irq0, 0x08, 0x8E);
idt_set_gate(33, (unsigned)irq1, 0x08, 0x8E);
idt_set_gate(34, (unsigned)irq2, 0x08, 0x8E);
idt_set_gate(35, (unsigned)irq3, 0x08, 0x8E);
idt_set_gate(36, (unsigned)irq4, 0x08, 0x8E);
idt_set_gate(37, (unsigned)irq5, 0x08, 0x8E);
idt_set_gate(38, (unsigned)irq6, 0x08, 0x8E);
idt_set_gate(39, (unsigned)irq7, 0x08, 0x8E);
idt_set_gate(40, (unsigned)irq8, 0x08, 0x8E);
idt_set_gate(41, (unsigned)irq9, 0x08, 0x8E);
idt_set_gate(42, (unsigned)irq10, 0x08, 0x8E);
idt_set_gate(43, (unsigned)irq11, 0x08, 0x8E);
idt_set_gate(44, (unsigned)irq12, 0x08, 0x8E);
idt_set_gate(45, (unsigned)irq13, 0x08, 0x8E);
idt_set_gate(46, (unsigned)irq14, 0x08, 0x8E);
idt_set_gate(47, (unsigned)irq15, 0x08, 0x8E);
}
//硬件中断初始化
void ArInitializeIrq()
{
RtlZeroMemory( irq_routines, sizeof(irq_routines) );
//重新映射irq
irq_remap();
// IDT初始化
SET_INTR_GATE(32, (void*)irq0);
SET_INTR_GATE(33, (void*)irq1);
SET_INTR_GATE(34, (void*)irq2);
SET_INTR_GATE(35, (void*)irq3);
SET_INTR_GATE(36, (void*)irq4);
SET_INTR_GATE(37, (void*)irq5);
SET_INTR_GATE(38, (void*)irq6);
SET_INTR_GATE(39, (void*)irq7);
SET_INTR_GATE(40, (void*)irq8);
SET_INTR_GATE(41, (void*)irq9);
SET_INTR_GATE(42, (void*)irq10);
SET_INTR_GATE(43, (void*)irq11);
SET_INTR_GATE(44, (void*)irq12);
SET_INTR_GATE(45, (void*)irq13);
SET_INTR_GATE(46, (void*)irq14);
SET_INTR_GATE(47, (void*)irq15);
}
/* remap interrupt controllers, and then init ISRs to their IDT entries */
void irq_init()
{
irq_remap();
idt_set_gate(32, (unsigned)irq0, 0x08, 0x8E);
idt_set_gate(33, (unsigned)irq1, 0x08, 0x8E);
idt_set_gate(34, (unsigned)irq2, 0x08, 0x8E);
idt_set_gate(35, (unsigned)irq3, 0x08, 0x8E);
idt_set_gate(36, (unsigned)irq4, 0x08, 0x8E);
idt_set_gate(37, (unsigned)irq5, 0x08, 0x8E);
idt_set_gate(38, (unsigned)irq6, 0x08, 0x8E);
idt_set_gate(39, (unsigned)irq7, 0x08, 0x8E);
idt_set_gate(40, (unsigned)irq8, 0x08, 0x8E);
idt_set_gate(41, (unsigned)irq9, 0x08, 0x8E);
idt_set_gate(42, (unsigned)irq10, 0x08, 0x8E);
idt_set_gate(43, (unsigned)irq11, 0x08, 0x8E);
idt_set_gate(44, (unsigned)irq12, 0x08, 0x8E);
idt_set_gate(45, (unsigned)irq13, 0x08, 0x8E);
idt_set_gate(46, (unsigned)irq14, 0x08, 0x8E);
idt_set_gate(47, (unsigned)irq15, 0x08, 0x8E);
puts("Interupt Requests (IRQs) initialised\n");
}
void Irq_Install()
{
irq_remap();
idt_set_gate(32, (unsigned)irq0, 0x08, 0x8E);
idt_set_gate(33, (unsigned)irq1, 0x08, 0x8E);
idt_set_gate(34, (unsigned)irq2, 0x08, 0x8E);
idt_set_gate(35, (unsigned)irq3, 0x08, 0x8E);
idt_set_gate(36, (unsigned)irq4, 0x08, 0x8E);
idt_set_gate(37, (unsigned)irq5, 0x08, 0x8E);
idt_set_gate(38, (unsigned)irq6, 0x08, 0x8E);
idt_set_gate(39, (unsigned)irq7, 0x08, 0x8E);
idt_set_gate(40, (unsigned)irq8, 0x08, 0x8E);
idt_set_gate(41, (unsigned)irq9, 0x08, 0x8E);
idt_set_gate(42, (unsigned)irq10, 0x08, 0x8E);
idt_set_gate(43, (unsigned)irq11, 0x08, 0x8E);
idt_set_gate(44, (unsigned)irq12, 0x08, 0x8E);
idt_set_gate(45, (unsigned)irq13, 0x08, 0x8E);
idt_set_gate(46, (unsigned)irq14, 0x08, 0x8E);
idt_set_gate(47, (unsigned)irq15, 0x08, 0x8E);
Console_Write_Char('b');
}
void irq_init()
{
//Remap PICs
irq_remap();
//Add interrupts to IDT
idt_set_gate(32,(unsigned)irq0,0x08,0x8E);
idt_set_gate(33,(unsigned)irq1,0x08,0x8E);
idt_set_gate(34,(unsigned)irq2,0x08,0x8E);
idt_set_gate(35,(unsigned)irq3,0x08,0x8E);
idt_set_gate(36,(unsigned)irq4,0x08,0x8E);
idt_set_gate(37,(unsigned)irq5,0x08,0x8E);
idt_set_gate(38,(unsigned)irq6,0x08,0x8E);
idt_set_gate(39,(unsigned)irq7,0x08,0x8E);
idt_set_gate(40,(unsigned)irq8,0x08,0x8E);
idt_set_gate(41,(unsigned)irq9,0x08,0x8E);
idt_set_gate(42,(unsigned)irq10,0x08,0x8E);
idt_set_gate(43,(unsigned)irq11,0x08,0x8E);
idt_set_gate(44,(unsigned)irq12,0x08,0x8E);
idt_set_gate(45,(unsigned)irq13,0x08,0x8E);
idt_set_gate(46,(unsigned)irq14,0x08,0x8E);
idt_set_gate(47,(unsigned)irq15,0x08,0x8E);
}
/* We first remap the interrupt controllers, and then we install
* the appropriate ISRs to the correct entries in the IDT. This
* is just like installing the exception handlers */
void irq_install()
{
kprintc(":: Installing ", BLACK, LIGHT_RED);
kprintc("IRQs\n", BLACK, LIGHT_CYAN);
irq_remap();
idt_set_gate(32, (unsigned)_irq0, 0x08, 0x8E);
idt_set_gate(33, (unsigned)_irq1, 0x08, 0x8E);
idt_set_gate(34, (unsigned)_irq2, 0x08, 0x8E);
idt_set_gate(35, (unsigned)_irq3, 0x08, 0x8E);
idt_set_gate(36, (unsigned)_irq4, 0x08, 0x8E);
idt_set_gate(37, (unsigned)_irq5, 0x08, 0x8E);
idt_set_gate(38, (unsigned)_irq6, 0x08, 0x8E);
idt_set_gate(39, (unsigned)_irq7, 0x08, 0x8E);
idt_set_gate(40, (unsigned)_irq8, 0x08, 0x8E);
idt_set_gate(41, (unsigned)_irq9, 0x08, 0x8E);
idt_set_gate(42, (unsigned)_irq10, 0x08, 0x8E);
idt_set_gate(43, (unsigned)_irq11, 0x08, 0x8E);
idt_set_gate(44, (unsigned)_irq12, 0x08, 0x8E);
idt_set_gate(45, (unsigned)_irq13, 0x08, 0x8E);
idt_set_gate(46, (unsigned)_irq14, 0x08, 0x8E);
idt_set_gate(47, (unsigned)_irq15, 0x08, 0x8E);
}
/** @brief Remap IRQs and install ISRs in IDT
*
* We first remap the interrupt controllers, and then we install
* the appropriate ISRs to the correct entries in the IDT.\n
* This is just like installing the exception handlers
*/
static int irq_install(void)
{
irq_remap();
idt_set_gate(32, (size_t)irq0, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
idt_set_gate(33, (size_t)irq1, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
idt_set_gate(34, (size_t)irq2, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
idt_set_gate(35, (size_t)irq3, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
idt_set_gate(36, (size_t)irq4, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
idt_set_gate(37, (size_t)irq5, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
idt_set_gate(38, (size_t)irq6, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
idt_set_gate(39, (size_t)irq7, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
idt_set_gate(40, (size_t)irq8, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
idt_set_gate(41, (size_t)irq9, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
idt_set_gate(42, (size_t)irq10, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
idt_set_gate(43, (size_t)irq11, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
idt_set_gate(44, (size_t)irq12, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
idt_set_gate(45, (size_t)irq13, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
idt_set_gate(46, (size_t)irq14, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
idt_set_gate(47, (size_t)irq15, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
idt_set_gate(48, (size_t)irq16, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
idt_set_gate(49, (size_t)irq17, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
idt_set_gate(50, (size_t)irq18, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
idt_set_gate(51, (size_t)irq19, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
idt_set_gate(52, (size_t)irq20, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
idt_set_gate(53, (size_t)irq21, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
idt_set_gate(54, (size_t)irq22, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
idt_set_gate(55, (size_t)irq23, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
// add APIC interrupt handler
idt_set_gate(123, (size_t)apic_timer, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
idt_set_gate(124, (size_t)apic_lint0, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
idt_set_gate(125, (size_t)apic_lint1, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
idt_set_gate(126, (size_t)apic_error, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
idt_set_gate(127, (size_t)apic_svr, KERNEL_CODE_SELECTOR,
IDT_FLAG_PRESENT|IDT_FLAG_RING0|IDT_FLAG_32BIT|IDT_FLAG_INTTRAP);
return 0;
}
/*riempie la IDT (interrupt descriptor table)*/
void initIdt(void) {
/* inizializzazione */
int c;
diskInterrupt[0] = 0;
diskInterrupt[1] = 0;
asm("cli");
xtemp = 0;
for (c = 0;c < 256;c++)
addIdtSeg(c, 0, 0, 0);
/*inizializza i selettori*/
isr0TSSselector=segmentSelector ( ISR_TSS_INDEX+0,0,RPL_KERNEL );
isr1TSSselector=segmentSelector ( ISR_TSS_INDEX+1,0,RPL_KERNEL );
isr2TSSselector=segmentSelector ( ISR_TSS_INDEX+2,0,RPL_KERNEL );
isr3TSSselector=segmentSelector ( ISR_TSS_INDEX+3,0,RPL_KERNEL );
isr4TSSselector=segmentSelector ( ISR_TSS_INDEX+4,0,RPL_KERNEL );
isr5TSSselector=segmentSelector ( ISR_TSS_INDEX+5,0,RPL_KERNEL );
isr6TSSselector=segmentSelector ( ISR_TSS_INDEX+6,0,RPL_KERNEL );
isr7TSSselector=segmentSelector ( ISR_TSS_INDEX+7,0,RPL_KERNEL );
isr8TSSselector=segmentSelector ( ISR_TSS_INDEX+8,0,RPL_KERNEL );
isr9TSSselector=segmentSelector ( ISR_TSS_INDEX+9,0,RPL_KERNEL );
isr10TSSselector=segmentSelector ( ISR_TSS_INDEX+10,0,RPL_KERNEL );
isr11TSSselector=segmentSelector ( ISR_TSS_INDEX+11,0,RPL_KERNEL );
isr12TSSselector=segmentSelector ( ISR_TSS_INDEX+12,0,RPL_KERNEL );
isr13TSSselector=segmentSelector ( ISR_TSS_INDEX+13,0,RPL_KERNEL );
isr14TSSselector=segmentSelector ( ISR_TSS_INDEX+14,0,RPL_KERNEL );
isr15TSSselector=segmentSelector ( ISR_TSS_INDEX+15,0,RPL_KERNEL );
isr16TSSselector=segmentSelector ( ISR_TSS_INDEX+16,0,RPL_KERNEL );
isr17TSSselector=segmentSelector ( ISR_TSS_INDEX+17,0,RPL_KERNEL );
isr18TSSselector=segmentSelector ( ISR_TSS_INDEX+18,0,RPL_KERNEL );
isr32TSSselector=segmentSelector ( ISR_TSS_INDEX+32,0,RPL_KERNEL );
isr33TSSselector=segmentSelector ( ISR_TSS_INDEX+33,0,RPL_KERNEL );
isr34TSSselector=segmentSelector ( ISR_TSS_INDEX+34,0,RPL_KERNEL );
isr46TSSselector=segmentSelector ( ISR_TSS_INDEX+46,0,RPL_KERNEL );
isr47TSSselector=segmentSelector ( ISR_TSS_INDEX+47,0,RPL_KERNEL );
isrx80TSSselector=segmentSelector ( ISR_TSS_INDEX+0x80,0,RPL_KERNEL );
/*inizializza i TSS*/
isr0TSS=kernelInterruptTSS;
isr0TSS.eip=(unsigned int)isr_0;
isr1TSS=kernelInterruptTSS;
isr1TSS.eip=(unsigned int)isr_1;
isr2TSS=kernelInterruptTSS;
isr2TSS.eip=(unsigned int)isr_2;
isr3TSS=kernelInterruptTSS;
isr3TSS.eip=(unsigned int)isr_3;
isr4TSS=kernelInterruptTSS;
isr4TSS.eip=(unsigned int)isr_4;
isr5TSS=kernelInterruptTSS;
isr5TSS.eip=(unsigned int)isr_5;
isr6TSS=kernelInterruptTSS;
isr6TSS.eip=(unsigned int)isr_6;
isr7TSS=kernelInterruptTSS;
isr7TSS.eip=(unsigned int)isr_7;
isr8TSS=kernelInterruptTSS;
isr8TSS.eip=(unsigned int)isr_8;
isr9TSS=kernelInterruptTSS;
isr9TSS.eip=(unsigned int)isr_9;
isr10TSS=kernelInterruptTSS;
isr10TSS.eip=(unsigned int)isr_10;
isr11TSS=kernelInterruptTSS;
isr11TSS.eip=(unsigned int)isr_11;
isr12TSS=kernelInterruptTSS;
isr12TSS.eip=(unsigned int)isr_12;
isr13TSS=kernelInterruptTSS;
isr13TSS.eip=(unsigned int)isr_13;
isr14TSS=kernelInterruptTSS;
isr14TSS.eip=(unsigned int)isr_14;
isr15TSS=kernelInterruptTSS;
isr15TSS.eip=(unsigned int)isr_15;
isr16TSS=kernelInterruptTSS;
isr16TSS.eip=(unsigned int)isr_16;
isr17TSS=kernelInterruptTSS;
isr17TSS.eip=(unsigned int)isr_17;
isr18TSS=kernelInterruptTSS;
isr18TSS.eip=(unsigned int)isr_18;
isr32TSS=kernelInterruptTSS;
isr32TSS.eip=(unsigned int)isr_32;
isr33TSS=kernelInterruptTSS;
isr33TSS.eip=(unsigned int)isr_33;
isr34TSS=kernelInterruptTSS;
isr34TSS.eip=(unsigned int)isr_34;
isr46TSS=kernelInterruptTSS;
isr46TSS.eip=(unsigned int)isr_46;
isr47TSS=kernelInterruptTSS;
isr47TSS.eip=(unsigned int)isr_47;
isrx80TSS=kernelInterruptTSS;
isrx80TSS.eip=(unsigned int)isr_x80;
/*inizializza i descrittori*/
TSSset(ISR_TSS_INDEX+0,(unsigned int)&isr0TSS,MEM_TSS|MEM_KERNEL|MEM_PRESENT);
TSSset(ISR_TSS_INDEX+1,(unsigned int)&isr1TSS,MEM_TSS|MEM_KERNEL|MEM_PRESENT);
TSSset(ISR_TSS_INDEX+2,(unsigned int)&isr2TSS,MEM_TSS|MEM_KERNEL|MEM_PRESENT);
TSSset(ISR_TSS_INDEX+3,(unsigned int)&isr3TSS,MEM_TSS|MEM_KERNEL|MEM_PRESENT);
TSSset(ISR_TSS_INDEX+4,(unsigned int)&isr4TSS,MEM_TSS|MEM_KERNEL|MEM_PRESENT);
TSSset(ISR_TSS_INDEX+5,(unsigned int)&isr5TSS,MEM_TSS|MEM_KERNEL|MEM_PRESENT);
TSSset(ISR_TSS_INDEX+6,(unsigned int)&isr6TSS,MEM_TSS|MEM_KERNEL|MEM_PRESENT);
TSSset(ISR_TSS_INDEX+7,(unsigned int)&isr7TSS,MEM_TSS|MEM_KERNEL|MEM_PRESENT);
TSSset(ISR_TSS_INDEX+8,(unsigned int)&isr8TSS,MEM_TSS|MEM_KERNEL|MEM_PRESENT);
TSSset(ISR_TSS_INDEX+9,(unsigned int)&isr9TSS,MEM_TSS|MEM_KERNEL|MEM_PRESENT);
TSSset(ISR_TSS_INDEX+10,(unsigned int)&isr10TSS,MEM_TSS|MEM_KERNEL|MEM_PRESENT);
TSSset(ISR_TSS_INDEX+11,(unsigned int)&isr11TSS,MEM_TSS|MEM_KERNEL|MEM_PRESENT);
TSSset(ISR_TSS_INDEX+12,(unsigned int)&isr12TSS,MEM_TSS|MEM_KERNEL|MEM_PRESENT);
TSSset(ISR_TSS_INDEX+13,(unsigned int)&isr13TSS,MEM_TSS|MEM_KERNEL|MEM_PRESENT);
TSSset(ISR_TSS_INDEX+14,(unsigned int)&isr14TSS,MEM_TSS|MEM_KERNEL|MEM_PRESENT);
TSSset(ISR_TSS_INDEX+15,(unsigned int)&isr15TSS,MEM_TSS|MEM_KERNEL|MEM_PRESENT);
TSSset(ISR_TSS_INDEX+16,(unsigned int)&isr16TSS,MEM_TSS|MEM_KERNEL|MEM_PRESENT);
TSSset(ISR_TSS_INDEX+17,(unsigned int)&isr17TSS,MEM_TSS|MEM_KERNEL|MEM_PRESENT);
TSSset(ISR_TSS_INDEX+18,(unsigned int)&isr18TSS,MEM_TSS|MEM_KERNEL|MEM_PRESENT);
TSSset(ISR_TSS_INDEX+32,(unsigned int)&isr32TSS,MEM_TSS|MEM_KERNEL|MEM_PRESENT);
TSSset(ISR_TSS_INDEX+33,(unsigned int)&isr33TSS,MEM_TSS|MEM_KERNEL|MEM_PRESENT);
TSSset(ISR_TSS_INDEX+34,(unsigned int)&isr34TSS,MEM_TSS|MEM_KERNEL|MEM_PRESENT);
TSSset(ISR_TSS_INDEX+46,(unsigned int)&isr46TSS,MEM_TSS|MEM_KERNEL|MEM_PRESENT);
TSSset(ISR_TSS_INDEX+47,(unsigned int)&isr47TSS,MEM_TSS|MEM_KERNEL|MEM_PRESENT);
TSSset(ISR_TSS_INDEX+0x80,(unsigned int)&isrx80TSS,MEM_TSS|MEM_KERNEL|MEM_PRESENT);
/*inizializza la IDT*/
addIdtGate(0,INTERRUPT_PRESENT, isr0TSSselector);
addIdtGate(1,INTERRUPT_PRESENT, isr1TSSselector);
addIdtGate(2,INTERRUPT_PRESENT, isr2TSSselector);
addIdtGate(3,INTERRUPT_PRESENT, isr3TSSselector);
addIdtGate(4,INTERRUPT_PRESENT, isr4TSSselector);
addIdtGate(5,INTERRUPT_PRESENT, isr5TSSselector);
addIdtGate(6,INTERRUPT_PRESENT, isr6TSSselector);
addIdtGate(7,INTERRUPT_PRESENT, isr7TSSselector);
addIdtGate(8,INTERRUPT_PRESENT, isr8TSSselector);
addIdtGate(9,INTERRUPT_PRESENT, isr9TSSselector);
addIdtGate(10,INTERRUPT_PRESENT, isr10TSSselector);
addIdtGate(11,INTERRUPT_PRESENT, isr11TSSselector);
addIdtGate(12,INTERRUPT_PRESENT, isr12TSSselector);
addIdtGate(13,INTERRUPT_PRESENT, isr13TSSselector);
addIdtGate(14,INTERRUPT_PRESENT, isr14TSSselector);
addIdtGate(15,INTERRUPT_PRESENT, isr15TSSselector);
addIdtGate(16,INTERRUPT_PRESENT, isr16TSSselector);
addIdtGate(17,INTERRUPT_PRESENT, isr17TSSselector);
addIdtGate(18,INTERRUPT_PRESENT, isr18TSSselector);
addIdtGate(32,INTERRUPT_PRESENT|INTERRUPT_DPL_USER, isr32TSSselector);
addIdtGate(33,INTERRUPT_PRESENT|INTERRUPT_DPL_USER, isr33TSSselector);
for (c = 34;c < 50;c++)
addIdtGate(c,INTERRUPT_PRESENT, isr34TSSselector);
addIdtGate(46,INTERRUPT_PRESENT, isr46TSSselector);
addIdtGate(47,INTERRUPT_PRESENT, isr47TSSselector);
addIdtGate(0x80,INTERRUPT_PRESENT|INTERRUPT_DPL_USER, isrx80TSSselector);
idt_pointer.limit = 0xFFFF;
idt_pointer.base = (unsigned int) & idt;
/*scrive idt_pointer nel registro lidt*/
idt_load();
/*rimappa gli offset delle interrupt generate dai PIC*/
/* 32 40 */
irq_remap(0x20, 0x28);
//asm("int $0x80");
}
void kernel_main(unsigned long magic, unsigned long addr)
{
multiboot_info_t *mbi;
terminal_initialize();
init_debug();
if (magic != 0x2BADB002)
{
panic("booted by non multiboot loader!");
}
mbi = (multiboot_info_t *)addr;
if (CHECK_FLAG (mbi->flags, 0))
{
lower = mbi->mem_lower;
upper = mbi->mem_upper;
}
if (CHECK_FLAG (mbi->flags, 1))
printklog ("[mboot diag] boot_device = 0x%x\n", (unsigned) mbi->boot_device);
if (CHECK_FLAG (mbi->flags, 2))
printklog ("[mboot diag] cmdline = %s\n", (char *) mbi->cmdline);
if (CHECK_FLAG (mbi->flags, 4) && CHECK_FLAG (mbi->flags, 5))
{
panic("[mboot diag] Both bits 4 and 5 are set.\n");
return;
}
printklog("\n");
if (CHECK_FLAG (mbi->flags, 0))
{
mem_all = mbi->mem_lower + mbi->mem_upper + 512 + 1;
printklog ("%u KB of memory detected\n", (unsigned) mem_all);
}
kprintf("start:\t addr: 0x100000\n");
kprintf("head:\tstart: 0x%x\tend: 0x%x\n", (uint32_t) multiboot_start, (uint32_t) multiboot_end);
kprintf("text:\tstart: 0x%x\tend: 0x%x\n", (uint32_t) text_start, (uint32_t) text_end);
kprintf("rodata:\tstart: 0x%x\tend: 0x%x\n", (uint32_t) rodata_start, (uint32_t) rodata_end);
kprintf("data:\tstart: 0x%x\tend: 0x%x\n", (uint32_t) data_start, (uint32_t) data_end);
kprintf("common:\tstart: 0x%x\tend: 0x%x\n", (uint32_t) common_start, (uint32_t) common_end);
kprintf("bss:\tstart: 0x%x\tend: 0x%x\n", (uint32_t) bss_start, (uint32_t) bss_end);
kprintf("stack:\tstart: 0x%x\tend: 0x%x\n", (uint32_t) bootstrap_stack_start, (uint32_t)bootstrap_stack_end);
if (CHECK_FLAG (mbi->flags, 5))
{
multiboot_elf_section_header_table_t *multiboot_elf_sec = &(mbi->u.elf_sec);
kprintf("elf:\tstart: 0x%x\tend: 0x%x\n", (uint32_t) multiboot_elf_sec->addr, (uint32_t) (multiboot_elf_sec->addr + multiboot_elf_sec->size));
elf_sec_end = multiboot_elf_sec->addr + multiboot_elf_sec->size;
}
if (CHECK_FLAG (mbi->flags, 3))
{
multiboot_module_t *mod;
mod = (multiboot_module_t *) mbi->mods_addr;
for(uint32_t i=0;i<mbi->mods_count;i++)
{
kprintf ("m 0x%x:\tstart: 0x%x\tend: 0x%x\n",(uint32_t) (i+1), (uint32_t) mod->mod_start,(uint32_t) mod->mod_end);
modules[i].start = (uint32_t) mod->mod_start;
modules[i].end = (uint32_t) mod->mod_end;
mod++;
}
}
printklog("\n");
if(mbi->mods_count>0)
{
kprintf("end: \t addr: 0x%x\n", (uint32_t) modules[(mbi->mods_count)-1].end);
kernel_end = modules[(mbi->mods_count)-1].end + 0x1000;
}
else
{
kprintf("end: \t addr: 0x%x\n", (uint32_t) elf_sec_end);
kernel_end = elf_sec_end + 0x1000;
}
kernel_end = kernel_end - (kernel_end%0x1000);
kprintf("kend: \t addr: 0x%x\n", (uint32_t) kernel_end);
init_gdt();
irq_remap();
init_idt();
init_vmm();
asm ("cli");
asm ("sti");
}
/*
* Initialize 8259 interrupt controllers.
* All interrupts will be masked off in ICU.
* This is called by interrupt_init() from 'sys/irq.c'
*/
void ArchController::archinit(void)
{
irq_remap();
return;
}
/* Initializes the interrupt handler system */
void interrupt_init(void) {
memset(_handlers, 0, sizeof(_isr) * 256);
/* Re-map the irq table to use ISRs 32 -> 47 */
irq_remap(0x20, 0x28);
}
/*
* Set up interrupt handler for hardware devices.
*/
void irq_install(void) {
irq_remap();
irq_gates();
IRQ_RES;
}
/*
* Set up interrupt handler for hardware devices.
*/
void irq_install(void) {
irq_remap();
irq_gates();
STI;
}
//初始化IRQ
void irq_init()
{
//0x08 code段在gdt偏移
//加入段存在标志
uint8 flags = BIT7 | TRAP_GATE;
//CPU中断
idt_set_gate(0, (uint32)irq0, 0x08, flags);
idt_set_gate(1, (uint32)irq1, 0x08, flags);
idt_set_gate(2, (uint32)irq2, 0x08, flags);
idt_set_gate(3, (uint32)irq3, 0x08, flags);
idt_set_gate(4, (uint32)irq4, 0x08, flags);
idt_set_gate(5, (uint32)irq5, 0x08, flags);
idt_set_gate(6, (uint32)irq6, 0x08, flags);
idt_set_gate(7, (uint32)irq7, 0x08, flags);
idt_set_gate(8, (uint32)irq8, 0x08, flags);
idt_set_gate(9, (uint32)irq9, 0x08, flags);
idt_set_gate(10, (uint32)irq10, 0x08, flags);
idt_set_gate(11, (uint32)irq11, 0x08, flags);
idt_set_gate(12, (uint32)irq12, 0x08, flags);
idt_set_gate(13, (uint32)irq13, 0x08, flags);
idt_set_gate(14, (uint32)irq14, 0x08, flags);
idt_set_gate(15, (uint32)irq15, 0x08, flags);
idt_set_gate(16, (uint32)irq16, 0x08, flags);
idt_set_gate(17, (uint32)irq17, 0x08, flags);
idt_set_gate(18, (uint32)irq18, 0x08, flags);
idt_set_gate(19, (uint32)irq19, 0x08, flags);
idt_set_gate(20, (uint32)irq20, 0x08, flags);
idt_set_gate(21, (uint32)irq21, 0x08, flags);
idt_set_gate(22, (uint32)irq22, 0x08, flags);
idt_set_gate(23, (uint32)irq23, 0x08, flags);
idt_set_gate(24, (uint32)irq24, 0x08, flags);
idt_set_gate(25, (uint32)irq25, 0x08, flags);
idt_set_gate(26, (uint32)irq26, 0x08, flags);
idt_set_gate(27, (uint32)irq27, 0x08, flags);
idt_set_gate(28, (uint32)irq28, 0x08, flags);
idt_set_gate(29, (uint32)irq29, 0x08, flags);
idt_set_gate(30, (uint32)irq30, 0x08, flags);
idt_set_gate(31, (uint32)irq31, 0x08, flags);
irq_remap();
//系统中断
idt_set_gate(32, (uint32)irq32, 0x08, flags);
idt_set_gate(33, (uint32)irq33, 0x08, flags);
idt_set_gate(34, (uint32)irq34, 0x08, flags);
idt_set_gate(35, (uint32)irq35, 0x08, flags);
idt_set_gate(36, (uint32)irq36, 0x08, flags);
idt_set_gate(37, (uint32)irq37, 0x08, flags);
idt_set_gate(38, (uint32)irq38, 0x08, flags);
idt_set_gate(39, (uint32)irq39, 0x08, flags);
idt_set_gate(40, (uint32)irq40, 0x08, flags);
idt_set_gate(41, (uint32)irq41, 0x08, flags);
idt_set_gate(42, (uint32)irq42, 0x08, flags);
idt_set_gate(43, (uint32)irq43, 0x08, flags);
idt_set_gate(44, (uint32)irq44, 0x08, flags);
idt_set_gate(45, (uint32)irq45, 0x08, flags);
idt_set_gate(46, (uint32)irq46, 0x08, flags);
idt_set_gate(47, (uint32)irq47, 0x08, flags);
}
