/* Scan an FR-V prologue, starting at PC, until frame->PC.
If FRAME is non-zero, fill in its saved_regs with appropriate addresses.
We assume FRAME's saved_regs array has already been allocated and cleared.
Return the first PC value after the prologue.
Note that, for unoptimized code, we almost don't need this function
at all; all arguments and locals live on the stack, so we just need
the FP to find everything. The catch: structures passed by value
have their addresses living in registers; they're never spilled to
the stack. So if you ever want to be able to get to these
arguments in any frame but the top, you'll need to do this serious
prologue analysis. */
static CORE_ADDR
frv_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR pc,
struct frame_info *this_frame,
struct frv_unwind_cache *info)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
/* When writing out instruction bitpatterns, we use the following
letters to label instruction fields:
P - The parallel bit. We don't use this.
J - The register number of GRj in the instruction description.
K - The register number of GRk in the instruction description.
I - The register number of GRi.
S - a signed imediate offset.
U - an unsigned immediate offset.
The dots below the numbers indicate where hex digit boundaries
fall, to make it easier to check the numbers. */
/* Non-zero iff we've seen the instruction that initializes the
frame pointer for this function's frame. */
int fp_set = 0;
/* If fp_set is non_zero, then this is the distance from
the stack pointer to frame pointer: fp = sp + fp_offset. */
int fp_offset = 0;
/* Total size of frame prior to any alloca operations. */
int framesize = 0;
/* Flag indicating if lr has been saved on the stack. */
int lr_saved_on_stack = 0;
/* The number of the general-purpose register we saved the return
address ("link register") in, or -1 if we haven't moved it yet. */
int lr_save_reg = -1;
/* Offset (from sp) at which lr has been saved on the stack. */
int lr_sp_offset = 0;
/* If gr_saved[i] is non-zero, then we've noticed that general
register i has been saved at gr_sp_offset[i] from the stack
pointer. */
char gr_saved[64];
int gr_sp_offset[64];
/* The address of the most recently scanned prologue instruction. */
CORE_ADDR last_prologue_pc;
/* The address of the next instruction. */
CORE_ADDR next_pc;
/* The upper bound to of the pc values to scan. */
CORE_ADDR lim_pc;
memset (gr_saved, 0, sizeof (gr_saved));
last_prologue_pc = pc;
/* Try to compute an upper limit (on how far to scan) based on the
line number info. */
lim_pc = skip_prologue_using_sal (gdbarch, pc);
/* If there's no line number info, lim_pc will be 0. In that case,
set the limit to be 100 instructions away from pc. Hopefully, this
will be far enough away to account for the entire prologue. Don't
worry about overshooting the end of the function. The scan loop
below contains some checks to avoid scanning unreasonably far. */
if (lim_pc == 0)
lim_pc = pc + 400;
/* If we have a frame, we don't want to scan past the frame's pc. This
will catch those cases where the pc is in the prologue. */
if (this_frame)
{
CORE_ADDR frame_pc = get_frame_pc (this_frame);
if (frame_pc < lim_pc)
lim_pc = frame_pc;
}
/* Scan the prologue. */
while (pc < lim_pc)
{
gdb_byte buf[frv_instr_size];
LONGEST op;
if (target_read_memory (pc, buf, sizeof buf) != 0)
break;
op = extract_signed_integer (buf, sizeof buf, byte_order);
next_pc = pc + 4;
/* The tests in this chain of ifs should be in order of
decreasing selectivity, so that more particular patterns get
to fire before less particular patterns. */
/* Some sort of control transfer instruction: stop scanning prologue.
Integer Conditional Branch:
X XXXX XX 0000110 XX XXXXXXXXXXXXXXXX
Floating-point / media Conditional Branch:
X XXXX XX 0000111 XX XXXXXXXXXXXXXXXX
LCR Conditional Branch to LR
X XXXX XX 0001110 XX XX 001 X XXXXXXXXXX
Integer conditional Branches to LR
X XXXX XX 0001110 XX XX 010 X XXXXXXXXXX
X XXXX XX 0001110 XX XX 011 X XXXXXXXXXX
Floating-point/Media Branches to LR
X XXXX XX 0001110 XX XX 110 X XXXXXXXXXX
X XXXX XX 0001110 XX XX 111 X XXXXXXXXXX
Jump and Link
X XXXXX X 0001100 XXXXXX XXXXXX XXXXXX
X XXXXX X 0001101 XXXXXX XXXXXX XXXXXX
Call
X XXXXXX 0001111 XXXXXXXXXXXXXXXXXX
Return from Trap
X XXXXX X 0000101 XXXXXX XXXXXX XXXXXX
Integer Conditional Trap
X XXXX XX 0000100 XXXXXX XXXX 00 XXXXXX
X XXXX XX 0011100 XXXXXX XXXXXXXXXXXX
Floating-point /media Conditional Trap
X XXXX XX 0000100 XXXXXX XXXX 01 XXXXXX
X XXXX XX 0011101 XXXXXX XXXXXXXXXXXX
Break
X XXXX XX 0000100 XXXXXX XXXX 11 XXXXXX
Media Trap
X XXXX XX 0000100 XXXXXX XXXX 10 XXXXXX */
if ((op & 0x01d80000) == 0x00180000 /* Conditional branches and Call */
|| (op & 0x01f80000) == 0x00300000 /* Jump and Link */
|| (op & 0x01f80000) == 0x00100000 /* Return from Trap, Trap */
|| (op & 0x01f80000) == 0x00700000) /* Trap immediate */
{
/* Stop scanning; not in prologue any longer. */
break;
}
/* Loading something from memory into fp probably means that
we're in the epilogue. Stop scanning the prologue.
ld @(GRi, GRk), fp
X 000010 0000010 XXXXXX 000100 XXXXXX
ldi @(GRi, d12), fp
X 000010 0110010 XXXXXX XXXXXXXXXXXX */
else if ((op & 0x7ffc0fc0) == 0x04080100
|| (op & 0x7ffc0000) == 0x04c80000)
{
break;
}
/* Setting the FP from the SP:
ori sp, 0, fp
P 000010 0100010 000001 000000000000 = 0x04881000
0 111111 1111111 111111 111111111111 = 0x7fffffff
. . . . . . . .
We treat this as part of the prologue. */
else if ((op & 0x7fffffff) == 0x04881000)
{
fp_set = 1;
fp_offset = 0;
last_prologue_pc = next_pc;
}
/* Move the link register to the scratch register grJ, before saving:
movsg lr, grJ
P 000100 0000011 010000 000111 JJJJJJ = 0x080d01c0
0 111111 1111111 111111 111111 000000 = 0x7fffffc0
. . . . . . . .
We treat this as part of the prologue. */
else if ((op & 0x7fffffc0) == 0x080d01c0)
{
int gr_j = op & 0x3f;
/* If we're moving it to a scratch register, that's fine. */
if (is_caller_saves_reg (gr_j))
{
lr_save_reg = gr_j;
last_prologue_pc = next_pc;
}
}
/* To save multiple callee-saves registers on the stack, at
offset zero:
std grK,@(sp,gr0)
P KKKKKK 0000011 000001 000011 000000 = 0x000c10c0
0 000000 1111111 111111 111111 111111 = 0x01ffffff
stq grK,@(sp,gr0)
P KKKKKK 0000011 000001 000100 000000 = 0x000c1100
0 000000 1111111 111111 111111 111111 = 0x01ffffff
. . . . . . . .
We treat this as part of the prologue, and record the register's
saved address in the frame structure. */
else if ((op & 0x01ffffff) == 0x000c10c0
|| (op & 0x01ffffff) == 0x000c1100)
{
int gr_k = ((op >> 25) & 0x3f);
int ope = ((op >> 6) & 0x3f);
int count;
int i;
/* Is it an std or an stq? */
if (ope == 0x03)
count = 2;
else
count = 4;
/* Is it really a callee-saves register? */
if (is_callee_saves_reg (gr_k))
{
for (i = 0; i < count; i++)
{
gr_saved[gr_k + i] = 1;
gr_sp_offset[gr_k + i] = 4 * i;
}
last_prologue_pc = next_pc;
}
}
/* Adjusting the stack pointer. (The stack pointer is GR1.)
addi sp, S, sp
P 000001 0010000 000001 SSSSSSSSSSSS = 0x02401000
0 111111 1111111 111111 000000000000 = 0x7ffff000
. . . . . . . .
We treat this as part of the prologue. */
else if ((op & 0x7ffff000) == 0x02401000)
/* Scan an FR-V prologue, starting at PC, until frame->PC.
If FRAME is non-zero, fill in its saved_regs with appropriate addresses.
We assume FRAME's saved_regs array has already been allocated and cleared.
Return the first PC value after the prologue.
Note that, for unoptimized code, we almost don't need this function
at all; all arguments and locals live on the stack, so we just need
the FP to find everything. The catch: structures passed by value
have their addresses living in registers; they're never spilled to
the stack. So if you ever want to be able to get to these
arguments in any frame but the top, you'll need to do this serious
prologue analysis. */
static CORE_ADDR
frv_analyze_prologue (CORE_ADDR pc, struct frame_info *frame)
{
/* When writing out instruction bitpatterns, we use the following
letters to label instruction fields:
P - The parallel bit. We don't use this.
J - The register number of GRj in the instruction description.
K - The register number of GRk in the instruction description.
I - The register number of GRi.
S - a signed imediate offset.
U - an unsigned immediate offset.
The dots below the numbers indicate where hex digit boundaries
fall, to make it easier to check the numbers. */
/* Non-zero iff we've seen the instruction that initializes the
frame pointer for this function's frame. */
int fp_set = 0;
/* If fp_set is non_zero, then this is the distance from
the stack pointer to frame pointer: fp = sp + fp_offset. */
int fp_offset = 0;
/* Total size of frame prior to any alloca operations. */
int framesize = 0;
/* The number of the general-purpose register we saved the return
address ("link register") in, or -1 if we haven't moved it yet. */
int lr_save_reg = -1;
/* Non-zero iff we've saved the LR onto the stack. */
int lr_saved_on_stack = 0;
/* If gr_saved[i] is non-zero, then we've noticed that general
register i has been saved at gr_sp_offset[i] from the stack
pointer. */
char gr_saved[64];
int gr_sp_offset[64];
memset (gr_saved, 0, sizeof (gr_saved));
while (! frame || pc < frame->pc)
{
LONGEST op = read_memory_integer (pc, 4);
/* The tests in this chain of ifs should be in order of
decreasing selectivity, so that more particular patterns get
to fire before less particular patterns. */
/* Setting the FP from the SP:
ori sp, 0, fp
P 000010 0100010 000001 000000000000 = 0x04881000
0 111111 1111111 111111 111111111111 = 0x7fffffff
. . . . . . . .
We treat this as part of the prologue. */
if ((op & 0x7fffffff) == 0x04881000)
{
fp_set = 1;
fp_offset = 0;
}
/* Move the link register to the scratch register grJ, before saving:
movsg lr, grJ
P 000100 0000011 010000 000111 JJJJJJ = 0x080d01c0
0 111111 1111111 111111 111111 000000 = 0x7fffffc0
. . . . . . . .
We treat this as part of the prologue. */
else if ((op & 0x7fffffc0) == 0x080d01c0)
{
int gr_j = op & 0x3f;
/* If we're moving it to a scratch register, that's fine. */
if (is_caller_saves_reg (gr_j))
lr_save_reg = gr_j;
/* Otherwise it's not a prologue instruction that we
recognize. */
else
break;
}
/* To save multiple callee-saves registers on the stack, at
offset zero:
std grK,@(sp,gr0)
P KKKKKK 0000011 000001 000011 000000 = 0x000c10c0
0 000000 1111111 111111 111111 111111 = 0x01ffffff
stq grK,@(sp,gr0)
P KKKKKK 0000011 000001 000100 000000 = 0x000c1100
0 000000 1111111 111111 111111 111111 = 0x01ffffff
. . . . . . . .
We treat this as part of the prologue, and record the register's
saved address in the frame structure. */
else if ((op & 0x01ffffff) == 0x000c10c0
|| (op & 0x01ffffff) == 0x000c1100)
{
int gr_k = ((op >> 25) & 0x3f);
int ope = ((op >> 6) & 0x3f);
int count;
int i;
/* Is it an std or an stq? */
if (ope == 0x03)
count = 2;
else
count = 4;
/* Is it really a callee-saves register? */
if (is_callee_saves_reg (gr_k))
{
for (i = 0; i < count; i++)
{
gr_saved[gr_k + i] = 1;
gr_sp_offset[gr_k + i] = 4 * i;
}
}
else
/* It's not a prologue instruction. */
break;
}
/* Adjusting the stack pointer. (The stack pointer is GR1.)
addi sp, S, sp
P 000001 0010000 000001 SSSSSSSSSSSS = 0x02401000
0 111111 1111111 111111 000000000000 = 0x7ffff000
. . . . . . . .
We treat this as part of the prologue. */
else if ((op & 0x7ffff000) == 0x02401000)