/*
This function relevant only for line modules/chips
Returns string with external port index
*/
char *portmapstring(Port *port)
{
static char mapping[OUT_BUFFER_SIZE];
ChassisRecord *ch = port->node->chrecord;
int portnum = port->portnum;
int chipnum = 0;
int pindex = 0;
Node *node = port->node;
if (!ch || !is_line(node) || (portnum < 13 || portnum > 24))
return NULL;
if (ch->anafanum < 1 || ch->anafanum > 2)
return NULL;
memset(mapping, 0, sizeof(mapping));
chipnum = ch->anafanum - 1;
if (is_line_24(node))
pindex = int2ext_map_slb24[chipnum][portnum];
else if (is_line_2024(node))
pindex = int2ext_map_slb2024[chipnum][portnum];
else
pindex = int2ext_map_slb8[chipnum][portnum];
sprintf(mapping, "[ext %d]", pindex);
return mapping;
}
/* map internal ports to external ports if appropriate */
static void voltaire_portmap(ibnd_port_t * port)
{
int portnum = port->portnum;
int chipnum = 0;
ibnd_node_t *node = port->node;
int is_4700_line = is_line_4700(node);
int is_4700x2_spine = is_spine_4700x2(node);
if (!node->ch_found || (!is_line(node) && !is_4700x2_spine)) {
port->ext_portnum = 0;
return;
}
if (((is_4700_line || is_4700x2_spine) &&
(portnum < 19 || portnum > 36)) ||
((!is_4700_line && !is_4700x2_spine) &&
(portnum < 13 || portnum > 24))) {
port->ext_portnum = 0;
return;
}
if (port->node->ch_anafanum < 1 || port->node->ch_anafanum > 2) {
port->ext_portnum = 0;
return;
}
chipnum = port->node->ch_anafanum - 1;
if (is_line_24(node))
port->ext_portnum = int2ext_map_slb24[chipnum][portnum];
else if (is_line_2024(node))
port->ext_portnum = int2ext_map_slb2024[chipnum][portnum];
/* sLB-4018: Only one asic per LB */
else if (is_4700_line)
port->ext_portnum = int2ext_map_slb4018[portnum];
/* sFB-4700X2 4X port */
else if (is_4700x2_spine)
port->ext_portnum = int2ext_map_sfb4700x2[chipnum][portnum];
else
port->ext_portnum = int2ext_map_slb8[chipnum][portnum];
}
static int is_line(ibnd_node_t * n)
{
return (is_line_24(n) || is_line_8(n) ||
is_line_2024(n) || is_line_4700(n));
}
static int is_line(Node *node)
{
return (is_line_24(node) || is_line_8(node) || is_line_2024(node));
}
