/*----------------------------------------------------------------------------*/
BOOL
kalDevPortWrite(
P_GLUE_INFO_T prGlueInfo,
IN UINT_16 u2Port,
IN UINT_16 u2Len,
IN PUINT_8 pucBuf,
IN UINT_16 u2ValidInBufSize
)
{
UINT_32 i;
GLUE_SPIN_LOCK_DECLARATION();
ASSERT(prGlueInfo);
/* 0. acquire spinlock */
GLUE_ACQUIRE_SPIN_LOCK(prGlueInfo, SPIN_LOCK_EHPI_BUS);
/* 1. indicate correct length to HIFSYS if larger than 4-bytes */
if(u2Len > 4) {
kalDevRegWrite_impl(prGlueInfo, MCR_EHTCR, ALIGN_4(u2Len));
}
/* 2. address cycle */
#if EHPI16
writew(u2Port, prGlueInfo->rHifInfo.mcr_addr_base);
#elif EHPI8
writew((u2Port & 0xFF), prGlueInfo->rHifInfo.mcr_addr_base);
writew(((u2Port & 0xFF00) >> 8), prGlueInfo->rHifInfo.mcr_addr_base);
#endif
/* 3. data cycle */
for(i = 0 ; i < ALIGN_4(u2Len) ; i += 4) {
#if EHPI16
writew((UINT_32)(*((PUINT_16) &(pucBuf[i]))), prGlueInfo->rHifInfo.mcr_data_base);
writew((UINT_32)(*((PUINT_16) &(pucBuf[i+2]))), prGlueInfo->rHifInfo.mcr_data_base);
#elif EHPI8
writew((UINT_32)(*((PUINT_8) &(pucBuf[i]))), prGlueInfo->rHifInfo.mcr_data_base);
writew((UINT_32)(*((PUINT_8) &(pucBuf[i+1]))), prGlueInfo->rHifInfo.mcr_data_base);
writew((UINT_32)(*((PUINT_8) &(pucBuf[i+2]))), prGlueInfo->rHifInfo.mcr_data_base);
writew((UINT_32)(*((PUINT_8) &(pucBuf[i+3]))), prGlueInfo->rHifInfo.mcr_data_base);
#endif
}
/* 4. restore length to 4 if necessary */
if(u2Len > 4) {
kalDevRegWrite_impl(prGlueInfo, MCR_EHTCR, 4);
}
/* 5. release spin lock */
GLUE_RELEASE_SPIN_LOCK(prGlueInfo, SPIN_LOCK_EHPI_BUS);
return TRUE;
}
/*----------------------------------------------------------------------------*/
BOOL
kalDevWriteWithSdioCmd52 (
IN P_GLUE_INFO_T prGlueInfo,
IN UINT_32 u4Addr,
IN UINT_8 ucData
)
{
UINT_32 u4RegValue;
BOOLEAN bRet;
GLUE_SPIN_LOCK_DECLARATION();
ASSERT(prGlueInfo);
/* 0. acquire spinlock */
GLUE_ACQUIRE_SPIN_LOCK(prGlueInfo, SPIN_LOCK_EHPI_BUS);
/* 1. there is no single byte access support for eHPI, use 4-bytes write-after-read approach instead */
if(kalDevRegRead_impl(prGlueInfo, u4Addr, &u4RegValue) == TRUE) {
u4RegValue &= 0x00;
u4RegValue |= ucData;
bRet = kalDevRegWrite_impl(prGlueInfo, u4Addr, u4RegValue);
}
else {
bRet = FALSE;
}
/* 2. release spin lock */
GLUE_RELEASE_SPIN_LOCK(prGlueInfo, SPIN_LOCK_EHPI_BUS);
return bRet;
}
/*----------------------------------------------------------------------------*/
BOOL kalDevRegWrite(P_GLUE_INFO_T prGlueInfo, IN UINT_32 u4Register, IN UINT_32 u4Value)
{
GLUE_SPIN_LOCK_DECLARATION();
ASSERT(prGlueInfo);
/* 0. acquire spinlock */
GLUE_ACQUIRE_SPIN_LOCK(prGlueInfo, SPIN_LOCK_EHPI_BUS);
/* 1. I/O stuff */
kalDevRegWrite_impl(prGlueInfo, u4Register, u4Value);
/* 2. release spin lock */
GLUE_RELEASE_SPIN_LOCK(prGlueInfo, SPIN_LOCK_EHPI_BUS);
return TRUE;
}
