/* Arch-dependent CPU detection. */ static uint32_t jit_cpudetect(lua_State *L) { uint32_t flags = 0; #if LJ_TARGET_X86ORX64 uint32_t vendor[4]; uint32_t features[4]; if (lj_vm_cpuid(0, vendor) && lj_vm_cpuid(1, features)) { #if !LJ_HASJIT #define JIT_F_CMOV 1 #define JIT_F_SSE2 2 #endif flags |= ((features[3] >> 15)&1) * JIT_F_CMOV; flags |= ((features[3] >> 26)&1) * JIT_F_SSE2; #if LJ_HASJIT flags |= ((features[2] >> 0)&1) * JIT_F_SSE3; flags |= ((features[2] >> 19)&1) * JIT_F_SSE4_1; if (vendor[2] == 0x6c65746e) { /* Intel. */ if ((features[0] & 0x0ff00f00) == 0x00000f00) /* P4. */ flags |= JIT_F_P4; /* Currently unused. */ else if ((features[0] & 0x0fff0ff0) == 0x000106c0) /* Atom. */ flags |= JIT_F_LEA_AGU; } else if (vendor[2] == 0x444d4163) { /* AMD. */ uint32_t fam = (features[0] & 0x0ff00f00); if (fam == 0x00000f00) /* K8. */ flags |= JIT_F_SPLIT_XMM; if (fam >= 0x00000f00) /* K8, K10. */ flags |= JIT_F_PREFER_IMUL; } #endif }
/* Arch-dependent CPU detection. */ static uint32_t jit_cpudetect(lua_State *L) { uint32_t flags = 0; #if LJ_TARGET_X86ORX64 uint32_t vendor[4]; uint32_t features[4]; if (lj_vm_cpuid(0, vendor) && lj_vm_cpuid(1, features)) { #if !LJ_HASJIT #define JIT_F_SSE2 2 #endif flags |= ((features[3] >> 26)&1) * JIT_F_SSE2; #if LJ_HASJIT flags |= ((features[2] >> 0)&1) * JIT_F_SSE3; flags |= ((features[2] >> 19)&1) * JIT_F_SSE4_1; if (vendor[2] == 0x6c65746e) { /* Intel. */ if ((features[0] & 0x0fff0ff0) == 0x000106c0) /* Atom. */ flags |= JIT_F_LEA_AGU; } else if (vendor[2] == 0x444d4163) { /* AMD. */ uint32_t fam = (features[0] & 0x0ff00f00); if (fam >= 0x00000f00) /* K8, K10. */ flags |= JIT_F_PREFER_IMUL; } if (vendor[0] >= 7) { uint32_t xfeatures[4]; lj_vm_cpuid(7, xfeatures); flags |= ((xfeatures[1] >> 8)&1) * JIT_F_BMI2; }